Add single-wire UART support to STM32 serial driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5552 42af7a65-404d-4744-a932-0658087f49c3

4 files changed, 62 insertions, 11 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 75bfd457f..6c176c601 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -4009,5 +4009,7 @@
 	* arch/arm/src/*/*_irq.c:  Set the priority of the SVCALL exception
 	  to the highest possible value.
 	* arch/armv7-m/up_hardfault.c:  Fail if a hardfault occurs
-	  while CONFIG_ARM7VM_USEBASEI=y.
+	  while CONFIG_ARM7VM_USEBASEPRI=y.
+	* arch/arm/src/stm32/stm32_serial.c:  Add support for USART
+	  single wire more (Contributed by the PX4 team).
 
diff --git a/nuttx/arch/arm/src/stm32/Kconfig b/nuttx/arch/arm/src/stm32/Kconfig
index 99dde3209..85cdebd35 100644
--- a/nuttx/arch/arm/src/stm32/Kconfig
+++ b/nuttx/arch/arm/src/stm32/Kconfig
@@ -457,32 +457,38 @@ config STM32_USART1
 	bool "USART1"
 	default n
 	select ARCH_HAVE_USART1
+	select STM32_USART
 
 config STM32_USART2
 	bool "USART2"
 	default n
 	select ARCH_HAVE_USART2
+	select STM32_USART
 
 config STM32_USART3
 	bool "USART3"
 	default n
 	select ARCH_HAVE_USART3
+	select STM32_USART
 
 config STM32_UART4
 	bool "UART4"
 	default n
 	select ARCH_HAVE_UART4
+	select STM32_USART
 
 config STM32_UART5
 	bool "UART5"
 	default n
 	select ARCH_HAVE_UART5
+	select STM32_USART
 
 config STM32_USART6
 	bool "USART6"
 	default n
 	depends on STM32_STM32F20XX || STM32_STM32F40XX
 	select ARCH_HAVE_USART6
+	select STM32_USART
 
 config STM32_USB
 	bool "USB Device"
@@ -1804,8 +1810,11 @@ config STM32_TIM14_DAC2
 
 endchoice
 
+bool STM32_USART
+	bool
+
 menu "U[S]ART Configuration"
-	depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_USART4 || STM32_USART5 || STM32_USART6
+	depends on STM32_USART
 
 config USART1_RS485
 	bool "RS-485 on USART1"
@@ -1968,6 +1977,14 @@ config SERIAL_TERMIOS
 
 endmenu
 
+config STM32_USART_SINGLEWIRE
+	bool "Single Wire Support"
+	default n
+	depends on STM32_USART
+	---help---
+		Enable single wire UART support.  The option enables support for the
+		TIOCSSINGLEWIRE ioctl in the STM32 serial driver.
+
 menu "SPI Configuration"
 	depends on STM32_SPI
 
diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c
index e86fbcf6f..0151bd247 100644
--- a/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_serial.c
  *
- *   Copyright (C) 2009-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -1401,6 +1401,31 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
       }
       break;
 
+#ifdef CONFIG_STM32_USART_SINGLEWIRE
+    case TIOCSSINGLEWIRE:
+      {
+        /* Change the TX port to be open-drain/push-pull and enable/disable
+         * half-duplex mode.
+         */
+
+        uint32_t cr = up_serialin(priv, STM32_USART_CR3_OFFSET);
+
+        if (arg == SER_SINGLEWIRE_ENABLED)
+          {
+            stm32_configgpio(priv->tx_gpio | GPIO_OPENDRAIN);
+            cr |= USART_CR3_HDSEL;
+          }
+        else
+          {
+            stm32_configgpio(priv->tx_gpio | GPIO_PUSHPULL);
+            cr &= ~USART_CR3_HDSEL;
+          }
+
+        up_serialout(priv, STM32_USART_CR3_OFFSET, cr);
+      }
+     break;    
+#endif
+
 #ifdef CONFIG_SERIAL_TERMIOS
     case TCGETS:
       {
diff --git a/nuttx/include/nuttx/serial/tioctl.h b/nuttx/include/nuttx/serial/tioctl.h
index b309ff37c..a98b487a6 100644
--- a/nuttx/include/nuttx/serial/tioctl.h
+++ b/nuttx/include/nuttx/serial/tioctl.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
  * include/nuttx/serial/tioctl.h
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -165,16 +165,23 @@
 #define TIOCSRS485      _TIOC(0x002a)  /* Set RS485 mode, arg: pointer to struct serial_rs485 */
 #define TIOCGRS485      _TIOC(0x002b)  /* Get RS485 mode, arg: pointer to struct serial_rs485 */
 
-/* Debugging */
+/* Definitions for flags used in struct serial_rs485 (Linux compatible) */
+
+#  define SER_RS485_ENABLED        (1 << 0) /* Enable/disble RS-485 support */
+#  define SER_RS485_RTS_ON_SEND    (1 << 1) /* Logic level for RTS pin when sending */
+#  define SER_RS485_RTS_AFTER_SEND (1 << 2) /* Logic level for RTS pin after sent */
+#  define SER_RS485_RX_DURING_TX   (1 << 4)
+
+/* Single-wire UART support */
 
-#define TIOCSERGSTRUCT  _TIOC(0x002c) /* Get device TTY structure */
+#define TIOCSSINGLEWIRE _TIOC(0x002c)  /* Set single-wire mode */
+#define TIOCGSINGLEWIRE _TIOC(0x002d)  /* Get single-wire mode */
 
-/* Definitions used in struct serial_rs485 (Linux compatible) */
+#  define SER_SINGLEWIRE_ENABLED   (1 << 0) /* Enable/disable single-wire support */
+
+/* Debugging */
 
-#define SER_RS485_ENABLED        (1 << 0) /* Enable/disble RS-485 support */
-#define SER_RS485_RTS_ON_SEND    (1 << 1) /* Logic level for RTS pin when sending */
-#define SER_RS485_RTS_AFTER_SEND (1 << 2) /* Logic level for RTS pin after sent */
-#define SER_RS485_RX_DURING_TX   (1 << 4)
+#define TIOCSERGSTRUCT  _TIOC(0x002e) /* Get device TTY structure */
 
 /********************************************************************************************
  * Public Type Definitions