SAMA5 Ethernet: Add support for PHY interrupts

9 files changed, 339 insertions, 145 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 4b36a1da0..d294783c5 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -5560,3 +5560,9 @@
 	  STM32 files (2013-9-13).
 
 6.31 2013-xx-xx Gregory Nutt <gnutt@nuttx.org>
+
+	* nuttx/fs/romfs/fs_romfsutil.c:  Back out part of a recent
+	  ROMFS change (2013-9-14).
+	* configs/sama5d3x-ek/src/sam_ethernet.c:  Add support for
+	  PHY interrupts (2013-9-15).
+
diff --git a/nuttx/arch/arm/src/sama5/sam_emac.c b/nuttx/arch/arm/src/sama5/sam_emac.c
index 25a24056b..b2a99e83b 100644
--- a/nuttx/arch/arm/src/sama5/sam_emac.c
+++ b/nuttx/arch/arm/src/sama5/sam_emac.c
@@ -61,7 +61,7 @@
 
 #include "chip.h"
 #include "sam_pio.h"
-#include "sam_emac.h"
+#include "sam_ethernet.h"
 
 #include <arch/board/board.h>
 
@@ -181,7 +181,7 @@
 
 #define SAM_TXTIMEOUT   (60*CLK_TCK)
 
-/* PHY reset/configuration delays in milliseconds */ 
+/* PHY reset/configuration delays in milliseconds */
 
 #define PHY_RESET_DELAY   (65)
 #define PHY_CONFIG_DELAY  (1000)
@@ -1008,9 +1008,9 @@ static int sam_recvframe(FAR struct sam_emac_s *priv)
           (rxdesc->rdes0 & EMAC_RDES0_LS) == 0)
         {
           priv->rxcurr   = rxdesc;
-          priv->segments = 1;   
+          priv->segments = 1;
         }
-    
+
       /* Check if this is an intermediate segment in the frame */
 
       else if (((rxdesc->rdes0 & EMAC_RDES0_LS) == 0)&&
@@ -1022,7 +1022,7 @@ static int sam_recvframe(FAR struct sam_emac_s *priv)
       /* Otherwise, it is the last segment in the frame */
 
       else
-        { 
+        {
           priv->segments++;
 
           /* Check if the there is only one segment in the frame */
@@ -1105,7 +1105,7 @@ static int sam_recvframe(FAR struct sam_emac_s *priv)
   nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
           priv->rxhead, priv->rxcurr, priv->segments);
 
-  return -EAGAIN; 
+  return -EAGAIN;
 }
 
 /****************************************************************************
@@ -1512,7 +1512,7 @@ static void sam_polltimer(int argc, uint32_t arg, ...)
 
       if (dev->d_buf)
         {
-          /* Update TCP timing states and poll uIP for new XMIT data. 
+          /* Update TCP timing states and poll uIP for new XMIT data.
            */
 
           (void)uip_timer(dev, sam_uiptxpoll, SAM_POLLHSEC);
@@ -1540,7 +1540,7 @@ static void sam_polltimer(int argc, uint32_t arg, ...)
  *
  * Description:
  *   NuttX Callback: Bring up the Ethernet interface when an IP address is
- *   provided 
+ *   provided
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
@@ -1632,7 +1632,7 @@ static int sam_ifdown(struct uip_driver_s *dev)
  * Function: sam_txavail
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a 
+ *   Driver callback invoked when new TX data is available.  This is a
  *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
  *   latency.
  *
@@ -1682,7 +1682,7 @@ static int sam_txavail(struct uip_driver_s *dev)
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be added 
+ *   mac  - The MAC address to be added
  *
  * Returned Value:
  *   None
@@ -1716,7 +1716,7 @@ static int sam_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be removed 
+ *   mac  - The MAC address to be removed
  *
  * Returned Value:
  *   None
@@ -1760,7 +1760,7 @@ static void sam_txdescinit(FAR struct sam_emac_s *priv)
 {
   struct emac_txdesc_s *txdesc;
   int i;
-  
+
   /* priv->txhead will point to the first, available TX descriptor in the chain.
    * Set the priv->txhead pointer to the first descriptor in the table.
    */
@@ -1775,7 +1775,7 @@ static void sam_txdescinit(FAR struct sam_emac_s *priv)
    priv->txtail   = NULL;
    priv->inflight = 0;
 
-  /* Initialize each TX descriptor */   
+  /* Initialize each TX descriptor */
 
   for (i = 0; i < CONFIG_SAMA5_EMAC_NTXDESC; i++)
     {
@@ -1783,8 +1783,8 @@ static void sam_txdescinit(FAR struct sam_emac_s *priv)
 
       /* Set Second Address Chained bit */
 
-      txdesc->tdes0 = EMAC_TDES0_TCH;  
-       
+      txdesc->tdes0 = EMAC_TDES0_TCH;
+
 #ifdef CHECKSUM_BY_HARDWARE
       /* Enable the checksum insertion for the TX frames */
 
@@ -1796,7 +1796,7 @@ static void sam_txdescinit(FAR struct sam_emac_s *priv)
        */
 
       txdesc->tdes2 = 0;
-    
+
       /* Initialize the next descriptor with the Next Descriptor Polling Enable */
 
       if (i < (CONFIG_SAMA5_EMAC_NTXDESC-1))
@@ -1813,7 +1813,7 @@ static void sam_txdescinit(FAR struct sam_emac_s *priv)
            * to the first descriptor base address
            */
 
-          txdesc->tdes3 = (uint32_t)priv->txtable;  
+          txdesc->tdes3 = (uint32_t)priv->txtable;
         }
     }
 
@@ -1841,7 +1841,7 @@ static void sam_rxdescinit(FAR struct sam_emac_s *priv)
 {
   struct emac_rxdesc_s *rxdesc;
   int i;
-  
+
   /* priv->rxhead will point to the first,  RX descriptor in the chain.
    * This will be where we receive the first incomplete frame.
    */
@@ -1855,7 +1855,7 @@ static void sam_rxdescinit(FAR struct sam_emac_s *priv)
   priv->rxcurr   = NULL;
   priv->segments = 0;
 
-  /* Initialize each TX descriptor */   
+  /* Initialize each TX descriptor */
 
   for (i = 0; i < CONFIG_SAMA5_EMAC_NRXDESC; i++)
     {
@@ -1869,12 +1869,12 @@ static void sam_rxdescinit(FAR struct sam_emac_s *priv)
        * RX desc receive interrupt
        */
 
-      rxdesc->rdes1 = EMAC_RDES1_RCH | (uint32_t)CONFIG_SAMA5_EMAC_BUFSIZE;  
+      rxdesc->rdes1 = EMAC_RDES1_RCH | (uint32_t)CONFIG_SAMA5_EMAC_BUFSIZE;
 
       /* Set Buffer1 address pointer */
 
       rxdesc->rdes2 = (uint32_t)&priv->rxbuffer[i*CONFIG_SAMA5_EMAC_BUFSIZE];
-    
+
       /* Initialize the next descriptor with the Next Descriptor Polling Enable */
 
       if (i < (CONFIG_SAMA5_EMAC_NRXDESC-1))
@@ -1891,7 +1891,7 @@ static void sam_rxdescinit(FAR struct sam_emac_s *priv)
            * to the first descriptor base address
            */
 
-          rxdesc->rdes3 = (uint32_t)priv->rxtable;  
+          rxdesc->rdes3 = (uint32_t)priv->rxtable;
         }
     }
 
@@ -2048,7 +2048,7 @@ static inline int sam_dm9161(FAR struct sam_emac_s *priv)
   /* Bit 8 of the DSCR register is zero, then the DM9161 has not selected RMII.
    * If RMII is not selected, then reset the MCU to recover.
    */
- 
+
   else if ((phyval & (1 << 8)) == 0)
     {
       up_systemreset();
@@ -2175,7 +2175,7 @@ static int sam_phyinit(FAR struct sam_emac_s *priv)
       ndbg("Timed out waiting for auto-negotiation\n");
       return -ETIMEDOUT;
     }
- 
+
   /* Read the result of the auto-negotiation from the PHY-specific register */
 
   ret = sam_phyread(CONFIG_SAMA5_PHYADDR, CONFIG_SAMA5_PHYSR, &phyval);
@@ -2331,16 +2331,23 @@ static inline void sam_selectrmii(void)
 
 static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
 {
-  /* Configure GPIO pins to support Ethernet */
+  /* Configure PIO pins to support EMAC */
+  /* Configure EMAC PIO pins common to both MII and RMII */
 
-#if defined(CONFIG_SAMA5_MII) || defined(CONFIG_SAMA5_RMII)
+  sam_configpio(PIO_EMAC_TX0);
+  sam_configpio(PIO_EMAC_TX1);
+  sam_configpio(PIO_EMAC_RX0);
+  sam_configpio(PIO_EMAC_RX1);
 
-  /* MDC and MDIO are common to both modes */
+  sam_configpio(PIO_EMAC_TXEN);
+  sam_configpio(PIO_EMAC_CRSDV);
+  sam_configpio(PIO_EMAC_RXER);
+  sam_configpio(PIO_EMAC_REFCK);
 
-  sam_configgpio(GPIO_EMAC_MDC);
-  sam_configgpio(GPIO_EMAC_MDIO);
+  /* MDC and MDIO are common to both modes */
 
-  /* Set up the MII interface */
+  sam_configpio(PIO_EMAC_MDC);
+  sam_configpio(PIO_EMAC_MDIO);
 
 #if defined(CONFIG_SAMA5_MII)
 
@@ -2348,60 +2355,11 @@ static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
 
   sam_selectmii();
 
-  /* Provide clocking via MCO, MCO1 or MCO2:
-   *
-   * "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
-   *  clock (through a configurable prescaler) on PA8 pin."
-   *
-   * "MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or
-   *  PLLI2S clock (through a configurable prescaler) on PC9 pin."
-   */
-
-# if defined(CONFIG_SAMA5_MII_MCO1)
-  /* Configure MC01 to drive the PHY.  Board logic must provide MC01 clocking
-   * info.
-   */
-
-  sam_configgpio(GPIO_MCO1);
-  sam_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
-
-# elif defined(CONFIG_SAMA5_MII_MCO2)
-  /* Configure MC02 to drive the PHY.  Board logic must provide MC02 clocking
-   * info.
-   */
-
-  sam_configgpio(GPIO_MCO2);
-  sam_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
-
-# elif defined(CONFIG_SAMA5_MII_MCO)
-  /* Setup MCO pin for alternative usage */
+  /* Provide clocking */
+#warning Missing logic
 
-  sam_configgpio(GPIO_MCO);
-  sam_mcoconfig(BOARD_CFGR_MCO_SOURCE);
 # endif
 
-  /* MII interface pins (17):  
-   *
-   * MII_TX_CLK, MII_TXD[3:0], MII_TX_EN, MII_RX_CLK, MII_RXD[3:0], MII_RX_ER,
-   * MII_RX_DV, MII_CRS, MII_COL, MDC, MDIO
-   */
-
-  sam_configgpio(GPIO_EMAC_MII_COL);
-  sam_configgpio(GPIO_EMAC_MII_CRS);
-  sam_configgpio(GPIO_EMAC_MII_RXD0);
-  sam_configgpio(GPIO_EMAC_MII_RXD1);
-  sam_configgpio(GPIO_EMAC_MII_RXD2);
-  sam_configgpio(GPIO_EMAC_MII_RXD3);
-  sam_configgpio(GPIO_EMAC_MII_RX_CLK);
-  sam_configgpio(GPIO_EMAC_MII_RX_DV);
-  sam_configgpio(GPIO_EMAC_MII_RX_ER);
-  sam_configgpio(GPIO_EMAC_MII_TXD0);
-  sam_configgpio(GPIO_EMAC_MII_TXD1);
-  sam_configgpio(GPIO_EMAC_MII_TXD2);
-  sam_configgpio(GPIO_EMAC_MII_TXD3);
-  sam_configgpio(GPIO_EMAC_MII_TX_CLK);
-  sam_configgpio(GPIO_EMAC_MII_TX_EN);
-
   /* Set up the RMII interface. */
 
 #elif defined(CONFIG_SAMA5_RMII)
@@ -2410,59 +2368,10 @@ static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
 
   sam_selectrmii();
 
-  /* Provide clocking via MCO, MCO1 or MCO2:
-   *
-   * "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
-   *  clock (through a configurable prescaler) on PA8 pin."
-   *
-   * "MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or
-   *  PLLI2S clock (through a configurable prescaler) on PC9 pin."
-   */
-
-# if defined(CONFIG_SAMA5_RMII_MCO1)
-  /* Configure MC01 to drive the PHY.  Board logic must provide MC01 clocking
-   * info.
-   */
-
-  sam_configgpio(GPIO_MCO1);
-  sam_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
-
-# elif defined(CONFIG_SAMA5_RMII_MCO2)
-  /* Configure MC02 to drive the PHY.  Board logic must provide MC02 clocking
-   * info.
-   */
-
-  sam_configgpio(GPIO_MCO2);
-  sam_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
-
-# elif defined(CONFIG_SAMA5_RMII_MCO)
-  /* Setup MCO pin for alternative usage */
-
-  sam_configgpio(GPIO_MCO);
-  sam_mcoconfig(BOARD_CFGR_MCO_SOURCE);
-# endif
-
-  /* RMII interface pins (7):
-   *
-   * RMII_TXD[1:0], RMII_TX_EN, RMII_RXD[1:0], RMII_CRS_DV, MDC, MDIO,
-   * RMII_REF_CLK
-   */
-
-  sam_configgpio(GPIO_EMAC_RMII_CRS_DV);
-  sam_configgpio(GPIO_EMAC_RMII_REF_CLK);
-  sam_configgpio(GPIO_EMAC_RMII_RXD0);
-  sam_configgpio(GPIO_EMAC_RMII_RXD1);
-  sam_configgpio(GPIO_EMAC_RMII_TXD0);
-  sam_configgpio(GPIO_EMAC_RMII_TXD1);
-  /* sam_configgpio(GPIO_EMAC_RMII_TX_CLK); not needed? */
-  sam_configgpio(GPIO_EMAC_RMII_TX_EN);
+  /* Provide clocking */
+#warning Missing logic
 
 #endif
-#endif
-
-  /* Enable pulse-per-second (PPS) output signal */
-
-  sam_configgpio(GPIO_EMAC_PPS_OUT);
 }
 
 /****************************************************************************
@@ -2560,7 +2469,16 @@ static void sam_macaddress(FAR struct sam_emac_s *priv)
           dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
-#warning Missing logic
+
+  regval = (uint32_t)dev->d_mac.ether_addr_octet[0]       |,
+           (uint32_t)dev->d_mac.ether_addr_octet[1] << 8  |,
+           (uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |,
+           (uint32_t)dev->d_mac.ether_addr_octet[3] << 24 |,
+  sam_putreg(priv, SAM_GMAC_SAB1, regval);
+
+  regval = (uint32_t)dev->d_mac.ether_addr_octet[4]       |,
+           (uint32_t)dev->d_mac.ether_addr_octet[5] << 8  |,
+  sam_putreg(priv, SAM_GMAC_SAT1, regval);
 }
 
 /****************************************************************************
@@ -2587,18 +2505,18 @@ static int sam_macenable(FAR struct sam_emac_s *priv)
 
   sam_macaddress(priv);
 
-  /* Enable transmit state machine of the MAC for transmission on the MII */  
+  /* Enable transmit state machine of the MAC for transmission on the MII */
 #warning Missing logic
 
   /* Flush Transmit FIFO */
 #warning Missing logic
 
-  /* Enable receive state machine of the MAC for reception from the MII */  
+  /* Enable receive state machine of the MAC for reception from the MII */
 #warning Missing logic
- 
+
   /* Start DMA transmission */
 #warning Missing logic
- 
+
   /* Start DMA reception */
 #warning Missing logic
 
@@ -2719,7 +2637,7 @@ int sam_emac_initialize(void)
   priv->txpoll       = wd_create();   /* Create periodic poll timer */
   priv->txtimeout    = wd_create();   /* Create TX timeout timer */
 
-  /* Configure GPIO pins to support Ethernet */
+  /* Configure PIO pins to support EMAC */
 
   sam_ethgpioconfig(priv);
 
diff --git a/nuttx/arch/arm/src/sama5/sam_eth.c b/nuttx/arch/arm/src/sama5/sam_ethernet.c
index 6db12bd93..5e938523d 100644
--- a/nuttx/arch/arm/src/sama5/sam_eth.c
+++ b/nuttx/arch/arm/src/sama5/sam_ethernet.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sama5/sam_eth.c
+ * arch/arm/src/sama5/sam_ethernet.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -39,7 +39,7 @@
 
 #include <nuttx/config.h>
 #include <debug.h>
-#include "sam_emac.h"
+#include "sam_ethernet.h"
 
 #ifdef CONFIG_NET
 
diff --git a/nuttx/arch/arm/src/sama5/sam_emac.h b/nuttx/arch/arm/src/sama5/sam_ethernet.h
index 31b73ee25..b102b5384 100644
--- a/nuttx/arch/arm/src/sama5/sam_emac.h
+++ b/nuttx/arch/arm/src/sama5/sam_ethernet.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/sama5/sam_eth.h
+ * arch/arm/src/sama5/sam_ethernet.h
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
-#define __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
+#ifndef __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H
+#define __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H
 
 /************************************************************************************
  * Included Files
@@ -44,6 +44,7 @@
 
 #include "chip.h"
 #include "chip/sam_emac.h"
+#include "chip/sam_gmac.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -139,5 +140,5 @@ int sam_phy_boardinitialize(int intf);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H */
+#endif /* __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H */
 
diff --git a/nuttx/configs/sama5d3x-ek/include/board.h b/nuttx/configs/sama5d3x-ek/include/board.h
index 29e56028e..4a2eeab93 100644
--- a/nuttx/configs/sama5d3x-ek/include/board.h
+++ b/nuttx/configs/sama5d3x-ek/include/board.h
@@ -183,6 +183,19 @@ extern "C" {
 void sam_boardinitialize(void);
 
 /************************************************************************************
+ * Name: sam_phyirq
+ *
+ * Description:
+ *   This function may be called to register an interrupt handler that will be
+ *   called when an interrupt is received from a PHY.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_NET) && (defined(CONFIG_SAMA5_EMAC) || defined(CONFIG_SAMA5_GMAC))
+xcpt_t sam_phyirq(int intf, xcpt_t irqhandler);
+#endif
+
+/************************************************************************************
  * Name:  sam_ledinit, sam_setled, and sam_setleds
  *
  * Description:
diff --git a/nuttx/configs/sama5d3x-ek/src/Makefile b/nuttx/configs/sama5d3x-ek/src/Makefile
index 29209f68a..2a2a17e7d 100644
--- a/nuttx/configs/sama5d3x-ek/src/Makefile
+++ b/nuttx/configs/sama5d3x-ek/src/Makefile
@@ -94,6 +94,14 @@ CSRCS += sam_usb.c
 endif
 endif
 
+ifeq ($(CONFIG_SAMA5_EMAC),y)
+CSRCS += sam_ethernet.c
+else
+ifeq ($(CONFIG_SAMA5_GMAC),y)
+CSRCS += sam_ethernet.c
+endif
+endif
+
 ifeq ($(CONFIG_NSH_ARCHINIT),y)
 CSRCS += sam_nsh.c
 endif
diff --git a/nuttx/configs/sama5d3x-ek/src/sam_boot.c b/nuttx/configs/sama5d3x-ek/src/sam_boot.c
index fda4c8354..c57b7df06 100644
--- a/nuttx/configs/sama5d3x-ek/src/sam_boot.c
+++ b/nuttx/configs/sama5d3x-ek/src/sam_boot.c
@@ -44,7 +44,7 @@
 #include "sama5d3x-ek.h"
 
 /************************************************************************************
- * Definitions
+ * Pre-processor Definitions
  ************************************************************************************/
 
 /************************************************************************************
@@ -103,6 +103,18 @@ void sam_boardinitialize(void)
     }
 #endif
 
+  /* Configure board resources to support networkingif the 1) networking is enabled,
+   * 2) the EMAC or GMAC module is enabled, and 2) the weak function
+   * sam_netinitialize() has been brought into the build.
+   */
+
+#ifdef HAVE_NETWORK
+  if (sam_netinitialize)
+    {
+      sam_netinitialize();
+    }
+#endif
+
 #ifdef CONFIG_ARCH_LEDS
   /* Configure on-board LEDs if LED support has been selected. */
 
diff --git a/nuttx/configs/sama5d3x-ek/src/sam_ethernet.c b/nuttx/configs/sama5d3x-ek/src/sam_ethernet.c
new file mode 100644
index 000000000..54248a3b2
--- /dev/null
+++ b/nuttx/configs/sama5d3x-ek/src/sam_ethernet.c
@@ -0,0 +1,170 @@
+/************************************************************************************
+ * configs/sama5d3x-ek/src/sam_ethernet.c
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/irq.h>
+
+#include "sam_pio.h"
+#include "sam_ethernet.h"
+
+#ifdef HAVE_NETWORK
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_netinitialize
+ *
+ * Description:
+ *   Configure board resources to support networking.
+ *
+ ************************************************************************************/
+
+void weak_function sam_netinitialize(void)
+{
+#ifdef CONFIG_SAMA4_EMAC
+  /* Ethernet 10/100 (EMAC) Port
+   *
+   * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
+   * The board supports MII and RMII interface modes.
+   *
+   * The two independent PHY devices embedded on CM and MB boards are connected to
+   * independent RJ-45 connectors with built-in magnetic and status LEDs.
+   *
+   * At the De-Assertion of Reset:
+   *   PHY ADD[2:0]:001
+   *   CONFIG[2:0]:001,Mode:RMII
+   *   Duplex Mode:Half Duplex
+   *   Isolate Mode:Disable
+   *   Speed Mode:100Mbps
+   *   Nway Auto-Negotiation:Enable
+   *
+   * The KSZ8051 PHY interrtup is available on PE30 INT_ETH1
+  */
+
+  sam_configpio(PIO_INT_ETH1);
+#endif
+
+#ifdef CONFIG_SAMA4_GMAC
+  /* Tri-Speed Ethernet PHY
+   *
+   * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL
+   * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface
+   * mode. The Ethernet interface consists of 4 pairs of low voltage differential
+   * pair signals designated from GRX± and GTx± plus control signals for link
+   * activity indicators. These signals can be used to connect to a 10/100/1000
+   * BaseT RJ45 connector integrated on the main board.
+   *
+   * The KSZ9021/31 interrupt is available on PB35 INT_GETH0
+   */
+
+  sam_configpio(PIO_INT_ETH0);
+#endif
+}
+
+/************************************************************************************
+ * Name: sam_phyirq
+ *
+ * Description:
+ *   This function may be called to register an interrupt handler that will be
+ *   called when an interrupt is received from a PHY.
+ *
+ ************************************************************************************/
+
+xcpt_t sam_phyirq(int intf, xcpt_t irqhandler)
+{
+  irqstate_t flags;
+  xcpt_t *handler;
+  xcpt_t oldhandler;
+  int irq;
+
+#ifdef CONFIG_SAMA5_EMAC
+  if (intf == EMAC_INTF)
+    {
+      handler = &g_emac_handler;
+      irq     = IRQ_INT_ETH1;
+    }
+  else
+#endif
+#ifdef CONFIG_SAMA5_GMAC
+  if (intf == GMAC_INTF)
+    {
+      handler = &g_gmac_handler;
+      irq     = IRQ_INT_ETH0;
+    }
+  else
+#endif
+    {
+      ndbg("Unsupported interface: %d\n", intf);
+      return NULL;
+    }
+
+  /* Disable interrupts until we are done.  This guarantees that the
+   * following operations are atomic.
+   */
+
+  flags = irqsave();
+
+  /* Get the old button interrupt handler and save the new one */
+
+  oldhandler = *handler;
+  *handler = irqhandler;
+
+  /* Configure the interrupt */
+
+  sam_pioirq(irq);
+  (void)irq_attach(irq, irqhandler);
+  sam_pioirqenable(irq);
+
+  /* Return the old button handler (so that it can be restored) */
+
+  return oldhandler;
+}
+
+#endif /* HAVE_NETWORK */
diff --git a/nuttx/configs/sama5d3x-ek/src/sama5d3x-ek.h b/nuttx/configs/sama5d3x-ek/src/sama5d3x-ek.h
index 2dd506c37..14b1f5f02 100644
--- a/nuttx/configs/sama5d3x-ek/src/sama5d3x-ek.h
+++ b/nuttx/configs/sama5d3x-ek/src/sama5d3x-ek.h
@@ -61,6 +61,7 @@
 #define HAVE_USBHOST    1
 #define HAVE_USBDEV     1
 #define HAVE_USBMONITOR 1
+#define HAVE_NETWORK    1
 
 /* HSMCI */
 /* Can't support MMC/SD if the card interface(s) are not enable */
@@ -251,6 +252,12 @@
 #  undef HAVE_USBMONITOR
 #endif
 
+/* Networking */
+
+#if !defined(CONFIG_NET) || (!defined(CONFIG_SAMA5_EMAC) && !defined(CONFIG_SAMA5_GMAC))
+#  undef HAVE_NETWORK
+#endif
+
 /* LEDs *****************************************************************************/
 /* There are two LEDs on the SAMA5D3 series-CM board that can be controlled
  * by software.  A  blue LED is controlled via PIO pins.  A red LED normally
@@ -410,6 +417,53 @@
 #define IRQ_USBBC_VBUS_OVERCURRENT \
                      SAM_IRQ_PD28
 
+/* Ethernet */
+
+#ifdef CONFIG_SAMA4_EMAC
+ /* ETH1: Ethernet 10/100 (EMAC) Port
+  *
+  * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
+  * The board supports MII and RMII interface modes.
+  *
+  * The two independent PHY devices embedded on CM and MB boards are connected to
+  * independent RJ-45 connectors with built-in magnetic and status LEDs.
+  *
+  * At the De-Assertion of Reset:
+  *   PHY ADD[2:0]:001
+  *   CONFIG[2:0]:001,Mode:RMII
+  *   Duplex Mode:Half Duplex
+  *   Isolate Mode:Disable
+  *   Speed Mode:100Mbps
+  *   Nway Auto-Negotiation:Enable
+  *
+  * The KSZ8051 PHY interrtup is available on PE30 INT_ETH1
+  */
+
+#define PIO_INT_ETH1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
+                      PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN30)
+#define IRQ_INT_ETH1 SAM_IRQ_PE30
+
+#endif
+
+#ifdef CONFIG_SAMA4_GMAC
+  /* ETH0: Tri-Speed Ethernet PHY
+   *
+   * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL
+   * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface
+   * mode. The Ethernet interface consists of 4 pairs of low voltage differential
+   * pair signals designated from GRX± and GTx± plus control signals for link
+   * activity indicators. These signals can be used to connect to a 10/100/1000
+   * BaseT RJ45 connector integrated on the main board.
+   *
+   * The KSZ9021/31 interrupt is available on PB35 INT_GETH0
+   */
+
+#define PIO_INT_ETH0 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
+                      PIO_INT_BOTHEDGES | PIO_PORT_PIOB | PIO_PIN25)
+#define IRQ_INT_ETH0 SAM_IRQ_PB25
+
+#endif
+
 /* SPI Chip Selects *****************************************************************/
 /* Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an
  * Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash.  The SPI
@@ -581,6 +635,18 @@ int sam_usbhost_initialize(void);
 #endif
 
 /************************************************************************************
+ * Name: sam_netinitialize
+ *
+ * Description:
+ *   Configure board resources to support networking.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_NETWORK
+void weak_function sam_netinitialize(void);
+#endif
+
+/************************************************************************************
  * Name: up_ledinit
  ************************************************************************************/