diff options
| author | Gregory Nutt <gnutt@nuttx.org> | 2013-10-16 07:26:41 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-10-16 07:26:41 -0600 |
| commit | 85045586fcce8ea70a8a3911d44082b4aec05c18 (patch) | |
| tree | 4bbc05ca6344713c8f65f3866fa9d0896527c40d | |
| parent | 568b6958e8b51d89f5a79a26d821675586dcd7bc (diff) | |
| download | nuttx-85045586fcce8ea70a8a3911d44082b4aec05c18.tar.gz nuttx-85045586fcce8ea70a8a3911d44082b4aec05c18.tar.bz2 nuttx-85045586fcce8ea70a8a3911d44082b4aec05c18.zip | |
STM32 F103C: Correct some errors in pinmapping. From David Sidrane
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32f103c_pinmap.h | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f103c_pinmap.h b/nuttx/arch/arm/src/stm32/chip/stm32f103c_pinmap.h index d2e6f82c7..98dacb50e 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f103c_pinmap.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f103c_pinmap.h @@ -4,6 +4,7 @@ * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * Laurent Latil <laurent@latil.nom.fr> + * David Sidrane <david_s5@nscdg.com> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -32,6 +33,8 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * + * The Medium-density STM32F103Cx is packaged in a LQFP48/UFQFPN48 and does not + * have the full complement of remapping. ************************************************************************************/ #ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F103C_PINMAP_H @@ -223,13 +226,36 @@ #define GPIO_USART1_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) #define GPIO_USART1_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #if defined(CONFIG_STM32_USART1_REMAP) -# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6) -# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7) +# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6) +# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7) #else # define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) # define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10) #endif +#if defined(CONFIG_STM32_USART2_REMAP) +# error CONFIG_STM32_USART2_REMAP not supported on this architecture +#else +# define GPIO_USART2_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +# define GPIO_USART2_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +# define GPIO_USART2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) +# define GPIO_USART2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +# define GPIO_USART2_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4) +#endif + +#if defined(CONFIG_STM32_USART3_FULL_REMAP) +# error CONFIG_STM32_USART3_FULL_REMAP not supported on this architecture +#elif defined(CONFIG_STM32_USART3_PARTIAL_REMAP) +# error CONFIG_STM32_USART3_PARTIAL_REMAP not supported on this architecture +#else +# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11) +# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) +# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13) +# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14) +#endif + + #define GPIO_WKUP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) /* These GPIOs are shared with JTAG / SWD. */ |