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authorGregory Nutt <gnutt@nuttx.org>2014-02-19 18:57:21 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-02-19 18:57:21 -0600
commit0691c20d132686530b52e9ad626f736e89707b9a (patch)
tree3b88b0796d2e8fa74f014188a57d8070a94eee8e
parentc7e57eb4b7bb38edfeb53f61bbfc1f16b8ed4a18 (diff)
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Spark configuration updated from David Sidrane
-rw-r--r--apps/examples/cc3000/board.c4
-rw-r--r--nuttx/configs/spark/composite/defconfig60
-rw-r--r--nuttx/configs/spark/src/up_io.c195
3 files changed, 254 insertions, 5 deletions
diff --git a/apps/examples/cc3000/board.c b/apps/examples/cc3000/board.c
index ff2a3c729..c8a6423be 100644
--- a/apps/examples/cc3000/board.c
+++ b/apps/examples/cc3000/board.c
@@ -165,11 +165,11 @@ void CC3000_Init(void)
if (!once)
{
- wireless_archinitialize();
+ wireless_archinitialize(132);
once = true;
}
- cc3000_wlan_init( CC3000_AsyncCallback,
+ cc3000_wlan_init(132, CC3000_AsyncCallback,
SendFirmwarePatch,
SendDriverPatch,
SendBootloaderPatch);
diff --git a/nuttx/configs/spark/composite/defconfig b/nuttx/configs/spark/composite/defconfig
index c310c8060..b2ee56a10 100644
--- a/nuttx/configs/spark/composite/defconfig
+++ b/nuttx/configs/spark/composite/defconfig
@@ -61,6 +61,7 @@ CONFIG_ARCH="arm"
#
# ARM Options
#
+# CONFIG_ARCH_CHIP_A1X is not set
# CONFIG_ARCH_CHIP_C5471 is not set
# CONFIG_ARCH_CHIP_CALYPSO is not set
# CONFIG_ARCH_CHIP_DM320 is not set
@@ -75,6 +76,7 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_NUC1XX is not set
# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
# CONFIG_ARCH_CHIP_SAM34 is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STR71X is not set
@@ -94,6 +96,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARCH_HAVE_FPU is not set
CONFIG_ARCH_HAVE_MPU=y
# CONFIG_ARMV7M_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
#
# ARMV7M Configuration Options
@@ -178,6 +181,11 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
# CONFIG_ARCH_CHIP_STM32F427V is not set
# CONFIG_ARCH_CHIP_STM32F427Z is not set
# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
# CONFIG_STM32_STM32L15XX is not set
# CONFIG_STM32_ENERGYLITE is not set
CONFIG_STM32_STM32F10XX=y
@@ -195,6 +203,8 @@ CONFIG_STM32_MEDIUMDENSITY=y
#
# STM32 Peripheral Support
#
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
# CONFIG_STM32_ADC1 is not set
# CONFIG_STM32_ADC2 is not set
# CONFIG_STM32_ADC3 is not set
@@ -271,10 +281,13 @@ CONFIG_STM32_SPI_DMA=y
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_VECNOTIRQ is not set
CONFIG_ARCH_DMA=y
-CONFIG_ARCH_IRQPRIO=y
+CONFIG_ARCH_HAVE_IRQPRIO=y
# CONFIG_CUSTOM_STACK is not set
# CONFIG_ADDRENV is not set
CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_STACKDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
@@ -286,8 +299,14 @@ CONFIG_ARCH_HAVE_RAMVECTORS=y
#
CONFIG_BOARD_LOOPSPERMSEC=5483
# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
CONFIG_ARCH_INTERRUPTSTACK=340
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
#
# Boot options
@@ -583,6 +602,8 @@ CONFIG_ARCH_HAVE_NET=y
# File system configuration
#
# CONFIG_DISABLE_MOUNTPOINT is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
# CONFIG_FS_RAMMAP is not set
CONFIG_FS_FAT=y
CONFIG_FAT_LCNAMES=y
@@ -777,6 +798,8 @@ CONFIG_EXAMPLES_NSH=y
# NSH Library
#
CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
CONFIG_NSH_BUILTIN_APPS=y
#
@@ -830,11 +853,15 @@ CONFIG_NSH_BUILTIN_APPS=y
#
# CONFIG_NSH_CMDOPT_DF_H is not set
CONFIG_NSH_CODECS_BUFSIZE=0
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_FILEIOSIZE=128
CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLESCRIPT=y
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_CONSOLE=y
# CONFIG_NSH_USBCONSOLE is not set
@@ -851,7 +878,12 @@ CONFIG_NSH_ARCHINIT=y
#
#
-# System NSH Add-Ons
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
#
#
@@ -890,6 +922,11 @@ CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
#
#
+# INI File Parser
+#
+# CONFIG_SYSTEM_INIFILE is not set
+
+#
# FLASH Program Installation
#
# CONFIG_SYSTEM_INSTALL is not set
@@ -897,6 +934,12 @@ CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
#
# FLASH Erase-all Command
#
+# CONFIG_SYSTEM_FLASH_ERASEALL is not set
+
+#
+# NxPlayer media player library / command Line
+#
+# CONFIG_SYSTEM_NXPLAYER is not set
#
# RAM test
@@ -935,8 +978,19 @@ CONFIG_SYSTEM_SYSINFO=y
# CONFIG_SYSTEM_USBMONITOR is not set
#
+# EMACS-like Command Line Editor
+#
+# CONFIG_SYSTEM_CLE is not set
+
+#
+# VI Work-Alike Editor
+#
+# CONFIG_SYSTEM_VI is not set
+
+#
# Stack Monitor
#
+# CONFIG_SYSTEM_STACKMONITOR is not set
#
# USB Mass Storage Device Commands
diff --git a/nuttx/configs/spark/src/up_io.c b/nuttx/configs/spark/src/up_io.c
new file mode 100644
index 000000000..2517746c1
--- /dev/null
+++ b/nuttx/configs/spark/src/up_io.c
@@ -0,0 +1,195 @@
+/****************************************************************************
+ * configs/spark/src/up_io.c
+ *
+ * Copyright (C) 2011-2014 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include <arch/board/board.h>
+#include "chip/stm32_tim.h"
+
+#include "spark.h"
+
+#ifndef CONFIG_CC3000_PROBES
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_leds
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+void up_leds(int r, int g ,int b, int freqs)
+{
+ long fosc = 72000000;
+ long prescale = 2048;
+ long p1s = fosc/prescale;
+ long p0p5s = p1s/2;
+ long p;
+
+ static struct stm32_tim_dev_s *tim1 = 0;
+
+ if (tim1 == 0)
+ {
+ tim1 = stm32_tim_init(1);
+ STM32_TIM_SETMODE(tim1, STM32_TIM_MODE_UP);
+ STM32_TIM_SETCLOCK(tim1, p1s-8);
+ STM32_TIM_SETPERIOD(tim1, p1s);
+ STM32_TIM_SETCOMPARE(tim1, 1, 0);
+ STM32_TIM_SETCOMPARE(tim1, 2, 0);
+ STM32_TIM_SETCOMPARE(tim1, 3, 0);
+ STM32_TIM_SETCHANNEL(tim1, 1, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
+ STM32_TIM_SETCHANNEL(tim1, 2, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
+ STM32_TIM_SETCHANNEL(tim1, 3, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
+ }
+
+ p = freqs == 0 ? p1s : p1s / freqs;
+ STM32_TIM_SETPERIOD(tim1, p);
+
+ p = freqs == 0 ? p1s + 1 : p0p5s / freqs;
+
+ STM32_TIM_SETCOMPARE(tim1, 2, (r * p) / 255);
+ STM32_TIM_SETCOMPARE(tim1, 1, (b * p) / 255);
+ STM32_TIM_SETCOMPARE(tim1, 3, (g * p) / 255);
+}
+
+/****************************************************************************
+ * Name: up_ioinit
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+void up_ioinit(void)
+{
+ /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
+ * configured for all pins.
+ */
+
+ up_leds(0,0,0,0);
+ stm32_configgpio(GPIO_A0); /* Probes */
+ stm32_configgpio(GPIO_A1); /* Probes */
+ stm32_configgpio(GPIO_A2); /* Smart Config */
+ stm32_configgpio(GPIO_A3); /* not used */
+ stm32_configgpio(GPIO_D0); /* Sw 1 */
+ stm32_configgpio(GPIO_D1); /* Sw 2 */
+ stm32_configgpio(GPIO_D2); /* Activate */
+}
+
+/****************************************************************************
+ * Name: up_read_inputs
+ *
+ * N.B The return state in true logic, the button polarity is dealt here in
+ *
+ ****************************************************************************/
+
+uint8_t up_read_inputs(void)
+{
+ uint8_t bits = 0;
+ bits |= stm32_gpioread(GPIO_D0) == 0 ? 1 : 0;
+ bits |= stm32_gpioread(GPIO_D1) == 0 ? 2 : 0;
+ bits |= stm32_gpioread(GPIO_A2) == 0 ? 4 : 0;
+ bits |= stm32_gpioread(GPIO_A3) == 0 ? 8 : 0;
+ return bits;
+}
+
+/****************************************************************************
+ * Name: up_write_outputs
+ *
+ * N.B The return state in true logic, the button polarity is dealt here in
+ *
+ ****************************************************************************/
+
+void up_write_outputs(int id, bool bits)
+{
+ if (id == 2)
+ {
+ stm32_gpiowrite(GPIO_D2, bits);
+ }
+ else if (id == 0)
+ {
+ stm32_gpiowrite(GPIO_A0, bits);
+ }
+ else if (id == 1)
+ {
+ stm32_gpiowrite(GPIO_A1, bits);
+ }
+}
+
+/****************************************************************************
+ * Name: up_irqio
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+xcpt_t up_irqio(int id, xcpt_t irqhandler)
+{
+ xcpt_t oldhandler = NULL;
+
+ /* The following should be atomic */
+
+ if (id == 0)
+ {
+ oldhandler = stm32_gpiosetevent(GPIO_D0, true, true, true, irqhandler);
+ }
+ else if (id == 1)
+ {
+ oldhandler = stm32_gpiosetevent(GPIO_D1, true, true, true, irqhandler);
+ }
+
+ return oldhandler;
+}
+#endif /* CONFIG_CC3000_PROBES */