Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts

14 files changed, 319 insertions, 244 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 8dcf73971..15dab15c5 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -5269,5 +5269,8 @@
 	  After initialization, the page table entries are modified so
 	  that DRAM is fully cache-able (2018-8-2).
 	* arch/arm/src/sama5/chip/sam_mpddrc.h:  Correct typos in the
-	  SAMA5 DDR controller register definitions (2013-9-2013).
-
+	  SAMA5 DDR controller register definitions (2013-8-2).
+	* arch/arm/src/sama5/sam_irq.c:  Correct handling of spurious
+	  interrupts (2013-8-3).
+	* arch/*/src/*/*_irq.c:  Standardize configuration variables used
+	  to enable interrupt controller debug output (2013-8-3).
diff --git a/nuttx/Kconfig b/nuttx/Kconfig
index ac1c68cc7..2afd9a1c4 100644
--- a/nuttx/Kconfig
+++ b/nuttx/Kconfig
@@ -327,64 +327,75 @@ config DEBUG_VERBOSE
 comment "Subsystem Debug Options"
 
 config DEBUG_MM
-	bool "Enable Memory Manager Debug Output"
+	bool "Memory Manager Debug Output"
 	default n
 	---help---
 		Enable memory management debug SYSLOG output (disabled by default)
 
 config DEBUG_SCHED
-	bool "Enable Scheduler Debug Output"
+	bool "Scheduler Debug Output"
 	default n
 	---help---
 		Enable OS debug SYSLOG output (disabled by default)
 
 config DEBUG_PAGING
-	bool "Enable Demand Paging Debug Output"
+	bool "Demand Paging Debug Output"
 	default n
 	depends on PAGING
 	---help---
 		Enable demand paging debug SYSLOG output (disabled by default)
 
 config DEBUG_NET
-	bool "Enable Network Debug Output"
+	bool "Network Debug Output"
 	default n
 	depends on NET
 	---help---
 		Enable network debug SYSLOG output (disabled by default)
 
 config DEBUG_USB
-	bool "Enable USB Debug Output"
+	bool "USB Debug Output"
 	default n
 	depends on USBDEV || USBHOST
 	---help---
 		Enable usb debug SYSLOG output (disabled by default)
 
 config DEBUG_FS
-	bool "Enable File System Debug Output"
+	bool "File System Debug Output"
 	default n
 	---help---
 		Enable file system debug SYSLOG output (disabled by default)
 
 config DEBUG_LIB
-	bool "Enable C Library Debug Output"
+	bool "C Library Debug Output"
 	default n
 	---help---
 		Enable C library debug SYSLOG output (disabled by default)
 
 config DEBUG_BINFMT
-	bool "Enable Binary Loader Debug Output"
+	bool "Binary Loader Debug Output"
 	default n
 	---help---
 		Enable binary loader debug SYSLOG output (disabled by default)
 
 config DEBUG_GRAPHICS
-	bool "Enable Graphics Debug Output"
+	bool "Graphics Debug Output"
 	default n
 	---help---
 		Enable NX graphics debug SYSLOG output (disabled by default)
 
+config DEBUG_IRQ
+	bool "Interrupt Controller Debug Output"
+	default n
+	---help---
+		Some (but not all) architectures support debug output to verify
+		interrupt controller logic.  If supported, then option will enable
+		that output.  This may interfere with normal operations!  You
+		should *not* enable interrupt controller debug unless you suspect
+		that here is a problem with that logic.  On some platforms, this
+		option may even cause crashes! Use with care!
+
 config DEBUG_SYSCALL
-	bool "Enable SYSCALL Debug Output"
+	bool "SYSCALL Debug Output"
 	default n
 	depends on NUTTX_KERNEL
 	---help---
@@ -394,7 +405,7 @@ config DEBUG_SYSCALL
 comment "Driver Debug Options"
 
 config DEBUG_LCD
-	bool "Enable Low-level LCD Debug Output"
+	bool "Low-level LCD Debug Output"
 	default n
 	depends on LCD
 	---help---
@@ -403,7 +414,7 @@ config DEBUG_LCD
 		may not be available for some boards.
 
 config DEBUG_LEDS
-	bool "Enable Low-level LED Debug Output"
+	bool "Low-level LED Debug Output"
 	default n
 	depends on ARCH_HAVE_LEDS
 	---help---
@@ -412,7 +423,7 @@ config DEBUG_LEDS
 		some boards.
 
 config DEBUG_INPUT
-	bool "Enable Input Device Debug Output"
+	bool "Input Device Debug Output"
 	default n
 	depends on INPUT
 	---help---
@@ -422,7 +433,7 @@ config DEBUG_INPUT
 		some boards.
 
 config DEBUG_ANALOG
-	bool "Enable Analog Device Debug Output"
+	bool "Analog Device Debug Output"
 	default n
 	---help---
 		Enable low level debug SYSLOG output from the analog device drivers
@@ -431,7 +442,7 @@ config DEBUG_ANALOG
 		for some MCUs.
 
 config DEBUG_I2C
-	bool "Enable I2C Debug Output"
+	bool "I2C Debug Output"
 	default n
 	depends on I2C
 	---help---
@@ -440,7 +451,7 @@ config DEBUG_I2C
 		be available for some MCUs.
 
 config DEBUG_SPI
-	bool "Enable SPI Debug Output"
+	bool "SPI Debug Output"
 	default n
 	depends on SPI
 	---help---
@@ -449,7 +460,7 @@ config DEBUG_SPI
 		be available for some MCUs.
 
 config DEBUG_CAN
-	bool "Enable CAN Debug Output"
+	bool "CAN Debug Output"
 	default n
 	depends on CAN
 	---help---
@@ -458,7 +469,7 @@ config DEBUG_CAN
 		be available for some MCUs.
 
 config DEBUG_SDIO
-	bool "Enable SDIO Debug Output"
+	bool "SDIO Debug Output"
 	default n
 	depends on MMCSD_SDIO
 	---help---
@@ -467,7 +478,7 @@ config DEBUG_SDIO
 		be available for some MCUs.
 
 config DEBUG_GPIO
-	bool "Enable GPIO Debug Output"
+	bool "GPIO Debug Output"
 	default n
 	---help---
 		Enable GPIO-releated debug SYSLOG output (disabled by default).
@@ -475,7 +486,7 @@ config DEBUG_GPIO
 		be available for some MCUs.
 
 config DEBUG_DMA
-	bool "Enable DMA Debug Output"
+	bool "DMA Debug Output"
 	default n
 	depends on ARCH_DMA
 	---help---
@@ -484,7 +495,7 @@ config DEBUG_DMA
 		be available for some MCUs.
 
 config DEBUG_WATCHDOG
-	bool "Enable Watchdog Timer Debug Output"
+	bool "Watchdog Timer Debug Output"
 	default n
 	depends on WATCHDOG
 	---help---
@@ -493,7 +504,7 @@ config DEBUG_WATCHDOG
 		be available for some MCUs.
 
 config DEBUG_AUDIO
-	bool "Enable Audio Device Debug Output"
+	bool "Audio Device Debug Output"
 	default n
 	---help---
 		Enable low level debug SYSLOG output from the audio subsystem and
@@ -503,7 +514,7 @@ config DEBUG_AUDIO
 endif
 
 config DEBUG_SYMBOLS
-	bool "Enable Debug Symbols"
+	bool "Generate Debug Symbols"
 	default n
 	---help---
 		Build without optimization and with debug symbols (needed
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_irq.c b/nuttx/arch/arm/src/kinetis/kinetis_irq.c
index f8b35656c..bf4585d9b 100644
--- a/nuttx/arch/arm/src/kinetis/kinetis_irq.c
+++ b/nuttx/arch/arm/src/kinetis/kinetis_irq.c
@@ -58,12 +58,6 @@
  * Definitions
  ****************************************************************************/
 
-/* Enable NVIC debug features that are probably only desireable during
- * bringup
- */
-
-#undef KINETIS_IRQ_DEBUG
-
 /* Get a 32-bit version of the default priority */
 
 #define DEFPRIORITY32 \
@@ -94,51 +88,49 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(KINETIS_IRQ_DEBUG) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void kinetis_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x %08x %08x %08x\n", 
-         getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE);
-         getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("  IRQ ENABLE: %08x %08x %08x %08x\n",
+        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE);
+        getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
         getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-        
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
         getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
         getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
-        
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
         getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
         getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
 #if NR_VECTORS > 111
-  slldbg("              %08x %08x\n", 
+  lldbg("              %08x %08x\n",
         getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
 #endif
 
@@ -423,7 +415,7 @@ void up_irqinitialize(void)
   /* Initialize logic to support a second level of interrupt decoding for
    * configured pin interrupts.
    */
- 
+
 #ifdef CONFIG_GPIO_IRQ
   kinetis_pinirqinitialize();
 #endif
diff --git a/nuttx/arch/arm/src/kl/kl_irq.c b/nuttx/arch/arm/src/kl/kl_irq.c
index 9e7d84e35..1e0477318 100644
--- a/nuttx/arch/arm/src/kl/kl_irq.c
+++ b/nuttx/arch/arm/src/kl/kl_irq.c
@@ -86,34 +86,34 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void kl_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
 
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  ISER:       %08x ICER:   %08x\n",
-         getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  slldbg("  ISPR:       %08x ICPR:   %08x\n",
-         getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  ISER:       %08x ICER:   %08x\n",
+        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  lldbg("  ISPR:       %08x ICPR:   %08x\n",
+        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
         getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
         getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
 
-  slldbg("SYSCON:\n");
-  slldbg("  CPUID:      %08x\n",
-         getreg32(ARMV6M_SYSCON_CPUID));
-  slldbg("  ICSR:       %08x AIRCR:  %08x\n",
-         getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  slldbg("  SCR:        %08x CCR:    %08x\n",
-         getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  slldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-         getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  lldbg("SYSCON:\n");
+  lldbg("  CPUID:      %08x\n",
+        getreg32(ARMV6M_SYSCON_CPUID));
+  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
+        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  lldbg("  SCR:        %08x CCR:    %08x\n",
+        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
+        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   irqrestore(flags);
 }
diff --git a/nuttx/arch/arm/src/lm/lm_irq.c b/nuttx/arch/arm/src/lm/lm_irq.c
index 920eee8af..8d7997a13 100644
--- a/nuttx/arch/arm/src/lm/lm_irq.c
+++ b/nuttx/arch/arm/src/lm/lm_irq.c
@@ -60,12 +60,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enable NVIC debug features that are probably only desireable during
- * bringup
- */
-
-#undef LM_IRQ_DEBUG
-
 /* Get a 32-bit version of the default priority */
 
 #define DEFPRIORITY32 \
@@ -96,32 +90,32 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(LM_IRQ_DEBUG) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void lm_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x %08x\n",
-         getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("  IRQ ENABLE: %08x %08x\n",
+        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
         getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
   irqrestore(flags);
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
index 770874717..8ab0a94d0 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -59,13 +59,6 @@
 /****************************************************************************
  * Definitions
  ****************************************************************************/
-
-/* Enable NVIC debug features that are probably only desireable during
- * bringup
- */
-
-#undef LPC17_IRQ_DEBUG
-
 /* Get a 32-bit version of the default priority */
 
 #define DEFPRIORITY32 \
@@ -96,31 +89,31 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(LPC17_IRQ_DEBUG) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void lpc17_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
         getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
   irqrestore(flags);
@@ -369,7 +362,7 @@ void up_irqinitialize(void)
   /* Initialize logic to support a second level of interrupt decoding for
    * GPIO pins.
    */
- 
+
 #ifdef CONFIG_GPIO_IRQ
   lpc17_gpioirqinitialize();
 #endif
diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c
index 7195092bb..fb316e0d2 100644
--- a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -94,35 +94,35 @@ extern unsigned _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void lpc43_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x %08x\n",
-         getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("  IRQ ENABLE: %08x %08x\n",
+        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
         getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  slldbg("              %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x\n",
         getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
         getreg32(NVIC_IRQ56_59_PRIORITY));
   irqrestore(flags);
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_irq.c b/nuttx/arch/arm/src/nuc1xx/nuc_irq.c
index 2ee01762d..b6198ff42 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_irq.c
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_irq.c
@@ -86,34 +86,34 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void nuc_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
 
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  ISER:       %08x ICER:   %08x\n",
-         getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  slldbg("  ISPR:       %08x ICPR:   %08x\n",
-         getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  ISER:       %08x ICER:   %08x\n",
+        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  lldbg("  ISPR:       %08x ICPR:   %08x\n",
+        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
         getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
         getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
 
-  slldbg("SYSCON:\n");
-  slldbg("  CPUID:      %08x\n",
-         getreg32(ARMV6M_SYSCON_CPUID));
-  slldbg("  ICSR:       %08x AIRCR:  %08x\n",
-         getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  slldbg("  SCR:        %08x CCR:    %08x\n",
-         getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  slldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-         getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  lldbg("SYSCON:\n");
+  lldbg("  CPUID:      %08x\n",
+        getreg32(ARMV6M_SYSCON_CPUID));
+  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
+        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  lldbg("  SCR:        %08x CCR:    %08x\n",
+        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
+        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   irqrestore(flags);
 }
diff --git a/nuttx/arch/arm/src/sam34/sam_irq.c b/nuttx/arch/arm/src/sam34/sam_irq.c
index 00c88a7c1..3ffe4d3f9 100644
--- a/nuttx/arch/arm/src/sam34/sam_irq.c
+++ b/nuttx/arch/arm/src/sam34/sam_irq.c
@@ -60,12 +60,6 @@
  * Definitions
  ****************************************************************************/
 
-/* Enable NVIC debug features that are probably only desireable during
- * bringup
- */
-
-#undef SAM_IRQ_DEBUG
-
 /* Get a 32-bit version of the default priority */
 
 #define DEFPRIORITY32 \
@@ -96,28 +90,28 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(SAM_IRQ_DEBUG) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void sam_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
+  lldbg("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n",
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
   irqrestore(flags);
diff --git a/nuttx/arch/arm/src/sama5/sam_boot.c b/nuttx/arch/arm/src/sama5/sam_boot.c
index 075e79593..ec8710d2a 100644
--- a/nuttx/arch/arm/src/sama5/sam_boot.c
+++ b/nuttx/arch/arm/src/sama5/sam_boot.c
@@ -58,6 +58,7 @@
 #include "chip/sam_wdt.h"
 #include "sam_clockconfig.h"
 #include "sam_lowputc.h"
+#include "sam_serial.h"
 
 /****************************************************************************
  * Pre-processor Definitions
diff --git a/nuttx/arch/arm/src/sama5/sam_irq.c b/nuttx/arch/arm/src/sama5/sam_irq.c
index 2003a289e..986e5d018 100644
--- a/nuttx/arch/arm/src/sama5/sam_irq.c
+++ b/nuttx/arch/arm/src/sama5/sam_irq.c
@@ -61,14 +61,14 @@
 #include "sam_irq.h"
 
 /****************************************************************************
- * Definitions
+ * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enable NVIC debug features that are probably only desireable during
- * bringup
- */
+/****************************************************************************
+ * Private types
+ ****************************************************************************/
 
-#undef SAM_IRQ_DEBUG
+typedef uint32_t *(*doirq_t)(int irq, uint32_t *regs);
 
 /****************************************************************************
  * Public Data
@@ -97,34 +97,34 @@ static const uint8_t g_srctype[SCRTYPE_NTYPES] =
  *
  ****************************************************************************/
 
-#if defined(SAM_IRQ_DEBUG) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void sam_dumpaic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("AIC (%s, irq=%d):\n", msg, irq);
+  lldbg("AIC (%s, irq=%d):\n", msg, irq);
 
   /* Select the register set associated with this irq */
 
-  putreg32(irq, SAM_AIC_SSR)
+  putreg32(irq, SAM_AIC_SSR);
 
   /* Then dump all of the (readable) register contents */
 
-  slldbg("  SSR: %08x  SMR: %08x  SVR: %08x  IVR: %08x\n",
-         getreg32(SAM_AIC_SSR),  getreg32(SAM_AIC_SMR),
-         getreg32(SAM_AIC_SVR),  getreg32(SAM_AIC_IVR));
-  slldbg("  FVR: %08x ISR: %08x\n",
-         getreg32(SAM_AIC_FVR),  getreg32(SAM_AIC_ISR));
-  slldbg("  IPR: %08x       %08x       %08x       %08x\n",
-         getreg32(SAM_AIC_IPR0), getreg32(SAM_AIC_IPR1),
-         getreg32(SAM_AIC_IPR2), getreg32(SAM_AIC_IPR3));
-  slldbg("  IMR: %08x CISR: %08x  SPU: %08x FFSR: %08x\n",
-         getreg32(SAM_AIC_IMR),  getreg32(SAM_AIC_CISR),
-         getreg32(SAM_AIC_SPU),  getreg32(SAM_AIC_FFSR));
-  slldbg("  DCR: %08x WPMR: %08x WPMR: %08x\n",
-         getreg32(SAM_AIC_DCR),  getreg32(SAM_AIC_WPMR),
-         getreg32(SAM_AIC_WPMR));
+  lldbg("  SSR: %08x  SMR: %08x  SVR: %08x  IVR: %08x\n",
+        getreg32(SAM_AIC_SSR),  getreg32(SAM_AIC_SMR),
+        getreg32(SAM_AIC_SVR),  getreg32(SAM_AIC_IVR));
+  lldbg("  FVR: %08x ISR: %08x\n",
+        getreg32(SAM_AIC_FVR),  getreg32(SAM_AIC_ISR));
+  lldbg("  IPR: %08x       %08x       %08x       %08x\n",
+        getreg32(SAM_AIC_IPR0), getreg32(SAM_AIC_IPR1),
+        getreg32(SAM_AIC_IPR2), getreg32(SAM_AIC_IPR3));
+  lldbg("  IMR: %08x CISR: %08x  SPU: %08x FFSR: %08x\n",
+        getreg32(SAM_AIC_IMR),  getreg32(SAM_AIC_CISR),
+        getreg32(SAM_AIC_SPU),  getreg32(SAM_AIC_FFSR));
+  lldbg("  DCR: %08x WPMR: %08x WPMR: %08x\n",
+        getreg32(SAM_AIC_DCR),  getreg32(SAM_AIC_WPMR),
+        getreg32(SAM_AIC_WPMR));
   irqrestore(flags);
 }
 #else
@@ -161,14 +161,16 @@ static void sam_dumpaic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-static void sam_spurious(void)
+static uint32_t *sam_spurious(int irq, uint32_t *regs)
 {
   /* This is probably irrevelant since true vectored interrupts are not used
    * in this implementation.  The value of AIC_IVR is ignored.
    */
 
-  lldbg("Spurious interrupt\n");
-  PANIC();
+#if defined(CONFIG_DEBUG_IRQ)
+  lldbg("Spurious interrupt: IRQ %d\n", irq);
+#endif
+  return regs;
 }
 
 /****************************************************************************
@@ -179,32 +181,17 @@ static void sam_spurious(void)
  *
  ****************************************************************************/
 
-static void sam_fiqhandler(void)
-{
-  /* This is probably irrevelant since true vectored interrupts are not used
-   * in this implementation.  The value of AIC_IVR is ignored.
-   */
-
-  lldbg("FIQ\n");
-  PANIC();
-}
-
-/****************************************************************************
- * Name: sam_irqhandler
- *
- * Description:
- *   Default IRQ interrupt handler.
- *
- ****************************************************************************/
-
-static void sam_irqhandler( void )
+static uint32_t *sam_fiqhandler(int irq, uint32_t *regs)
 {
-  /* This is probably irrevelant since true vectored interrupts are not used
-   * in this implementation.  The value of AIC_IVR is ignored.
+  /* This is probably irrevelant since FIQs are not used in this
+   * implementation.
    */
 
-  lldbg("IRQ\n");
+#if defined(CONFIG_DEBUG_IRQ) || defined(CONFIG_ARCH_STACKDUMP)
+  lldbg("FIQ?: IRQ: %d\n");
+#endif
   PANIC();
+  return regs; /* Won't get here */
 }
 
 /****************************************************************************
@@ -254,7 +241,7 @@ void up_irqinitialize(void)
         }
       else
         {
-          putreg32((uint32_t)sam_irqhandler, SAM_AIC_SVR);
+          putreg32((uint32_t)arm_doirq, SAM_AIC_SVR);
         }
 
       /* Set the default interrupt priority */
@@ -357,7 +344,8 @@ void up_irqinitialize(void)
 
 uint32_t *arm_decodeirq(uint32_t *regs)
 {
-  uint32_t regval;
+  uint32_t irqid;
+  uint32_t ivr;
 
  /* Paragraph 17.8.5 Protect Mode: "The Protect Mode permits reading the
   *   Interrupt Vector Register without performing the associated automatic
@@ -391,18 +379,18 @@ uint32_t *arm_decodeirq(uint32_t *regs)
 
   /* Write in the IVR to support Protect Mode */
 
-  regval = getreg32(SAM_AIC_IVR);
-  putreg32(regval, SAM_AIC_IVR);
+  ivr = getreg32(SAM_AIC_IVR);
+  putreg32(ivr, SAM_AIC_IVR);
 
   /* Get the IRQ number from the interrrupt status register.  NOTE that the
    * IRQ number is the same is the peripheral ID (PID).
    */
 
-  regval = getreg32(SAM_AIC_ISR) & AIC_ISR_MASK;
+  irqid = getreg32(SAM_AIC_ISR) & AIC_ISR_MASK;
 
   /* Dispatch the interrupt */
 
-  regs = arm_doirq((int)regval, regs);
+  regs = ((doirq_t)ivr)((int)irqid, regs);
 
   /* Acknowledge interrupt */
 
diff --git a/nuttx/arch/arm/src/sama5/sam_serial.h b/nuttx/arch/arm/src/sama5/sam_serial.h
new file mode 100644
index 000000000..68cde3231
--- /dev/null
+++ b/nuttx/arch/arm/src/sama5/sam_serial.h
@@ -0,0 +1,98 @@
+/****************************************************************************
+ * arch/arm/src/sama5/sam_serial.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAMA5_SAM_SERIAL_H
+#define __ARCH_ARM_SRC_SAMA5_SAM_SERIAL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level USART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.
+ *
+ ****************************************************************************/
+
+#ifdef USE_EARLYSERIALINIT
+void sam_earlyserialinit(void);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAMA5_SAM_SERIAL_H */
diff --git a/nuttx/arch/arm/src/stm32/stm32_irq.c b/nuttx/arch/arm/src/stm32/stm32_irq.c
index d1cd37e36..6c05cedbd 100644
--- a/nuttx/arch/arm/src/stm32/stm32_irq.c
+++ b/nuttx/arch/arm/src/stm32/stm32_irq.c
@@ -88,39 +88,39 @@ volatile uint32_t *current_regs;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ) && defined (CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_IRQ)
 static void stm32_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = irqsave();
-  slldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  slldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
+  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
+        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  slldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-         getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-         getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  slldbg("  IRQ ENABLE: %08x %08x %08x\n",
-         getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-         getreg32(NVIC_IRQ64_95_ENABLE));
-  slldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-         getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-         getreg32(NVIC_SYSH12_15_PRIORITY));
-  slldbg("  IRQ PRIO:   %08x %08x %08x %08x\n", 
+  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
+        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+        getreg32(NVIC_IRQ64_95_ENABLE));
+  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
+        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+        getreg32(NVIC_SYSH12_15_PRIORITY));
+  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
         getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
         getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
         getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  slldbg("              %08x %08x %08x %08x\n", 
+  lldbg("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
         getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
-  slldbg("              %08x\n", 
+  lldbg("              %08x\n",
         getreg32(NVIC_IRQ64_67_PRIORITY));
   irqrestore(flags);
 }
diff --git a/nuttx/configs/sama5d3x-ek/README.txt b/nuttx/configs/sama5d3x-ek/README.txt
index b67752680..0a9470226 100644
--- a/nuttx/configs/sama5d3x-ek/README.txt
+++ b/nuttx/configs/sama5d3x-ek/README.txt
@@ -927,12 +927,13 @@ Configurations
         That configuration runs out of internal SRAM and, as a result, this
         configuration needs to be recalibrated.
 
-      2013-8-31:  SDRAM configuration and RAM test usage are documented,
-        but only partially functional.  SDRAM is accessible but many regions
-        on the SDRAM fail the RAM test.  Most likely there is some error in
-        the SDRAM timing configuration.  I am also seeing occasional crashes
-        involving unexpected interrupts and the UART when running the RAM
-        test.  Not sure what to make of that yet
+      2013-8-3:  SDRAM configuration and RAM test usage have been verified
+        and are functional.  I not some issues now; Occassionally, SDRAM is
+        not functional on initial boot.  Or is initially not functional but
+        improves with accesses.  Clearly, more work needs to be done.
+
+        Here is another strange observation:  SDRAM accesses tend to
+        generate occasional spurious interrupts!  No idea why.
 
   ostest:
     This configuration directory, performs a simple OS test using