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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-26 12:28:32 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-26 12:28:32 -0600 |
| commit | cc125b60e0c11579b2feea5518e5972812f9e22a (patch) | |
| tree | c4604cf8749ee35040beb01dd15561486bc76a19 /nuttx/arch/arm/include/sam34/sam3u_irq.h | |
| parent | bc786f4e6534a2429138dfe95dc7ca1900b3ff2c (diff) | |
| download | nuttx-cc125b60e0c11579b2feea5518e5972812f9e22a.tar.gz nuttx-cc125b60e0c11579b2feea5518e5972812f9e22a.tar.bz2 nuttx-cc125b60e0c11579b2feea5518e5972812f9e22a.zip | |
Add support for SAM3X and 3A chips, interrupts, and peripheral IDs
Diffstat (limited to 'nuttx/arch/arm/include/sam34/sam3u_irq.h')
| -rw-r--r-- | nuttx/arch/arm/include/sam34/sam3u_irq.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/nuttx/arch/arm/include/sam34/sam3u_irq.h b/nuttx/arch/arm/include/sam34/sam3u_irq.h index e3e8aded7..f71d66883 100644 --- a/nuttx/arch/arm/include/sam34/sam3u_irq.h +++ b/nuttx/arch/arm/include/sam34/sam3u_irq.h @@ -120,7 +120,7 @@ /* GPIO interrupts (derived from SAM_IRQ_PIOA/B/C) */ #ifdef CONFIG_GPIOA_IRQ -# define SAM_IRQ_GPIOA_PINS (SAM_IRQ_EXTINT+SAM_IRQ_NEXTINT) +# define SAM_IRQ_GPIOA_PINS (SAM_IRQ_EXTINT + SAM_IRQ_NEXTINT) # define SAM_IRQ_PA0 (SAM_IRQ_GPIOA_PINS+0) /* GPIOA, PIN 0 */ # define SAM_IRQ_PA1 (SAM_IRQ_GPIOA_PINS+1) /* GPIOA, PIN 1 */ # define SAM_IRQ_PA2 (SAM_IRQ_GPIOA_PINS+2) /* GPIOA, PIN 2 */ @@ -159,7 +159,7 @@ #endif #ifdef CONFIG_GPIOB_IRQ -# define SAM_IRQ_GPIOB_PINS (SAM_IRQ_EXTINT+SAM_IRQ_NEXTINT+SAM_IRQ_GPIOA_PINS) +# define SAM_IRQ_GPIOB_PINS (SAM_IRQ_EXTINT + SAM_IRQ_NEXTINT + SAM_NGPIOAIRQS) # define SAM_IRQ_PB0 (SAM_IRQ_GPIOB_PINS+0) /* GPIOB, PIN 0 */ # define SAM_IRQ_PB1 (SAM_IRQ_GPIOB_PINS+1) /* GPIOB, PIN 1 */ # define SAM_IRQ_PB2 (SAM_IRQ_GPIOB_PINS+2) /* GPIOB, PIN 2 */ @@ -192,13 +192,13 @@ # define SAM_IRQ_PB29 (SAM_IRQ_GPIOB_PINS+29) /* GPIOB, PIN 29 */ # define SAM_IRQ_PB30 (SAM_IRQ_GPIOB_PINS+30) /* GPIOB, PIN 30 */ # define SAM_IRQ_PB31 (SAM_IRQ_GPIOB_PINS+31) /* GPIOB, PIN 31 */ -# define SAM_NGPIOAIRQS 32 +# define SAM_NGPIOBIRQS 32 #else # define SAM_NGPIOBIRQS 0 #endif #ifdef CONFIG_GPIOC_IRQ -# define SAM_IRQ_GPIOC_PINS (SAM_IRQ_EXTINT+SAM_IRQ_NEXTINT+SAM_IRQ_GPIOA_PINS+SAM_IRQ_GPIOB_PINS) +# define SAM_IRQ_GPIOC_PINS (SAM_IRQ_EXTINT + SAM_IRQ_NEXTINT + SAM_NGPIOAIRQS + SAM_NGPIOBIRQS) # define SAM_IRQ_PC0 (SAM_IRQ_GPIOC_PINS+0) /* GPIOC, PIN 0 */ # define SAM_IRQ_PC1 (SAM_IRQ_GPIOC_PINS+1) /* GPIOC, PIN 1 */ # define SAM_IRQ_PC2 (SAM_IRQ_GPIOC_PINS+2) /* GPIOC, PIN 2 */ @@ -231,15 +231,15 @@ # define SAM_IRQ_PC29 (SAM_IRQ_GPIOC_PINS+29) /* GPIOC, PIN 29 */ # define SAM_IRQ_PC30 (SAM_IRQ_GPIOC_PINS+30) /* GPIOC, PIN 30 */ # define SAM_IRQ_PC31 (SAM_IRQ_GPIOC_PINS+31) /* GPIOC, PIN 31 */ -# define SAM_NGPIOAIRQS 32 +# define SAM_NGPIOCIRQS 32 #else # define SAM_NGPIOCIRQS 0 #endif /* Total number of IRQ numbers */ -#define NR_IRQS (SAM_IRQ_EXTINT+SAM_IRQ_NEXTINT+\ - SAM_NGPIOAIRQS+SAM_NGPIOBIRQS+SAM_NGPIOCIRQS) +#define NR_IRQS (SAM_IRQ_EXTINT + SAM_IRQ_NEXTINT + \ + SAM_NGPIOAIRQS + SAM_NGPIOBIRQS + SAM_NGPIOCIRQS) /**************************************************************************************** * Public Types |