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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-08 22:49:55 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-08 22:49:55 +0000 |
| commit | 9064cebe7062c8ecf8151c9b3f46052df2f67efe (patch) | |
| tree | 8d6cd35b76b249f6dccfdb0fde41ea3a2a2e5d83 /nuttx/arch/arm/src/kinetis/kinetis_memorymap.h | |
| parent | dfbbfca267efc71ec1628837202a9fd4ab387442 (diff) | |
| download | nuttx-9064cebe7062c8ecf8151c9b3f46052df2f67efe.tar.gz nuttx-9064cebe7062c8ecf8151c9b3f46052df2f67efe.tar.bz2 nuttx-9064cebe7062c8ecf8151c9b3f46052df2f67efe.zip | |
Add Kinetis SIM header file
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3853 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/kinetis/kinetis_memorymap.h')
| -rwxr-xr-x | nuttx/arch/arm/src/kinetis/kinetis_memorymap.h | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h b/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h index e0dba8e85..2e576e3a0 100755 --- a/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h +++ b/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h @@ -161,10 +161,16 @@ # define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */ # define KINETIS_UART4_BASE 0x400ea000 /* UART4 */ # define KINETIS_UART5_BASE 0x400eb000 /* UART5 */ -# define KINETIS_XBAR_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general - * purpose input/output module that shares the - * crossbar switch slave port with the AIPS-Lite - * is accessed at this address. */ +# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general + * purpose input/output module that shares the + * crossbar switch slave port with the AIPS-Lite + * is accessed at this address. */ +# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6)) +# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */ +# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */ +# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */ +# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */ +# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */ /* Private Peripheral Bus (PPB) Memory Map ******************************************/ @@ -287,10 +293,16 @@ # define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */ # define KINETIS_UART4_BASE 0x400ea000 /* UART4 */ # define KINETIS_UART5_BASE 0x400eb000 /* UART5 */ -# define KINETIS_XBAR_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general - * purpose input/output module that shares the - * crossbar switch slave port with the AIPS-Lite - * is accessed at this address. */ +# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general + * purpose input/output module that shares the + * crossbar switch slave port with the AIPS-Lite + * is accessed at this address. */ +# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6)) +# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */ +# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */ +# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */ +# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */ +# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */ /* Private Peripheral Bus (PPB) Memory Map ******************************************/ |