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| author | Gregory Nutt <gnutt@nuttx.org> | 2014-11-16 06:43:08 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-11-16 06:43:08 -0600 |
| commit | 71ab30001a1a3e2297e64ae1b65b8b01b8a3ab4f (patch) | |
| tree | 54147f0bfcd6f1a3086928f3447df85d673a5158 /nuttx/arch/arm/src/sam34 | |
| parent | d4e92480e4f1957d5a567ce5af76846dc6419ed3 (diff) | |
| download | nuttx-71ab30001a1a3e2297e64ae1b65b8b01b8a3ab4f.tar.gz nuttx-71ab30001a1a3e2297e64ae1b65b8b01b8a3ab4f.tar.bz2 nuttx-71ab30001a1a3e2297e64ae1b65b8b01b8a3ab4f.zip | |
SAM3/4: Add missing SPI0 clock configuartion macro for the SAM4S
Diffstat (limited to 'nuttx/arch/arm/src/sam34')
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam4s_periphclks.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/sam34/sam4s_periphclks.h b/nuttx/arch/arm/src/sam34/sam4s_periphclks.h index e7d1db402..1477ef253 100644 --- a/nuttx/arch/arm/src/sam34/sam4s_periphclks.h +++ b/nuttx/arch/arm/src/sam34/sam4s_periphclks.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/sam34/sam4s_periphclks.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -75,6 +75,7 @@ #define sam_twi0_enableclk() sam_enableperiph0(SAM_PID_TWI0) #define sam_twi1_enableclk() sam_enableperiph0(SAM_PID_TWI1) #define sam_ssc_enableclk() sam_enableperiph0(SAM_PID_SSC) +#define sam_spi0_enableclk() sam_enableperiph0(SAM_PID_SPI0) #define sam_tc0_enableclk() sam_enableperiph0(SAM_PID_TC0) #define sam_tc1_enableclk() sam_enableperiph0(SAM_PID_TC1) #define sam_tc2_enableclk() sam_enableperiph0(SAM_PID_TC2) @@ -107,6 +108,7 @@ #define sam_hsmci_disableclk() sam_disableperiph0(SAM_PID_HSMCI) #define sam_twi0_disableclk() sam_disableperiph0(SAM_PID_TWI0) #define sam_twi1_disableclk() sam_disableperiph0(SAM_PID_TWI1) +#define sam_spi0_disableclk() sam_disableperiph0(SAM_PID_SPI0) #define sam_ssc_disableclk() sam_disableperiph0(SAM_PID_SSC) #define sam_tc0_disableclk() sam_disableperiph0(SAM_PID_TC0) #define sam_tc1_disableclk() sam_disableperiph0(SAM_PID_TC1) |