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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-22 16:19:59 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-22 16:19:59 +0000
commitf91a1aac610192984326a4d0e77796c1419f8ca1 (patch)
tree738775612118ff38be1b1816e2ce02d45d3211f2 /nuttx/arch
parentd27a58798955bad789da8f89acadf8c4341c2ecb (diff)
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Add a OS test kernel build configuration for the STM32F4Discovery board
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5775 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
-rw-r--r--nuttx/arch/arm/src/armv7-m/exc_return.h22
-rw-r--r--nuttx/arch/arm/src/kinetis/kinetis_vectors.S11
-rw-r--r--nuttx/arch/arm/src/lm/lm_vectors.S9
-rw-r--r--nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S9
-rw-r--r--nuttx/arch/arm/src/sam3u/sam3u_vectors.S9
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_allocateheap.c2
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_vectors.S10
7 files changed, 17 insertions, 55 deletions
diff --git a/nuttx/arch/arm/src/armv7-m/exc_return.h b/nuttx/arch/arm/src/armv7-m/exc_return.h
index 5f46dd071..9490a3c8a 100644
--- a/nuttx/arch/arm/src/armv7-m/exc_return.h
+++ b/nuttx/arch/arm/src/armv7-m/exc_return.h
@@ -94,10 +94,10 @@
*/
#if defined(CONFIG_ARMV7M_CMNVECTOR) && defined(CONFIG_ARCH_FPU)
-# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE)
+# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE)
#else
-# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \
- EXC_RETURN_THREAD_MODE)
+# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \
+ EXC_RETURN_THREAD_MODE)
#endif
/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
@@ -105,19 +105,11 @@
*/
#if defined(CONFIG_ARMV7M_CMNVECTOR) && defined(CONFIG_ARCH_FPU)
-# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \
- EXC_RETURN_PROCESS_STACK)
+# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \
+ EXC_RETURN_PROCESS_STACK)
#else
-# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \
- EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK)
-#endif
-
-/* In the kernel build is not selected, then all threads run in privileged thread
- * mode.
- */
-
-#ifdef CONFIG_NUTTX_KERNEL
-# define EXC_RETURN 0xfffffff9
+# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \
+ EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK)
#endif
/************************Th************************************************************
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_vectors.S b/nuttx/arch/arm/src/kinetis/kinetis_vectors.S
index 11ac46221..055841d5a 100644
--- a/nuttx/arch/arm/src/kinetis/kinetis_vectors.S
+++ b/nuttx/arch/arm/src/kinetis/kinetis_vectors.S
@@ -41,6 +41,8 @@
#include <nuttx/config.h>
#include <arch/irq.h>
+#include "exc_return.h"
+
/************************************************************************************************
* Preprocessor Definitions
************************************************************************************************/
@@ -59,13 +61,6 @@
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
-/* The Cortex-M4 return from interrupt is unusual. We provide the following special
- * address to the BX instruction. The particular value also forces a return to
- * thread mode and covers state from the main stack point, the MSP (vs. the MSP).
- */
-
-#define EXC_RETURN 0xfffffff9
-
/************************************************************************************************
* Global Symbols
************************************************************************************************/
@@ -690,7 +685,7 @@ kinetis_common:
* actually occurs with interrupts still disabled).
*/
- ldr r14, =EXC_RETURN /* Load the special value */
+ ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
diff --git a/nuttx/arch/arm/src/lm/lm_vectors.S b/nuttx/arch/arm/src/lm/lm_vectors.S
index 0f4300065..4459d49a7 100644
--- a/nuttx/arch/arm/src/lm/lm_vectors.S
+++ b/nuttx/arch/arm/src/lm/lm_vectors.S
@@ -60,13 +60,6 @@
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
-/* The Cortex-M3 return from interrupt is unusual. We provide the following special
- * address to the BX instruction. The particular value also forces a return to
- * thread mode and covers state from the main stack point, the MSP (vs. the MSP).
- */
-
-#define EXC_RETURN 0xfffffff9
-
/************************************************************************************
* Global Symbols
************************************************************************************/
@@ -288,7 +281,7 @@ lm_irqcommon:
* actually occurs with interrupts still disabled).
*/
- ldr r14, =EXC_RETURN /* Load the special value */
+ ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S b/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S
index 06b6afdf6..569559079 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S
@@ -64,13 +64,6 @@
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
-/* The Cortex-M3 return from interrupt is unusual. We provide the following special
- * address to the BX instruction. The particular value also forces a return to
- * thread mode and covers state from the main stack point, the MSP (vs. the MSP).
- */
-
-#define EXC_RETURN 0xfffffff9
-
/************************************************************************************************
* Global Symbols
************************************************************************************************/
@@ -378,7 +371,7 @@ lpc17_common:
* actually occurs with interrupts still disabled).
*/
- ldr r14, =EXC_RETURN /* Load the special value */
+ ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_vectors.S b/nuttx/arch/arm/src/sam3u/sam3u_vectors.S
index baaeb54b9..f1d85b8b8 100644
--- a/nuttx/arch/arm/src/sam3u/sam3u_vectors.S
+++ b/nuttx/arch/arm/src/sam3u/sam3u_vectors.S
@@ -65,13 +65,6 @@
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
-/* The Cortex-M3 return from interrupt is unusual. We provide the following special
- * address to the BX instruction. The particular value also forces a return to
- * thread mode and covers state from the main stack point, the MSP (vs. the MSP).
- */
-
-#define EXC_RETURN 0xfffffff9
-
/************************************************************************************************
* Global Symbols
************************************************************************************************/
@@ -406,7 +399,7 @@ sam3u_common:
* actually occurs with interrupts still disabled).
*/
- ldr r14, =EXC_RETURN /* Load the special value */
+ ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
diff --git a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
index 3eed90dd4..e6ba2b947 100644
--- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
@@ -48,8 +48,10 @@
#include <arch/board/board.h>
#include "chip.h"
+#include "mpu.h"
#include "up_arch.h"
#include "up_internal.h"
+#include "stm32_mpuinit.h"
/****************************************************************************
* Private Definitions
diff --git a/nuttx/arch/arm/src/stm32/stm32_vectors.S b/nuttx/arch/arm/src/stm32/stm32_vectors.S
index c81ae74f5..6ecd92b74 100644
--- a/nuttx/arch/arm/src/stm32/stm32_vectors.S
+++ b/nuttx/arch/arm/src/stm32/stm32_vectors.S
@@ -43,6 +43,7 @@
#include <arch/irq.h>
#include "chip.h"
+#include "exc_return.h"
/************************************************************************************
* Configuration
@@ -72,13 +73,6 @@
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
-/* The Cortex-M3 return from interrupt is unusual. We provide the following special
- * address to the BX instruction. The particular value also forces a return to
- * thread mode and covers state from the main stack point, the MSP (vs. the MSP).
- */
-
-#define EXC_RETURN 0xfffffff9
-
/************************************************************************************
* Global Symbols
************************************************************************************/
@@ -387,7 +381,7 @@ stm32_common:
* actually occurs with interrupts still disabled).
*/
- ldr r14, =EXC_RETURN /* Load the special value */
+ ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */