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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-12-30 16:39:25 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-12-30 16:39:25 +0000
commita5a88db827fbaca1058ce3fd6b4784bd9ab03073 (patch)
tree52b262f0636298b3ae030a2bddc7499ac5232f37 /nuttx/configs/zp214xpa
parentdfbc56054f377761c50a1a7453ed00a228fa9766 (diff)
downloadnuttx-a5a88db827fbaca1058ce3fd6b4784bd9ab03073.tar.gz
nuttx-a5a88db827fbaca1058ce3fd6b4784bd9ab03073.tar.bz2
nuttx-a5a88db827fbaca1058ce3fd6b4784bd9ab03073.zip
Add ZP213X/4XPA nxlines configuration (needs a little more work)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5466 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/zp214xpa')
-rw-r--r--nuttx/configs/zp214xpa/README.txt376
-rw-r--r--nuttx/configs/zp214xpa/nxlines/Make.defs128
-rw-r--r--nuttx/configs/zp214xpa/nxlines/defconfig606
-rwxr-xr-xnuttx/configs/zp214xpa/nxlines/setenv.sh65
-rw-r--r--nuttx/configs/zp214xpa/src/Makefile4
-rw-r--r--nuttx/configs/zp214xpa/src/up_spi1.c644
-rw-r--r--nuttx/configs/zp214xpa/src/up_ug2864ambag01.c177
-rwxr-xr-xnuttx/configs/zp214xpa/tools/olimex.cfg62
-rwxr-xr-xnuttx/configs/zp214xpa/tools/oocd.sh52
-rw-r--r--nuttx/configs/zp214xpa/tools/usb-repair.txt25
10 files changed, 2053 insertions, 86 deletions
diff --git a/nuttx/configs/zp214xpa/README.txt b/nuttx/configs/zp214xpa/README.txt
index 6fd7bfba9..9f577b98d 100644
--- a/nuttx/configs/zp214xpa/README.txt
+++ b/nuttx/configs/zp214xpa/README.txt
@@ -9,114 +9,294 @@ Contents
o MCU Connections
o Serial Console
+ o Using OpenOCD and GDB with an FT2232 JTAG emulator
o Configurations
MCU Connections:
================
-Module Socket:
---------------
-PIN NAME PIN NAME
- 1 VBAT 56 VCC
- 2 3V3 55 Vusb
- 3 VREF 54 3V3
- 4 P0.0 53 RESET
- 5 P0.1 52 P1.31
- 6 P0.2 51 P1.30
- 7 P0.3 50 P1.29
- 8 P0.4 49 P1.28
- 9 P0.5 48 P1.27
-10 P0.6 47 P1.26
-11 P0.7 46 P1.25
-12 P0.8 45 P1.24
-13 P0.9 44 P1.23
-14 P0.10 43 P1.22
-15 P0.11 42 P1.21
-16 P0.12 41 P1.20
-17 P0.13 40 P1.19
-18 P0.14 39 P1.18
-19 P0.15 38 P1.17
-20 P0.16 37 P1.16
-21 P0.17 36 P0.31
-22 P0.18 35 P0.30
-23 P0.19 34 P0.29
-24 P0.20 33 P0.28
-25 P0.21 32 P0.27
-26 P0.22 31 P0.26
-27 P0.23 30 P0.25
-28 GND 29 GND
-
-JTAG Debug:
------------
-PIN NAME PIN NAME
- 1 VCC1 2 3V3
- 3 P1.31 NTRST 4 GND
- 5 P1.28 TDI 6 GND
- 7 P1.30 TMS 8 GND
- 9 P1.29 TCK 10 GND
-11 P1.26 RTCK 12 GND
-13 P1.27 TDO 14 GND
-15 RESET NRTS 16 GND
-17 N/C NC0 18 GND
-19 N/C NC1 20 GND
-
-Z28160 Net Module:
-------------------
-PIN NAME PIN NAME
- 1 P0.7 /CS 10 3V3 VCC
- 2 P0.4 SCK 9 P1.24 RST
- 3 P0.6 SI 8 N/C CLKOUT
- 4 P0.5 SO 7 INT P1.25
- 5 GND 6 N/C WOL
-
-SPI LCD:
---------
-PIN NAME
- 1 3V3 3V3
- 2 VCC 5V
- 3 P0.18 RESET(DO)
- 4 P0.19 DI
- 5 P0.20 CS
- 6 P0.17 SCK
- 7 P0.23 A0(RESET)
- 8 N/C LED-
- 9 N/C LED+(BL)
-10 GND GND
-
-USB Interface:
---------------
-Vusb, P0.26, P0.27
+The ZP213X/4XPA board is no more than an LPC2148, crystals,
+USB device and several connectors.
+
+ Module Socket:
+ --------------
+ PIN NAME PIN NAME
+ 1 VBAT 56 VCC
+ 2 3V3 55 Vusb
+ 3 VREF 54 3V3
+ 4 P0.0 53 RESET
+ 5 P0.1 52 P1.31
+ 6 P0.2 51 P1.30
+ 7 P0.3 50 P1.29
+ 8 P0.4 49 P1.28
+ 9 P0.5 48 P1.27
+ 10 P0.6 47 P1.26
+ 11 P0.7 46 P1.25
+ 12 P0.8 45 P1.24
+ 13 P0.9 44 P1.23
+ 14 P0.10 43 P1.22
+ 15 P0.11 42 P1.21
+ 16 P0.12 41 P1.20
+ 17 P0.13 40 P1.19
+ 18 P0.14 39 P1.18
+ 19 P0.15 38 P1.17
+ 20 P0.16 37 P1.16
+ 21 P0.17 36 P0.31
+ 22 P0.18 35 P0.30
+ 23 P0.19 34 P0.29
+ 24 P0.20 33 P0.28
+ 25 P0.21 32 P0.27
+ 26 P0.22 31 P0.26
+ 27 P0.23 30 P0.25
+ 28 GND 29 GND
+
+ JTAG Debug:
+ -----------
+ PIN NAME PIN NAME
+ 1 VCC1 2 3V3
+ 3 P1.31 NTRST 4 GND
+ 5 P1.28 TDI 6 GND
+ 7 P1.30 TMS 8 GND
+ 9 P1.29 TCK 10 GND
+ 11 P1.26 RTCK 12 GND
+ 13 P1.27 TDO 14 GND
+ 15 RESET NRTS 16 GND
+ 17 N/C NC0 18 GND
+ 19 N/C NC1 20 GND
+
+ Z28160 Net Module:
+ ------------------
+ PIN NAME PIN NAME
+ 1 P0.7 /CS 10 3V3 VCC
+ 2 P0.4 SCK 9 P1.24 RST
+ 3 P0.6 SI 8 N/C CLKOUT
+ 4 P0.5 SO 7 INT P1.25
+ 5 GND 6 N/C WOL
+
+ SPI LCD:
+ --------
+ PIN NAME
+ 1 3V3 3V3
+ 2 VCC 5V
+ 3 P0.18 RESET(DO)
+ 4 P0.19 DI
+ 5 P0.20 CS
+ 6 P0.17 SCK
+ 7 P0.23 A0(RESET)
+ 8 N/C LED-
+ 9 N/C LED+(BL)
+ 10 GND GND
+
+ USB Interface:
+ --------------
+ Vusb, P0.26, P0.27
Serial Console:
===============
-Both UART0 and UART1 are always enabled. UART0 is configured to be the
-serial console in these configurations.
+ Both UART0 and UART1 are always enabled. UART0 is configured to be the
+ serial console in these configurations.
+
+ P0.0/TXD0/PWM1 Module Socket, Pin 4
+ P0.1/RxD0/PWM3/EINT0 Module Socket, Pin 5
+
+ P0.8/TXD1/PWM4/AD1.1 Module Socket, Pin 12
+ P0.9/RxD1/PWM6/EINT3 Module Socket, Pin 13
+
+LCD Interface
+=============
+
+ PIN NAME PIN CONFIGURATION
+ 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 RESET - General purpose output
+ 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 DI - Alternate function 2
+ 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output
+ 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2
+ 7 A0 P0.23/VBUS - General purpose output
+
+ENC29J60 Interface
+==================
+
+ PIN NAME PIN CONFIGURATION
+ 1 /CS P0.7/SSEL0/PWM2/EINT2 - General purpose output
+ 2 SCK P0.4/SCK0/CAP0.1/AD0.6 - Alternate function 1
+ 3 SI P0.6/MOSI0/CAP0.2/AD1.0 - Alternate function 1
+ 4 SO P0.5/MISO0/MAT0.1/AD0.7 - Alternate function 1
+ 7 INT P1.25/EXTIN0 - Alternal function 1
+ 9 RST P1.24/TRACECLK - General purpose output
+
+Using OpenOCD and GDB with an FT2232 JTAG emulator
+==================================================
+
+ Downloading OpenOCD
+
+ You can get information about OpenOCD here: http://openocd.berlios.de/web/
+ and you can download it from here. http://sourceforge.net/projects/openocd/files/.
+ To get the latest OpenOCD with more mature lpc214x, you have to download
+ from the GIT archive.
+
+ git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
+
+ At present, there is only the older, frozen 0.4.0 version. These, of course,
+ may have changed since I wrote this.
+
+ Building OpenOCD under Cygwin:
+
+ You can build OpenOCD for Windows using the Cygwin tools. Below are a
+ few notes that worked as of November 7, 2010. Things may have changed
+ by the time you read this, but perhaps the following will be helpful to
+ you:
+
+ 1. Install Cygwin (http://www.cygwin.com/). My recommendation is to install
+ everything. There are many tools you will need and it is best just to
+ waste a little disk space and have everthing you need. Everything will
+ require a couple of gigbytes of disk space.
+
+ 2. Create a directory /home/OpenOCD.
+
+ 3. Get the FT2232 drivr from http://www.ftdichip.com/Drivers/D2XX.htm and
+ extract it into /home/OpenOCD/ftd2xx
+
+ $ pwd
+ /home/OpenOCD
+ $ ls
+ CDM20802 WHQL Certified.zip
+ $ mkdir ftd2xx
+ $ cd ftd2xx
+ $ unzip ..CDM20802\ WHQL\ Certified.zip
+ Archive: CDM20802 WHQL Certified.zip
+ ...
+
+ 3. Get the latest OpenOCD source
+
+ $ pwd
+ /home/OpenOCD
+ $ git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
+
+ You will then have the source code in /home/OpenOCD/openocd
+
+ 4. Build OpenOCD for the FT22322 interface
+
+ $ pwd
+ /home/OpenOCD/openocd
+ $ ./bootstrap
+
+ Jim is a tiny version of the Tcl scripting language. It is needed
+ by more recent versions of OpenOCD. Build libjim.a using the following
+ instructions:
+
+ $ git submodule init
+ $ git submodule update
+ $ cd jimtcl
+ $ ./configure --with-jim-ext=nvp
+ $ make
+ $ make install
+
+ Configure OpenOCD:
+
+ $ ./configure --enable-maintainer-mode --disable-werror --disable-shared \
+ --enable-ft2232_ftd2xx --with-ftd2xx-win32-zipdir=/home/OpenOCD/ftd2xx \
+ LDFLAGS="-L/home/OpenOCD/openocd/jimtcl"
+
+ Then build OpenOCD and its HTML documentation:
+
+ $ make
+ $ make html
+
+ The result of the first make will be the "openocd.exe" will be
+ created in the folder /home/openocd/src. The following command
+ will install OpenOCD to a standard location (/usr/local/bin)
+ using using this command:
+
+ $ make install
+
+ Helper Scripts.
+
+ I have been using the Olimex ARM-USB-OCD JTAG debugger with the
+ ZP213X/4XPA. OpenOCD requires a configuration file. I keep the
+ one I used last here:
+
+ configs/zpa214xpa/tools/olimex.cfg
+
+ However, the "correct" configuration script to use with OpenOCD may
+ change as the features of OpenOCD evolve. So you should at least
+ compare that olimex.cfg file with configuration files in
+ /usr/local/share/openocd/scripts/target (or /home/OpenOCD/openocd/tcl/target).
+
+ There is also a script on the tools/ directory that I use to start
+ the OpenOCD daemon on my system called oocd.sh. That script will
+ probably require some modifications to work in another environment:
+
+ - Possibly the value of OPENOCD_PATH and TARGET_PATH
+ - It assumes that the correct script to use is the one at
+ configs/zp214xpa/tools/olimex.cfg
-P0.0/TXD0/PWM1 Module Socket, Pin 4
-P0.1/RxD0/PWM3/EINT0 Module Socket, Pin 5
+ Starting OpenOCD
-P0.8/TXD1/PWM4/AD1.1 Module Socket, Pin 12
-P0.9/RxD1/PWM6/EINT3 Module Socket, Pin 13
+ Then you should be able to start the OpenOCD daemon like:
+
+ configs/zp214xpa/tools/oocd.sh $PWD
+
+ If you use the setenv.sh file, that the path to oocd.sh will be added
+ to your PATH environment variabl. So, in that case, the command simplifies
+ to just:
+
+ oocd.sh $PWD
+
+ Where it is assumed that you are executing oocd.sh from the top-level
+ directory where NuttX is installed. $PWD will be the path to the
+ top-level NuttX directory.
+
+ Connecting GDB
+
+ Once the OpenOCD daemon has been started, you can connect to it via
+ GDB using the following GDB command:
+
+ arm-nuttx-elf-gdb
+ (gdb) target remote localhost:3333
+
+ NOTE: The name of your GDB program may differ. For example, with the
+ CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb.
+
+ After starting GDB, you can load the NuttX ELF file:
+
+ (gdb) symbol-file nuttx
+ (gdb) load nuttx
+
+ NOTES:
+ 1. Loading the symbol-file is only useful if you have built NuttX to
+ include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the
+ .config file).
+
+ OpenOCD will support several special 'monitor' commands. These
+ GDB commands will send comments to the OpenOCD monitor. Here
+ are a couple that you will need to use:
+
+ (gdb) monitor reset
+ (gdb) monitor halt
+
+ NOTES:
+ 1. The MCU must be halted using 'mon halt' prior to loading code.
+ 2. Reset will restart the processor after loading code.
+ 3. The 'monitor' command can be abbreviated as just 'mon'.
Configurations:
===============
-Each NXP LPC214x configuration is maintained in a sudirectory and
-can be selected as follow:
+ Each NXP LPC214x configuration is maintained in a sudirectory and
+ can be selected as follow:
cd tools
./configure.sh zp214xpa/<subdir>
cd -
. ./setenv.sh
-Where <subdir> is one of the following:
+ Where <subdir> is one of the following:
-nsh:
-----
+ nsh:
+ ----
- Configures the NuttShell (nsh) located at examples/nsh. The
- Configuration enables only the serial NSH interfaces.
+ Configures the NuttShell (nsh) located at examples/nsh. The
+ Configuration enables only the serial NSH interfaces.
NOTES:
@@ -131,6 +311,30 @@ nsh:
2. Default platform/toolchain:
- CONFIG_HOST_LINUX=y : Windows
+ CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too).
+ CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : Buildroot (arm-nuttx-elf-gcc)
+ CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary
+
+ nxlines:
+ --------
+
+ This is the apps/examples/nxlines test using the UG_2864AMBAG01 board
+ from The0.net that plugs into the "SPI LCD" connector on the ZP3X4XPA
+ board.
+
+ NOTES:
+
+ 1. This configuration uses the mconf-based configuration tool. To
+ change this configuration using that tool, you should:
+
+ a. Build and install the mconf tool. See nuttx/README.txt and
+ misc/tools/
+
+ b. Execute 'make menuconfig' in nuttx/ in order to start the
+ reconfiguration process.
+
+ 2. Default platform/toolchain:
+
+ CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too).
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : Buildroot (arm-nuttx-elf-gcc)
CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary
diff --git a/nuttx/configs/zp214xpa/nxlines/Make.defs b/nuttx/configs/zp214xpa/nxlines/Make.defs
new file mode 100644
index 000000000..274eb8d72
--- /dev/null
+++ b/nuttx/configs/zp214xpa/nxlines/Make.defs
@@ -0,0 +1,128 @@
+##############################################################################
+# configs/zp214xpa/nxlines/Make.defs
+#
+# Copyright (C) 2012 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+##############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+
+# The default value for CROSSDEV can be overridden from the make command line:
+# make -- Will build for the NuttX buildroot toolchain
+# make CROSSDEV=arm-eabi- -- Will build for the devkitARM toolchain
+# make CROSSDEV=arm-none-eabi- -- Will build for the CodeSourcery toolchain
+# make CROSSDEV=arm-nuttx-elf- -- Will build for the NuttX buildroot toolchain
+
+CROSSDEV = arm-nuttx-elf-
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"}
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(ARCHCCMAJOR),4)
+ifneq ($(HOSTOS),Cygwin)
+OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment
+endif
+endif
+
+ifeq ($(CROSSDEV),arm-nuttx-elf-)
+ MKDEP = $(TOPDIR)/tools/mkdeps.sh
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
+ MAXOPTIMIZATION = -Os
+else
+ WINTOOL = y
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
+ MAXOPTIMIZATION = -O2
+endif
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+else
+ ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ifeq ($(ARCHCCMAJOR),4)
+ ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft
+else
+ ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
+ $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
diff --git a/nuttx/configs/zp214xpa/nxlines/defconfig b/nuttx/configs/zp214xpa/nxlines/defconfig
new file mode 100644
index 000000000..03a6bf72c
--- /dev/null
+++ b/nuttx/configs/zp214xpa/nxlines/defconfig
@@ -0,0 +1,606 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+CONFIG_NUTTX_NEWCONFIG=y
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_8051 is not set
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_IMX is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_LM3S is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+CONFIG_ARCH_CHIP_LPC214X=y
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_SAM3U is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+CONFIG_ARCH_ARM7TDMI=y
+CONFIG_ARCH_FAMILY="arm"
+CONFIG_ARCH_CHIP="lpc214x"
+CONFIG_ARCH_HAVE_LOWVECTORS=y
+# CONFIG_ARCH_LOWVECTORS is not set
+CONFIG_BOARD_LOOPSPERMSEC=3270
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# ARM Configuration Options
+#
+# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARM_TOOLCHAIN_GNU_EABI=y
+
+#
+# LPC214x Configuration Options
+#
+CONFIG_ARCH_CHIP_LPC2148=y
+
+#
+# LPC214x Initialization Options
+#
+# CONFIG_EXTMEM_MODE is not set
+# CONFIG_RAM_MODE is not set
+CONFIG_DEFAULT_MODE=y
+CONFIG_CODE_BASE=0x00000000
+CONFIG_PLL_SETUP=y
+CONFIG_MAM_SETUP=y
+CONFIG_APBDIV_SETUP=y
+CONFIG_APBDIV_VALUE=1
+# CONFIG_EMC_SETUP is not set
+# CONFIG_BCFG0_SETUP is not set
+# CONFIG_BCFG1_SETUP is not set
+# CONFIG_BCFG2_SETUP is not set
+# CONFIG_BCFG3_SETUP is not set
+CONFIG_ADC_SETUP=y
+
+#
+# LPC214x Peripheral Support
+#
+CONFIG_LPC214X_UART0=y
+CONFIG_LPC214X_UART1=y
+# CONFIG_LPC214x_FIO is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_DMA is not set
+# CONFIG_ARCH_IRQPRIO is not set
+# CONFIG_CUSTOM_STACK is not set
+# CONFIG_ADDRENV is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+
+#
+# Board Settings
+#
+CONFIG_DRAM_START=0x40000000
+CONFIG_DRAM_SIZE=32768
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_MCU123 is not set
+CONFIG_ARCH_BOARD_ZP214XPA=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="zp214xpa"
+
+#
+# Common Board Options
+#
+
+#
+# Board-Specific Options
+#
+
+#
+# RTOS Features
+#
+CONFIG_MSEC_PER_TICK=10
+CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_INSTRUMENTATION is not set
+CONFIG_TASK_NAME_SIZE=0
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2008
+CONFIG_START_MONTH=10
+CONFIG_START_DAY=1
+CONFIG_DEV_CONSOLE=y
+# CONFIG_MUTEX_TYPES is not set
+# CONFIG_PRIORITY_INHERITANCE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_WAITPID is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+CONFIG_USER_ENTRYPOINT="nxlines_main"
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_CLOCK is not set
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_DISABLE_ENVIRON is not set
+CONFIG_DISABLE_POLL=y
+
+#
+# Sizes of configurable things (0 disables)
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+
+#
+# Device Drivers
+#
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_LOOP is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_PWM is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_OWNBUS is not set
+# CONFIG_SPI_EXCHANGE is not set
+CONFIG_SPI_CMDDATA=y
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+CONFIG_LCD=y
+# CONFIG_LCD_NOGETRUN is not set
+CONFIG_LCD_MAXCONTRAST=255
+CONFIG_LCD_MAXPOWER=1
+# CONFIG_LCD_P14201 is not set
+# CONFIG_LCD_NOKIA6100 is not set
+# CONFIG_LCD_UG9664HSWAG01 is not set
+CONFIG_LCD_UG2864AMBAG01=y
+CONFIG_UG2864AMBAG01_SPIMODE=3
+CONFIG_UG2864AMBAG01_FREQUENCY=3500000
+CONFIG_UG2864AMBAG01_NINTERFACES=1
+# CONFIG_LCD_SSD1289 is not set
+CONFIG_LCD_LANDSCAPE=y
+# CONFIG_LCD_PORTRAIT is not set
+# CONFIG_LCD_RPORTRAIT is not set
+# CONFIG_LCD_RLANDSCAPE is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MTD is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_16550_UART is not set
+CONFIG_ARCH_HAVE_UART0=y
+CONFIG_ARCH_HAVE_UART1=y
+CONFIG_MCU_SERIAL=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=38400
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=38400
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+
+#
+# Networking Support
+#
+# CONFIG_NET is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG is not set
+
+#
+# Graphics Support
+#
+CONFIG_NX=y
+CONFIG_NX_LCDDRIVER=y
+CONFIG_NX_NPLANES=1
+CONFIG_NX_WRITEONLY=y
+
+#
+# Supported Pixel Depths
+#
+# CONFIG_NX_DISABLE_1BPP is not set
+CONFIG_NX_DISABLE_2BPP=y
+CONFIG_NX_DISABLE_4BPP=y
+CONFIG_NX_DISABLE_8BPP=y
+CONFIG_NX_DISABLE_16BPP=y
+CONFIG_NX_DISABLE_24BPP=y
+CONFIG_NX_DISABLE_32BPP=y
+CONFIG_NX_PACKEDMSFIRST=y
+
+#
+# Input Devices
+#
+# CONFIG_NX_MOUSE is not set
+# CONFIG_NX_KBD is not set
+
+#
+# Framed Window Borders
+#
+CONFIG_NXTK_BORDERWIDTH=2
+CONFIG_NXTK_BORDERCOLOR1=0x01
+CONFIG_NXTK_BORDERCOLOR2=0x01
+CONFIG_NXTK_BORDERCOLOR3=0x01
+# CONFIG_NXTK_AUTORAISE is not set
+
+#
+# Font Selections
+#
+CONFIG_NXFONTS_CHARBITS=7
+CONFIG_NXFONT_MONO5X8=y
+# CONFIG_NXFONT_SANS17X22 is not set
+# CONFIG_NXFONT_SANS20X26 is not set
+# CONFIG_NXFONT_SANS23X27 is not set
+# CONFIG_NXFONT_SANS22X29 is not set
+# CONFIG_NXFONT_SANS28X37 is not set
+# CONFIG_NXFONT_SANS39X48 is not set
+# CONFIG_NXFONT_SANS17X23B is not set
+# CONFIG_NXFONT_SANS20X27B is not set
+# CONFIG_NXFONT_SANS22X29B is not set
+# CONFIG_NXFONT_SANS28X37B is not set
+# CONFIG_NXFONT_SANS40X49B is not set
+# CONFIG_NXFONT_SERIF22X29 is not set
+# CONFIG_NXFONT_SERIF29X37 is not set
+# CONFIG_NXFONT_SERIF38X48 is not set
+# CONFIG_NXFONT_SERIF22X28B is not set
+# CONFIG_NXFONT_SERIF27X38B is not set
+# CONFIG_NXFONT_SERIF38X49B is not set
+# CONFIG_NXCONSOLE is not set
+
+#
+# NX Multi-user only options
+#
+# CONFIG_NX_MULTIUSER is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_GRAN is not set
+
+#
+# Binary Formats
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=256
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+
+#
+# Non-standard Helper Functions
+#
+CONFIG_LIB_KBDCODEC=y
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+# CONFIG_BUILTIN is not set
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CDCACM is not set
+# CONFIG_EXAMPLES_COMPOSITE is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXCONSOLE is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXFLAT is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+CONFIG_EXAMPLES_NXLINES=y
+CONFIG_EXAMPLES_NXLINES_VPLANE=0
+CONFIG_EXAMPLES_NXLINES_DEVNO=0
+CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4
+CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x01
+CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
+CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01
+CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_BPP=1
+CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_QENCODER is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_THTTPD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UIP is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBMSC is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WLAN is not set
+
+#
+# Interpreters
+#
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# Network Utilities
+#
+
+#
+# Networking Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPC is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_RESOLV is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_THTTPD is not set
+# CONFIG_NETUTILS_UIPLIB is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+
+#
+# ModBus
+#
+
+#
+# FreeModbus
+#
+# CONFIG_MODBUS is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# System NSH Add-Ons
+#
+
+#
+# Custom Free Memory Command
+#
+# CONFIG_SYSTEM_FREE is not set
+
+#
+# I2C tool
+#
+
+#
+# FLASH Program Installation
+#
+# CONFIG_SYSTEM_INSTALL is not set
+
+#
+# readline()
+#
+# CONFIG_SYSTEM_READLINE is not set
+
+#
+# Power Off
+#
+# CONFIG_SYSTEM_POWEROFF is not set
+
+#
+# RAMTRON
+#
+# CONFIG_SYSTEM_RAMTRON is not set
+
+#
+# SD Card
+#
+# CONFIG_SYSTEM_SDCARD is not set
+
+#
+# Sysinfo
+#
+# CONFIG_SYSTEM_SYSINFO is not set
diff --git a/nuttx/configs/zp214xpa/nxlines/setenv.sh b/nuttx/configs/zp214xpa/nxlines/setenv.sh
new file mode 100755
index 000000000..77f1425e5
--- /dev/null
+++ b/nuttx/configs/zp214xpa/nxlines/setenv.sh
@@ -0,0 +1,65 @@
+#!/bin/bash
+# configs/zp214xpa/nxlines/setenv.sh
+#
+# Copyright (C) 2012 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+ echo "This script must be executed from the top-level NuttX build directory"
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+ export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows. You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
+
+# The zp214xpa/tools directory
+export LPCTOOL_DIR="${WD}/configs/zp214xpa/tools"
+
+# Add the path to the toolchain and tools directory to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/nuttx/configs/zp214xpa/src/Makefile b/nuttx/configs/zp214xpa/src/Makefile
index 8f1e1c05d..571b43b07 100644
--- a/nuttx/configs/zp214xpa/src/Makefile
+++ b/nuttx/configs/zp214xpa/src/Makefile
@@ -49,6 +49,10 @@ ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS =
+ifeq ($(CONFIG_LCD_UG2864AMBAG01),y)
+CSRCS += up_ug2864ambag01.c up_spi1.c
+endif
+
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
diff --git a/nuttx/configs/zp214xpa/src/up_spi1.c b/nuttx/configs/zp214xpa/src/up_spi1.c
new file mode 100644
index 000000000..563d63589
--- /dev/null
+++ b/nuttx/configs/zp214xpa/src/up_spi1.c
@@ -0,0 +1,644 @@
+/****************************************************************************
+ * config/zp214xpa/src/up_spi1.c
+ * arch/arm/src/board/up_spi1.c
+ *
+ * Copyright (C) 2008-2010, 2012 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * LCD Interface
+ *
+ * PIN NAME PIN CONFIGURATION
+ * 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 - General purpose output
+ * 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 - Alternate function 2
+ * 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output
+ * 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2
+ * 7 A0 P0.23/VBUS - General purpose output
+ *
+ * ENC29J60 Interface
+ *
+ * PIN NAME PIN CONFIGURATION
+ * 1 /CS P0.7/SSEL0/PWM2/EINT2 - General purpose output
+ * 2 SCK P0.4/SCK0/CAP0.1/AD0.6 - Alternate function 1
+ * 3 SI P0.6/MOSI0/CAP0.2/AD1.0 - Alternate function 1
+ * 4 SO P0.5/MISO0/MAT0.1/AD0.7 - Alternate function 1
+ * 7 INT P1.25/EXTIN0 - Alternal function 1
+ * 9 RST P1.24/TRACECLK
+ *
+ * This file provides support only for the LCD interface on SPI1.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+#include <nuttx/arch.h>
+#include <nuttx/spi.h>
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "lpc214x_power.h"
+#include "lpc214x_pinsel.h"
+#include "lpc214x_spi.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+
+#undef SPI_DEBUG /* Define to enable debug */
+#undef SPI_VERBOSE /* Define to enable verbose debug */
+
+#ifdef SPI_DEBUG
+# define spidbg lldbg
+# ifdef SPI_VERBOSE
+# define spivdbg lldbg
+# else
+# define spivdbg(x...)
+# endif
+#else
+# undef SPI_VERBOSE
+# define spidbg(x...)
+# define spivdbg(x...)
+#endif
+
+/* Clocking */
+
+#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M)
+#define LPC214X_PCLKFREQ (LPC214X_CCLKFREQ/LPC214X_APB_DIV)
+
+/* Use either FIO or legacy GPIO */
+
+#ifdef CONFIG_LPC214x_FIO
+# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
+# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
+# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET)
+#else
+# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET)
+# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET)
+# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
+#endif
+static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
+static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch);
+static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords);
+static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct spi_ops_s g_spiops =
+{
+#ifndef CONFIG_SPI_OWNBUS
+ .lock = spi_lock,
+#endif
+ .select = spi_select,
+ .setfrequency = spi_setfrequency,
+ .status = spi_status,
+#ifdef CONFIG_SPI_CMDDATA
+ .cmddata = spi_cmddata,
+#endif
+ .send = spi_send,
+ .sndblock = spi_sndblock,
+ .recvblock = spi_recvblock,
+ .registercallback = 0, /* Not implemented */
+};
+
+static struct spi_dev_s g_spidev = { &g_spiops };
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spi_lock
+ *
+ * Description:
+ * On SPI busses where there are multiple devices, it will be necessary to
+ * lock SPI to have exclusive access to the busses for a sequence of
+ * transfers. The bus should be locked before the chip is selected. After
+ * locking the SPI bus, the caller should then also call the setfrequency,
+ * setbits, and setmode methods to make sure that the SPI is properly
+ * configured for the device. If the SPI buss is being shared, then it
+ * may have been left in an incompatible state.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * lock - true: Lock spi bus, false: unlock SPI bus
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
+{
+ /* Not implemented */
+
+ return -ENOSYS;
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_select
+ *
+ * Description:
+ * Enable/disable the SPI slave select. The implementation of this method
+ * must include handshaking: If a device is selected, it must hold off
+ * all other attempts to select the device until the device is deselecte.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * devid - Identifies the device to select
+ * selected - true: slave selected, false: slave de-selected
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+ uint32_t bit = 1 << 20;
+
+ /* We do not bother to check if devid == SPIDEV_DISPLAY because that is the
+ * only thing on the bus.
+ */
+
+ if (selected)
+ {
+ /* Enable slave select (low enables) */
+
+ spidbg("CD asserted\n");
+ putreg32(bit, CS_CLR_REGISTER);
+ }
+ else
+ {
+ /* Disable slave select (low enables) */
+
+ spidbg("CD de-asserted\n");
+ putreg32(bit, CS_SET_REGISTER);
+
+ /* Wait for the TX FIFO not full indication */
+
+ while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
+ putreg16(0xff, LPC214X_SPI1_DR);
+
+ /* Wait until TX FIFO and TX shift buffer are empty */
+
+ while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_BSY);
+
+ /* Wait until RX FIFO is not empty */
+
+ while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE));
+
+ /* Then read and discard bytes until the RX FIFO is empty */
+
+ do
+ {
+ (void)getreg16(LPC214X_SPI1_DR);
+ }
+ while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE);
+ }
+}
+
+/****************************************************************************
+ * Name: spi_setfrequency
+ *
+ * Description:
+ * Set the SPI frequency.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * frequency - The SPI frequency requested
+ *
+ * Returned Value:
+ * Returns the actual frequency selected
+ *
+ ****************************************************************************/
+
+static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
+{
+ uint32_t divisor = LPC214X_PCLKFREQ / frequency;
+
+ if (divisor < 2)
+ {
+ divisor = 2;
+ }
+ else if (divisor > 254)
+ {
+ divisor = 254;
+ }
+
+ divisor = (divisor + 1) & ~1;
+ putreg8(divisor, LPC214X_SPI1_CPSR);
+
+ spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
+ return LPC214X_PCLKFREQ / divisor;
+}
+
+/****************************************************************************
+ * Name: spi_status
+ *
+ * Description:
+ * Get SPI/MMC status
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * devid - Identifies the device to report status on
+ *
+ * Returned Value:
+ * Returns a bitset of status values (see SPI_STATUS_* defines
+ *
+ ****************************************************************************/
+
+static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ spidbg("Return 0\n");
+ return 0;
+}
+
+/****************************************************************************
+ * Name: spi_cmddata
+ *
+ * Description:
+ * Some devices require and additional out-of-band bit to specify if the
+ * next word sent to the device is a command or data. This is typical, for
+ * example, in "9-bit" displays where the 9th bit is the CMD/DATA bit.
+ * This function provides selection of command or data.
+ *
+ * This "latches" the CMD/DATA state. It does not have to be called before
+ * every word is transferred; only when the CMD/DATA state changes. This
+ * method is required if CONFIG_SPI_CMDDATA is selected in the NuttX
+ * configuration
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * cmd - TRUE: The following word is a command; FALSE: the following words
+ * are data.
+ *
+ * Returned Value:
+ * OK unless an error occurs. Then a negated errno value is returned
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+ uint32_t bit = 1 << 23;
+
+ /* We do not bother to check if devid == SPIDEV_DISPLAY because that is the
+ * only thing on the bus.
+ */
+
+ /* "This is the Data/Command control pad which determines whether the
+ * data bits are data or a command.
+ *
+ * A0 = H: the inputs at D0 to D7 are treated as display data.
+ * A0 = L: the inputs at D0 to D7 are transferred to the command registers."
+ */
+
+ if (cmd)
+ {
+ /* L: the inputs at D0 to D7 are transferred to the command registers */
+
+ spidbg("Command\n");
+ putreg32(bit, CS_CLR_REGISTER);
+ }
+ else
+ {
+ /* H: the inputs at D0 to D7 are treated as display data. */
+
+ spidbg("CD de-asserted\n");
+ putreg32(bit, CS_SET_REGISTER);
+ }
+
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_send
+ *
+ * Description:
+ * Exchange one word on SPI
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * wd - The word to send. the size of the data is determined by the
+ * number of bits selected for the SPI interface.
+ *
+ * Returned Value:
+ * response
+ *
+ ****************************************************************************/
+
+static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
+{
+ register uint16_t regval;
+
+ /* Wait while the TX FIFO is full */
+
+ while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
+
+ /* Write the byte to the TX FIFO */
+
+ putreg16((uint8_t)wd, LPC214X_SPI1_DR);
+
+ /* Wait for the RX FIFO not empty */
+
+ while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE));
+
+ /* Get the value from the RX FIFO and return it */
+
+ regval = getreg16(LPC214X_SPI1_DR);
+ spidbg("%04x->%04x\n", wd, regval);
+ return regval;
+}
+
+/*************************************************************************
+ * Name: spi_sndblock
+ *
+ * Description:
+ * Send a block of data on SPI
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * buffer - A pointer to the buffer of data to be sent
+ * nwords - the length of data to send from the buffer in number of words.
+ * The wordsize is determined by the number of bits-per-word
+ * selected for the SPI interface. If nbits <= 8, the data is
+ * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
+{
+ FAR const uint8_t *ptr = (FAR const uint8_t *)buffer;
+ uint8_t sr;
+
+ /* Loop while thre are bytes remaining to be sent */
+
+ spidbg("nwords: %d\n", nwords);
+ while (nwords > 0)
+ {
+ /* While the TX FIFO is not full and there are bytes left to send */
+
+ while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) && nwords)
+ {
+ /* Send the data */
+
+ putreg16((uint16_t)*ptr, LPC214X_SPI1_DR);
+ ptr++;
+ nwords--;
+ }
+ }
+
+ /* Then discard all card responses until the RX & TX FIFOs are emptied. */
+
+ spidbg("discarding\n");
+ do
+ {
+ /* Is there anything in the RX fifo? */
+
+ sr = getreg8(LPC214X_SPI1_SR);
+ if ((sr & LPC214X_SPI1SR_RNE) != 0)
+ {
+ /* Yes.. Read and discard */
+
+ (void)getreg16(LPC214X_SPI1_DR);
+ }
+
+ /* There is a race condition where TFE may go true just before
+ * RNE goes true and this loop terminates prematurely. The nasty little
+ * delay in the following solves that (it could probably be tuned
+ * to improve performance).
+ */
+
+ else if ((sr & LPC214X_SPI1SR_TFE) != 0)
+ {
+ up_udelay(100);
+ sr = getreg8(LPC214X_SPI1_SR);
+ }
+ }
+ while ((sr & LPC214X_SPI1SR_RNE) != 0 || (sr & LPC214X_SPI1SR_TFE) == 0);
+}
+
+/****************************************************************************
+ * Name: spi_recvblock
+ *
+ * Description:
+ * Revice a block of data from SPI
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * buffer - A pointer to the buffer in which to recieve data
+ * nwords - the length of data that can be received in the buffer in number
+ * of words. The wordsize is determined by the number of bits-per-word
+ * selected for the SPI interface. If nbits <= 8, the data is
+ * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
+{
+ FAR uint8_t *ptr = (FAR uint8_t*)buffer;
+ uint32_t rxpending = 0;
+
+ /* While there is remaining to be sent (and no synchronization error has occurred) */
+
+ spidbg("nwords: %d\n", nwords);
+ while (nwords || rxpending)
+ {
+ /* Fill the transmit FIFO with 0xff...
+ * Write 0xff to the data register while (1) the TX FIFO is
+ * not full, (2) we have not exceeded the depth of the TX FIFO,
+ * and (3) there are more bytes to be sent.
+ */
+
+ spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+ while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) &&
+ (rxpending < LPC214X_SPI1_FIFOSZ) && nwords)
+ {
+ putreg16(0xff, LPC214X_SPI1_DR);
+ nwords--;
+ rxpending++;
+ }
+
+ /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
+
+ spivdbg("RX: rxpending: %d\n", rxpending);
+ while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
+ {
+ *ptr++ = (uint8_t)getreg16(LPC214X_SPI1_DR);
+ rxpending--;
+ }
+ }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_spiinitialize
+ *
+ * Description:
+ * Initialize the selected SPI port
+ *
+ * Input Parameter:
+ * Port number (for hardware that has mutiple SPI interfaces)
+ *
+ * Returned Value:
+ * Valid SPI device structre reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct spi_dev_s *up_spiinitialize(int port)
+{
+ uint32_t regval32;
+ uint8_t regval8;
+ int i;
+
+ /* Only the SPI1 interface is supported */
+
+#ifdef CONFIG_DEBUG
+ if (port != 1)
+ {
+ return NULL;
+ }
+#endif
+
+ /* Configure multiplexed pins as connected on the ZP213X/4XPA board:
+ *
+ * PINSEL1 P0.17/CAP1.2/SCK1/MAT1.2 Bits 2-3=10 for SCK1
+ * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=10 for MISO1
+ * (This is the RESET line for the UG_2864AMBAG01,
+ * although it is okay to configure it as an input too)
+ * PINSEL1 P0.19/MAT1.2/MOSI1/CAP1.2 Bits 6-7=10 for MOSI1
+ * PINSEL1 P0.20/MAT1.3/SSEL1/EINT3 Bits 8-9=00 for P0.20 (we'll control it via GPIO or FIO)
+ * PINSEL1 P0.23/VBUS Bits 12-13=00 for P0.21 (we'll control it via GPIO or FIO)
+ */
+
+ regval32 = getreg32(LPC214X_PINSEL1);
+#ifdef CONFIG_LCD_UG2864AMBAG01
+ regval32 &= ~(LPC214X_PINSEL1_P017_MASK|LPC214X_PINSEL1_P019_MASK|
+ LPC214X_PINSEL1_P020_MASK|LPC214X_PINSEL1_P023_MASK);
+ regval32 |= (LPC214X_PINSEL1_P017_SCK1|LPC214X_PINSEL1_P019_MOSI1|
+ LPC214X_PINSEL1_P020_GPIO|LPC214X_PINSEL1_P023_GPIO);
+#else
+ regval32 &= ~(LPC214X_PINSEL1_P017_MASK|LPC214X_PINSEL1_P018_MASK
+ LPC214X_PINSEL1_P019_MASK|LPC214X_PINSEL1_P020_MASK|
+ LPC214X_PINSEL1_P023_MASK);
+ regval32 |= (LPC214X_PINSEL1_P017_SCK1|LPC214X_PINSEL1_P018_MISO1|
+ LPC214X_PINSEL1_P019_MOSI1|LPC214X_PINSEL1_P020_GPIO|
+ LPC214X_PINSEL1_P023_GPIO);
+#endif
+ putreg32(regval32, LPC214X_PINSEL1);
+
+ /* De-select chip select using P0.20 (SSEL1) (low enables) and select A0
+ * for commands (also low)
+ */
+
+ regval32 = (1 << 20) || (1 << 23);
+ putreg32(regval32, CS_SET_REGISTER);
+ regval32 |= getreg32(CS_DIR_REGISTER);
+ putreg32(regval32, CS_DIR_REGISTER);
+
+ /* Enable peripheral clocking to SPI1 */
+
+ regval32 = getreg32(LPC214X_PCON_PCONP);
+ regval32 |= LPC214X_PCONP_PCSPI1;
+ putreg32(regval32, LPC214X_PCON_PCONP);
+
+ /* Configure 8-bit SPI mode */
+
+ putreg16(LPC214X_SPI1CR0_DSS8BIT|LPC214X_SPI1CR0_FRFSPI, LPC214X_SPI1_CR0);
+
+ /* Disable the SSP and all interrupts (we'll poll for all data) */
+
+ putreg8(0, LPC214X_SPI1_CR1);
+ putreg8(0, LPC214X_SPI1_IMSC);
+
+ /* Set the initial clock frequency for indentification mode < 400kHz */
+
+ spi_setfrequency(NULL, 400000);
+
+ /* Enable the SPI */
+
+ regval8 = getreg8(LPC214X_SPI1_CR1);
+ putreg8(regval8 | LPC214X_SPI1CR1_SSE, LPC214X_SPI1_CR1);
+
+ for (i = 0; i < 8; i++)
+ {
+ (void)getreg16(LPC214X_SPI1_DR);
+ }
+
+ return &g_spidev;
+}
diff --git a/nuttx/configs/zp214xpa/src/up_ug2864ambag01.c b/nuttx/configs/zp214xpa/src/up_ug2864ambag01.c
new file mode 100644
index 000000000..164518db3
--- /dev/null
+++ b/nuttx/configs/zp214xpa/src/up_ug2864ambag01.c
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * config/zp214xpa/src/up_ug2864ambag01.c
+ * arch/arm/src/board/up_ug2864ambag01.c
+ *
+ * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/spi.h>
+#include <nuttx/lcd/lcd.h>
+#include <nuttx/lcd/ug-2864ambag01.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "lpc214x_pinsel.h"
+
+#ifdef CONFIG_LCD_UG2864AMBAG01
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+/* The pin configurations here requires that SPI1 is avaialable */
+
+/* SPI should be configured with CMD/DATA support (and no transfer methods) */
+
+#ifndef CONFIG_SPI_CMDDATA
+# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
+#endif
+
+/* Pin Configuration ********************************************************/
+/* UG-2864AMBAG01 OLED Display:
+ *
+ * PIN NAME PIN CONFIGURATION
+ * 1 3V3
+ * 2 5V
+ * 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 RESET - General purpose output
+ * 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 DI - Alternate function 2
+ * 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output
+ * 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2
+ * 7 A0 P0.23/VBUS - General purpose output
+ * 8 N/C LED-
+ * 9 N/C LED+ (BL)
+ * 10 GND
+ *
+ * Definitions and configuration for DO, DI, CS, in up_spi1.c
+ */
+
+/* Use either FIO or legacy GPIO */
+
+#ifdef CONFIG_LPC214x_FIO
+# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
+# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
+# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET)
+#else
+# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET)
+# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET)
+# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_DEBUG_LCD
+# define lcddbg(format, arg...) dbg(format, ##arg)
+# define lcdvdbg(format, arg...) vdbg(format, ##arg)
+#else
+# define lcddbg(x...)
+# define lcdvdbg(x...)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_nxdrvinit
+ *
+ * Description:
+ * Called by NX initialization logic to configure the OLED.
+ *
+ ****************************************************************************/
+
+FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
+{
+ FAR struct spi_dev_s *spi;
+ FAR struct lcd_dev_s *dev;
+ uint32_t regval32;
+ uint32_t bits32;
+
+ /* Configure multiplexed pins as connected on the ZP213X/4XPA board:
+ *
+ * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=00 for P0.18
+ */
+
+ regval32 = getreg32(LPC214X_PINSEL1);
+ regval32 &= ~LPC214X_PINSEL1_P018_MASK;
+ regval32 |= LPC214X_PINSEL1_P018_GPIO;
+ putreg32(regval32, LPC214X_PINSEL1);
+
+ /* Set the RESET line low, putting the OLED into the reset state. */
+
+ bits32 = (1 << 18);
+ putreg32(bits32, CS_CLR_REGISTER);
+ regval32 = getreg32(CS_DIR_REGISTER);
+ putreg32(regval32 | bits32, CS_DIR_REGISTER);
+
+ /* Wait a bit then release the OLED from the reset state */
+
+ up_mdelay(20);
+ putreg32(bits32, CS_SET_REGISTER);
+
+ /* Get the SPI1 port interface */
+
+ spi = up_spiinitialize(1);
+ if (!spi)
+ {
+ lcddbg("Failed to initialize SPI port 1\n");
+ }
+ else
+ {
+ /* Bind the SPI port to the OLED */
+
+ dev = ug2864ambag01_initialize(spi, devno);
+ if (!dev)
+ {
+ lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+ }
+ else
+ {
+ lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+
+ /* And turn the OLED on */
+
+ (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER);
+ return dev;
+ }
+ }
+
+ return NULL;
+}
+#endif /* CONFIG_LCD_UG2864AMBAG01 */
diff --git a/nuttx/configs/zp214xpa/tools/olimex.cfg b/nuttx/configs/zp214xpa/tools/olimex.cfg
new file mode 100755
index 000000000..09f373993
--- /dev/null
+++ b/nuttx/configs/zp214xpa/tools/olimex.cfg
@@ -0,0 +1,62 @@
+# NXP LPC2148 ARM7TDMI
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG A"
+ft2232_layout "olimex-jtag"
+ft2232_vid_pid 0x15BA 0x0003
+
+# Use RCLK. If RCLK is not available fall back to 500kHz.
+#
+# Depending on cabling you might be able to eek this up to 2000kHz.
+jtag_rclk 500
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc2148
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4f1f0f0f
+}
+
+adapter_nsrst_delay 200
+jtag_ntrst_delay 200
+
+# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
+# JTAG, power-on reset is not enough, i.e. you need to perform a
+# reset before being able to talk to the LPC2148, attach is not possible.
+
+reset_config trst_and_srst
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+ # Force target into ARM state
+ arm core_state arm
+
+ # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
+ # "User Flash Mode" where interrupt vectors are _not_ remapped,
+ # and reside in flash instead).
+ #
+ # See section 7.1 on page 32 ("Memory Mapping control register") in
+ # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
+ # http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
+ mwb 0xE01FC040 0x01
+}
+
+# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2 14765 calc_checksum
diff --git a/nuttx/configs/zp214xpa/tools/oocd.sh b/nuttx/configs/zp214xpa/tools/oocd.sh
new file mode 100755
index 000000000..f1e49344d
--- /dev/null
+++ b/nuttx/configs/zp214xpa/tools/oocd.sh
@@ -0,0 +1,52 @@
+#!/bin/sh
+#
+# See configs/zp214xpa/README.txt for information about
+# this file.
+
+TOPDIR=$1
+USAGE="$0 <TOPDIR> [-d]"
+if [ -z "${TOPDIR}" ]; then
+ echo "Missing argument"
+ echo $USAGE
+ exit 1
+fi
+
+# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment
+# the following to run directly from the build directory
+#OPENOCD_PATH="/home/OpenOCD/openocd/src"
+#TARGET_PATH="/home/OpenOCD/openocd/tcl"
+OPENOCD_PATH="/usr/local/bin"
+TARGET_PATH="/usr/local/share/openocd/scripts"
+
+OPENOCD_EXE=openocd.exe
+OPENOCD_CFG="${TOPDIR}/configs/zp214xpa/tools/olimex.cfg"
+OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"
+
+if [ "X$2" = "X-d" ]; then
+ OPENOCD_ARGS=$OPENOCD_ARGS" -d3"
+ set -x
+fi
+
+if [ ! -d ${OPENOCD_PATH} ]; then
+ echo "OpenOCD path does not exist: ${OPENOCD_PATH}"
+ exit 1
+fi
+if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then
+ echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}"
+ exit 1
+fi
+if [ ! -f ${OPENOCD_CFG} ]; then
+ echo "OpenOCD config file does not exist: ${OPENOCD_CFG}"
+ exit 1
+fi
+
+echo "Starting OpenOCD"
+cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; }
+${OPENOCD_EXE} ${OPENOCD_ARGS} &
+echo "OpenOCD daemon started"
+ps -ef | grep openocd
+echo "In GDB: target remote localhost:3333"
+
+
+
+
diff --git a/nuttx/configs/zp214xpa/tools/usb-repair.txt b/nuttx/configs/zp214xpa/tools/usb-repair.txt
new file mode 100644
index 000000000..83d7598a5
--- /dev/null
+++ b/nuttx/configs/zp214xpa/tools/usb-repair.txt
@@ -0,0 +1,25 @@
+https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf
+
+Repair procedure for ARM-USB-OCD drivers
+
+1. Uninstalling ARM-USB-OCD drivers
+-------------------------------------
+1.1. Connect your programmer/debugger to your computer, open Device Manager
+ and uninstall the drivers for ARM-USB-OCD.
+1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager,
+ disconnect the programmer from your computer.
+1.3. Now you should download FTClean.exe from here:
+ http://www.ftdichip.com/Support/Utilities/FTClean.zip.
+1.4. After download is complete extract the "*.zip" file, open folder FTClean,
+ and run FTClean.exe
+1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba
+ and "PID (Hex)" with 0004.
+1.6. Press "Clean System" button. Make sure that all FTDI devices are
+ disconnected. (My require administrator privileges).
+
+2. Re-installing the ARM-USB-OCD driver
+---------------------------------------
+2.1 Connect the programmer/debugger to the computer.
+2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER
+ directory and install. (A different driver is required for OpenOCD
+ 0.4.0. That driver is available from the olimex.com web site).