diff options
-rw-r--r-- | nuttx/ChangeLog | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c | 4 |
3 files changed, 7 insertions, 4 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 3889dcd22..364de21a3 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -3151,3 +3151,6 @@ frequency from 24 to 16 MHz. Apparently 24 MHz is too fast for the board. This (plus the change to the STM32 DMA (above) fixes SDIO DMA on the STM3240G-EVAL (and probably STM3220G-EVAL -- untested). + * arch/arm/src/stm32/stm32f2xx_dma.c and stm32f4xx_dma.c: Backed out the + DMA priority change just above. The reduced SD card frequency was + necessary and sufficient to resolve the problem. diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c index f0d6bb4cd..55aab352f 100644 --- a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c +++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c @@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK| + DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK| + DMA_SCR_DBM|DMA_SCR_CIRC| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); regval |= scr; dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0; diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c index 907650b1d..dcbbf1856 100644 --- a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c +++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c @@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK| + DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK| + DMA_SCR_DBM|DMA_SCR_CIRC| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); regval |= scr; dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0; |