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-rw-r--r--nuttx/COPYING11
-rw-r--r--nuttx/ChangeLog5
-rw-r--r--nuttx/arch/arm/src/sama5/chip/sam_pmc.h12
-rw-r--r--nuttx/arch/arm/src/sama5/sam_pck.c13
-rw-r--r--nuttx/configs/sama5d3x-ek/Kconfig9
-rw-r--r--nuttx/configs/sama5d3x-ek/README.txt5
-rw-r--r--nuttx/configs/sama5d3x-ek/ov2640/Make.defs136
-rw-r--r--nuttx/configs/sama5d3x-ek/ov2640/defconfig706
-rwxr-xr-xnuttx/configs/sama5d3x-ek/ov2640/setenv.sh76
-rw-r--r--nuttx/configs/sama5d3x-ek/src/Makefile4
-rw-r--r--nuttx/configs/sama5d3x-ek/src/sam_ov2640.c79
-rw-r--r--nuttx/drivers/Kconfig12
-rw-r--r--nuttx/drivers/Makefile1
-rw-r--r--nuttx/drivers/sensors/Kconfig4
-rw-r--r--nuttx/drivers/video/Kconfig117
-rw-r--r--nuttx/drivers/video/Make.defs56
-rw-r--r--nuttx/drivers/video/ov2640.c1146
17 files changed, 2380 insertions, 12 deletions
diff --git a/nuttx/COPYING b/nuttx/COPYING
index b3655265d..f8d5284ab 100644
--- a/nuttx/COPYING
+++ b/nuttx/COPYING
@@ -233,3 +233,14 @@ Documents/rss.gif
* share alike – If you alter, transform, or build upon this work,
you may distribute the resulting work only under the same or
similar license to this one.
+
+drivers/video/ov2640
+^^^^^^^^^^^^^^^^^^^^
+
+ WARNING: Some of the information in the data tables in this file came
+ from other projects with conflicting licenses: Linux and ArduCAM. Those
+ both have GPL licenses. I am not sure if it is proper or not to lift the
+ content of those tables and still retain this BSD license. I am guessing
+ so, but I am not copyright attorney so you should use this driver in
+ products at your own risk.
+ \ No newline at end of file
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 59291ac5e..50b917d3b 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -6179,4 +6179,7 @@
(2013-12-8).
* arch/arm/src/a1x/a1x_irq.c: A10 interrupt handling logic (partial)
(2013-12-8).
-
+ * drivers/video/ov2640.c: An OV2640 camera driver that will be used to
+ verify the SAMA5D3x-EK ISI peripheral (2013-1209).
+ * sama5d3x-ek/ov2640 and src/sam_ov2640.c. Board logic to test the SAMA5D3
+ ISI peripheral usign the OV2640 camera (2013-12-9).
diff --git a/nuttx/arch/arm/src/sama5/chip/sam_pmc.h b/nuttx/arch/arm/src/sama5/chip/sam_pmc.h
index 09ddb1665..5bd3dea57 100644
--- a/nuttx/arch/arm/src/sama5/chip/sam_pmc.h
+++ b/nuttx/arch/arm/src/sama5/chip/sam_pmc.h
@@ -268,12 +268,12 @@
/* PMC Programmable Clock Register (0,1,2) */
#define PMC_PCK_CSS_SHIFT (0) /* Bits 0-2: Master Clock Source Selection */
-#define PMC_PCK_CSS_MASK (7 << PMC_PCK_CSS_MASK)
-# define PMC_PCK_CSS_SLOW (0 << PMC_PCK_CSS_MASK) /* Slow Clock */
-# define PMC_PCK_CSS_MAIN (1 << PMC_PCK_CSS_MASK) /* Main Clock */
-# define PMC_PCK_CSS_PLLA (2 << PMC_PCK_CSS_MASK) /* PLLA Clock */
-# define PMC_PCK_CSS_UPLL (3 << PMC_PCK_CSS_MASK) /* UPLL Clock */
-# define PMC_PCK_CSS_MCK (4 << PMC_PCK_CSS_MASK) /* Master Clock */
+#define PMC_PCK_CSS_MASK (7 << PMC_PCK_CSS_SHIFT)
+# define PMC_PCK_CSS_SLOW (0 << PMC_PCK_CSS_SHIFT) /* Slow Clock */
+# define PMC_PCK_CSS_MAIN (1 << PMC_PCK_CSS_SHIFT) /* Main Clock */
+# define PMC_PCK_CSS_PLLA (2 << PMC_PCK_CSS_SHIFT) /* PLLA Clock */
+# define PMC_PCK_CSS_UPLL (3 << PMC_PCK_CSS_SHIFT) /* UPLL Clock */
+# define PMC_PCK_CSS_MCK (4 << PMC_PCK_CSS_SHIFT) /* Master Clock */
#define PMC_PCK_PRES_SHIFT (4) /* Bits 4-6: Programmable Clock Prescaler */
#define PMC_PCK_PRES_MASK (7 << PMC_PCK_PRES_SHIFT)
# define PMC_PCK_PRES_DIV1 (0 << PMC_PCK_PRES_SHIFT) /* Selected clock */
diff --git a/nuttx/arch/arm/src/sama5/sam_pck.c b/nuttx/arch/arm/src/sama5/sam_pck.c
index b07b1df85..06ddd29a1 100644
--- a/nuttx/arch/arm/src/sama5/sam_pck.c
+++ b/nuttx/arch/arm/src/sama5/sam_pck.c
@@ -39,12 +39,20 @@
#include <nuttx/config.h>
+#include <assert.h>
+#include <errno.h>
#include <debug.h>
+#include <arch/board/board.h>
+
#include "chip/sam_pinmap.h"
+
+#include "up_arch.h"
#include "sam_pio.h"
#include "sam_isi.h"
+#include "sam_pck.h"
+
#ifdef CONFIG_SAMA5_ISI
/****************************************************************************
@@ -96,12 +104,13 @@ uint32_t sam_pck_configure(enum pckid_e pckid, uint32_t frequency)
{
uint32_t regval;
uint32_t clkin;
+ uint32_t actual;
/* Pick a clock source. Several are possible but only MCK or PLLA is
* chosen here.
*/
- DEBUGASSERT(BOARD_MCK_FREQUENCY < BOARD_PLLA_FREQUENCY)
+ DEBUGASSERT(BOARD_MCK_FREQUENCY < BOARD_PLLA_FREQUENCY);
if (frequency <= BOARD_MCK_FREQUENCY ||
frequency < BOARD_PLLA_FREQUENCY / 64)
{
@@ -158,7 +167,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, uint32_t frequency)
sdbg("ERROR: frequency cannot be realized.\n");
sdbg(" frequency=%d MCK=%d\n",
frequency, clkin);
- return -ERANGE;
+ return 0;
}
/* Disable the programmable clock, configure the PCK output pin, then set
diff --git a/nuttx/configs/sama5d3x-ek/Kconfig b/nuttx/configs/sama5d3x-ek/Kconfig
index 9cd82abce..a209d2c19 100644
--- a/nuttx/configs/sama5d3x-ek/Kconfig
+++ b/nuttx/configs/sama5d3x-ek/Kconfig
@@ -213,4 +213,13 @@ config SAMA5D3X_EK_I2SCHAR_MINOR
endif # AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1)
+if VIDEO_OV2640
+
+config SAMA5_OV2640_DEMO
+ bool "SAMA5 OV2640 camera demo"
+ default n
+ ---help---
+ Enable the SAMA5 OV2640 camera demo
+
+endif # VIDEO_OV2640
endif # ARCH_BOARD_SAMA5D3X_EK
diff --git a/nuttx/configs/sama5d3x-ek/README.txt b/nuttx/configs/sama5d3x-ek/README.txt
index 36e995d14..a981c8651 100644
--- a/nuttx/configs/sama5d3x-ek/README.txt
+++ b/nuttx/configs/sama5d3x-ek/README.txt
@@ -2638,6 +2638,7 @@ Configurations
It executes an exhaustive OS test to verify a correct port of NuttX
to the SAMA5D3-EK. Since it now passes that test, the configuration
has little further use other than for reference.
+ ov2640: A test of the SAMA5 ISI using an OV2640 camera.
There may be issues with some of these configurations. See the details
before of the status of individual configurations.
@@ -3050,6 +3051,10 @@ Configurations
STATUS:
See the To-Do list below
+ ov2640:
+
+ A test of the SAMA5 ISI using an OV2640 camera.
+
To-Do List
==========
diff --git a/nuttx/configs/sama5d3x-ek/ov2640/Make.defs b/nuttx/configs/sama5d3x-ek/ov2640/Make.defs
new file mode 100644
index 000000000..ab53ec239
--- /dev/null
+++ b/nuttx/configs/sama5d3x-ek/ov2640/Make.defs
@@ -0,0 +1,136 @@
+############################################################################
+# configs/sama5d3x-ek/ov2640/Make.defs
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs
+
+ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y)
+ LDSCRIPT = isram.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
+ LDSCRIPT = ddram.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
+ LDSCRIPT = norflash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
+# LDSCRIPT = cs1flash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y)
+# LDSCRIPT = cs2flash.ld
+endif
+ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y)
+# LDSCRIPT = cs3flash.ld
+endif
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
+ MAXOPTIMIZATION = -O2
+else
+ # Linux/Cygwin-native toolchain
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx
+ ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+else
+ ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
+ifeq ($(CONFIG_HOST_WINDOWS),y)
+ HOSTEXEEXT = .exe
+else
+ HOSTEXEEXT =
+endif
+
+ifeq ($(WINTOOL),y)
+ # Windows-native host tools
+ DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh
+ DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh
+ MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh
+else
+ # Linux/Cygwin-native host tools
+ MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT)
+endif
+
diff --git a/nuttx/configs/sama5d3x-ek/ov2640/defconfig b/nuttx/configs/sama5d3x-ek/ov2640/defconfig
new file mode 100644
index 000000000..80ba93552
--- /dev/null
+++ b/nuttx/configs/sama5d3x-ek/ov2640/defconfig
@@ -0,0 +1,706 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+CONFIG_NUTTX_NEWCONFIG=y
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_HOST_LINUX is not set
+# CONFIG_HOST_OSX is not set
+CONFIG_HOST_WINDOWS=y
+# CONFIG_HOST_OTHER is not set
+# CONFIG_WINDOWS_NATIVE is not set
+CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_MSYS is not set
+# CONFIG_WINDOWS_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_8051 is not set
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_IMX is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+CONFIG_ARCH_CHIP_SAMA5=y
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+CONFIG_ARCH_CORTEXA5=y
+# CONFIG_ARCH_CORTEXA8 is not set
+CONFIG_ARCH_FAMILY="armv7-a"
+CONFIG_ARCH_CHIP="sama5"
+CONFIG_ARCH_HAVE_FPU=y
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_MPU is not set
+CONFIG_ARCH_HAVE_LOWVECTORS=y
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_PGTABLE_VADDR=0x20000000
+# CONFIG_ARCH_ROMPGTABLE is not set
+# CONFIG_PAGING is not set
+
+#
+# ARMv7-A Configuration Options
+#
+# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
+CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
+# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set
+# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set
+# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
+
+#
+# SAMA5 Configuration Options
+#
+# CONFIG_SAMA5_HAVE_UART0 is not set
+# CONFIG_SAMA5_HAVE_UART1 is not set
+# CONFIG_SAMA5_HAVE_CAN0 is not set
+# CONFIG_SAMA5_HAVE_CAN1 is not set
+CONFIG_SAMA5_HAVE_LCDC=y
+CONFIG_SAMA5_HAVE_GMAC=y
+# CONFIG_SAMA5_HAVE_EMAC is not set
+# CONFIG_SAMA5_HAVE_HSMCI2 is not set
+# CONFIG_SAMA5_HAVE_TC1 is not set
+# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set
+CONFIG_ARCH_CHIP_ATSAMA5D33=y
+# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set
+# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set
+
+#
+# SAMA5 Peripheral Support
+#
+# CONFIG_SAMA5_DBGU is not set
+# CONFIG_SAMA5_PIT is not set
+# CONFIG_SAMA5_WDT is not set
+# CONFIG_SAMA5_RTC is not set
+CONFIG_SAMA5_HSMC=y
+# CONFIG_SAMA5_SMD is not set
+# CONFIG_SAMA5_USART0 is not set
+CONFIG_SAMA5_USART1=y
+# CONFIG_SAMA5_USART2 is not set
+# CONFIG_SAMA5_USART3 is not set
+# CONFIG_SAMA5_TWI0 is not set
+# CONFIG_SAMA5_TWI1 is not set
+# CONFIG_SAMA5_TWI2 is not set
+# CONFIG_SAMA5_HSMCI0 is not set
+# CONFIG_SAMA5_HSMCI1 is not set
+# CONFIG_SAMA5_SPI0 is not set
+# CONFIG_SAMA5_SPI1 is not set
+# CONFIG_SAMA5_TC0 is not set
+# CONFIG_SAMA5_PWM is not set
+# CONFIG_SAMA5_ADC is not set
+# CONFIG_SAMA5_DMAC0 is not set
+# CONFIG_SAMA5_DMAC1 is not set
+# CONFIG_SAMA5_UHPHS is not set
+# CONFIG_SAMA5_UDPHS is not set
+# CONFIG_SAMA5_GMAC is not set
+# CONFIG_SAMA5_LCDC is not set
+CONFIG_SAMA5_ISI=y
+# CONFIG_SAMA5_CAN0 is not set
+# CONFIG_SAMA5_CAN1 is not set
+# CONFIG_SAMA5_SHA is not set
+# CONFIG_SAMA5_AES is not set
+# CONFIG_SAMA5_TDES is not set
+# CONFIG_SAMA5_TRNG is not set
+# CONFIG_SAMA5_ARM is not set
+# CONFIG_SAMA5_FUSE is not set
+# CONFIG_SAMA5_MPDDRC is not set
+# CONFIG_SAMA5_PIO_IRQ is not set
+
+#
+# External Memory Configuration
+#
+CONFIG_SAMA5_EBICS0=y
+CONFIG_SAMA5_EBICS0_SIZE=134217728
+# CONFIG_SAMA5_EBICS0_SRAM is not set
+# CONFIG_SAMA5_EBICS0_PSRAM is not set
+# CONFIG_SAMA5_EBICS0_PROM is not set
+# CONFIG_SAMA5_EBICS0_EEPROM is not set
+# CONFIG_SAMA5_EBICS0_EPROM is not set
+# CONFIG_SAMA5_EBICS0_LCD is not set
+CONFIG_SAMA5_EBICS0_NOR=y
+# CONFIG_SAMA5_EBICS1 is not set
+# CONFIG_SAMA5_EBICS2 is not set
+# CONFIG_SAMA5_EBICS3 is not set
+# CONFIG_SAMA5_HAVE_NAND is not set
+# CONFIG_SAMA5_HAVE_PMECC is not set
+# CONFIG_SAMA5_BOOT_ISRAM is not set
+CONFIG_SAMA5_BOOT_CS0FLASH=y
+
+#
+# Heap Configuration
+#
+CONFIG_SAMA5_ISRAM_HEAP=y
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_IRQPRIO=y
+# CONFIG_CUSTOM_STACK is not set
+# CONFIG_ADDRENV is not set
+CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_MMU=y
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+# CONFIG_ARCH_HAVE_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=49341
+# CONFIG_ARCH_CALIBRATION is not set
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x00304000
+CONFIG_RAM_VSTART=0x00304000
+CONFIG_RAM_SIZE=114688
+CONFIG_FLASH_START=0x10000000
+CONFIG_FLASH_VSTART=0x10000000
+CONFIG_FLASH_SIZE=134217728
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_SAMA5D3X_EK=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="sama5d3x-ek"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_SAMA5_OV2640_DEMO=y
+
+#
+# RTOS Features
+#
+# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_MSEC_PER_TICK=10
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_INSTRUMENTATION is not set
+CONFIG_TASK_NAME_SIZE=0
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=19
+CONFIG_DEV_CONSOLE=y
+# CONFIG_MUTEX_TYPES is not set
+# CONFIG_PRIORITY_INHERITANCE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SCHED_WAITPID=y
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+CONFIG_USER_ENTRYPOINT="ov2640_main"
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_CLOCK is not set
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# Sizes of configurable things (0 disables)
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_LOOP is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+CONFIG_I2C_TRANSFER=y
+# CONFIG_I2C_WRITEREAD is not set
+# CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_TRACE is not set
+# CONFIG_SPI is not set
+# CONFIG_I2S is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+CONFIG_VIDEO_DEVICES=y
+CONFIG_VIDEO_OV2640=y
+# CONFIG_OV2640_MULTIPLE is not set
+CONFIG_OV2640_I2CADDR=0x21
+CONFIG_OV2640_FREQUENCY=400000
+CONFIG_OV2640_I2CMODE=0
+CONFIG_OV2640_RGB565_COLORFMT=y
+# CONFIG_OV2640_YUV422_COLORFMT is not set
+# CONFIG_OV2640_JPEG is not set
+# CONFIG_OV2640_QCIF_RESOLUTION is not set
+# CONFIG_OV2640_QVGA_RESOLUTION is not set
+# CONFIG_OV2640_CIF_RESOLUTION is not set
+# CONFIG_OV2640_VGA_RESOLUTION is not set
+CONFIG_OV2640_SVGA_RESOLUTION=y
+# CONFIG_OV2640_XVGA_RESOLUTION is not set
+# CONFIG_OV2640_SXGA_RESOLUTION is not set
+# CONFIG_OV2640_UXGA_RESOLUTION is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_LCD is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MTD is not set
+CONFIG_ARCH_NAND_HWECC=y
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_16550_UART is not set
+CONFIG_ARCH_HAVE_USART1=y
+
+#
+# USART Configuration
+#
+CONFIG_USART1_ISUART=y
+CONFIG_MCU_SERIAL=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+CONFIG_DISABLE_MOUNTPOINT=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_PROCFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG_ENABLE is not set
+# CONFIG_SYSLOG is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_MULTIHEAP is not set
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Binary Formats
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_BUILTIN is not set
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXCONSOLE is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXFLAT is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_QENCODER is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_THTTPD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UIP is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# Network Utilities
+#
+
+#
+# Networking Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPC is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_RESOLV is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_THTTPD is not set
+# CONFIG_NETUTILS_UIPLIB is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System NSH Add-Ons
+#
+
+#
+# USB CDC/ACM Device Commands
+#
+
+#
+# USB Composite Device Commands
+#
+
+#
+# Custom Free Memory Command
+#
+# CONFIG_SYSTEM_FREE is not set
+
+#
+# I2C tool
+#
+# CONFIG_SYSTEM_I2CTOOL is not set
+
+#
+# FLASH Program Installation
+#
+# CONFIG_SYSTEM_INSTALL is not set
+
+#
+# FLASH Erase-all Command
+#
+
+#
+# NxPlayer media player library / command Line
+#
+# CONFIG_SYSTEM_NXPLAYER is not set
+
+#
+# RAM test
+#
+# CONFIG_SYSTEM_RAMTEST is not set
+
+#
+# readline()
+#
+# CONFIG_SYSTEM_READLINE is not set
+
+#
+# Power Off
+#
+# CONFIG_SYSTEM_POWEROFF is not set
+
+#
+# RAMTRON
+#
+# CONFIG_SYSTEM_RAMTRON is not set
+
+#
+# SD Card
+#
+# CONFIG_SYSTEM_SDCARD is not set
+
+#
+# Sysinfo
+#
+# CONFIG_SYSTEM_SYSINFO is not set
+
+#
+# USB Monitor
+#
+
+#
+# Stack Monitor
+#
+
+#
+# USB Mass Storage Device Commands
+#
+
+#
+# Zmodem Commands
+#
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/nuttx/configs/sama5d3x-ek/ov2640/setenv.sh b/nuttx/configs/sama5d3x-ek/ov2640/setenv.sh
new file mode 100755
index 000000000..a73c27b7a
--- /dev/null
+++ b/nuttx/configs/sama5d3x-ek/ov2640/setenv.sh
@@ -0,0 +1,76 @@
+#!/bin/bash
+# configs/samard3x-ek/ov2640/setenv.sh
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+ echo "This script must be executed from the top-level NuttX build directory"
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+ export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows. You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows. You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows. You will also have to edit this if you install
+# the Atollic toolchain in any other location. /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/nuttx/configs/sama5d3x-ek/src/Makefile b/nuttx/configs/sama5d3x-ek/src/Makefile
index 271516c12..e2a0e9f74 100644
--- a/nuttx/configs/sama5d3x-ek/src/Makefile
+++ b/nuttx/configs/sama5d3x-ek/src/Makefile
@@ -144,6 +144,10 @@ ifeq ($(CONFIG_SAMA5_TSD),y)
CSRCS += sam_touchscreen.c
endif
+ifeq ($(CONFIG_VIDEO_OV2640),y)
+CSRCS += sam_ov2640.c
+endif
+
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += sam_autoleds.c
else
diff --git a/nuttx/configs/sama5d3x-ek/src/sam_ov2640.c b/nuttx/configs/sama5d3x-ek/src/sam_ov2640.c
new file mode 100644
index 000000000..9059ecd47
--- /dev/null
+++ b/nuttx/configs/sama5d3x-ek/src/sam_ov2640.c
@@ -0,0 +1,79 @@
+/************************************************************************************
+ * configs/sama5d3x-ek/src/sam_ov2640.c
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdlib.h>
+#include <debug.h>
+
+#include "sama5d3x-ek.h"
+
+#if defined(CONFIG_SAMA5_ISI) && defined(CONFIG_SAMA5_OV2640_DEMO)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: ov2640_main
+ *
+ * Description:
+ * Entry point for the OV2640 Camera Demo
+ *
+ ************************************************************************************/
+
+int ov2640_main(int argc, char *argv[])
+{
+ return EXIT_SUCCESS;
+}
+
+#endif /* CONFIG_SAMA5_ISI && CONFIG_SAMA5_OV2640_DEMO */
diff --git a/nuttx/drivers/Kconfig b/nuttx/drivers/Kconfig
index 849f3df40..878d8120d 100644
--- a/nuttx/drivers/Kconfig
+++ b/nuttx/drivers/Kconfig
@@ -259,7 +259,7 @@ menuconfig AUDIO_DEVICES
bool "Audio Device Support"
default n
---help---
- This directory holds implementations of audio device drivers.
+ Enable support for audio device drivers.
This includes drivers for MP3, WMA and Ogg Vorbis encoding,
decoding, as well as drivers for interfacing with external
DSP chips to perform custom audio functions.
@@ -268,6 +268,16 @@ if AUDIO_DEVICES
source drivers/audio/Kconfig
endif # AUDIO_DEVICES
+menuconfig VIDEO_DEVICES
+ bool "Video Device Support"
+ default n
+ ---help---
+ Enable support for video device drivers.
+
+if VIDEO_DEVICES
+source drivers/video/Kconfig
+endif # VIDEO_DEVICES
+
menuconfig BCH
bool "Block-to-Character (BCH) Support"
default n
diff --git a/nuttx/drivers/Makefile b/nuttx/drivers/Makefile
index cce03cad0..57ef00340 100644
--- a/nuttx/drivers/Makefile
+++ b/nuttx/drivers/Makefile
@@ -66,6 +66,7 @@ include spi$(DELIM)Make.defs
include syslog$(DELIM)Make.defs
include usbdev$(DELIM)Make.defs
include usbhost$(DELIM)Make.defs
+include video$(DELIM)Make.defs
include wireless$(DELIM)Make.defs
ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
diff --git a/nuttx/drivers/sensors/Kconfig b/nuttx/drivers/sensors/Kconfig
index 9433b5e77..20b3ea028 100644
--- a/nuttx/drivers/sensors/Kconfig
+++ b/nuttx/drivers/sensors/Kconfig
@@ -7,7 +7,7 @@ config LIS331DL
bool "ST LIS331DL device support"
default n
select I2C
-
+
config I2C_LM75
bool
default y if LM75
@@ -22,7 +22,7 @@ config DEBUG_LM75
bool "Enable LM-75 debug"
default n
depends on LM75
-
+
config QENCODER
bool "Qencoder"
default n
diff --git a/nuttx/drivers/video/Kconfig b/nuttx/drivers/video/Kconfig
new file mode 100644
index 000000000..ebd06046b
--- /dev/null
+++ b/nuttx/drivers/video/Kconfig
@@ -0,0 +1,117 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+
+config VIDEO_OV2640
+ bool "OV2640 camera chip"
+ default n
+ select I2C
+
+if VIDEO_OV2640
+
+config OV2640_MULTIPLE
+ bool "Multiple OV2640 devices"
+ default n
+ ---help---
+ Build in support for multiple on-board OV2640 devices
+
+config OV2640_I2CADDR
+ hex "I2C address (7-bit)"
+ default 0x21
+ ---help---
+ OV2640 I2C address in 7-bit format
+
+config OV2640_FREQUENCY
+ int "I2C frequency"
+ default 400000
+ ---help---
+ OV2640 I2C frequency
+choice
+ prompt "Color format"
+ default OV2640_RGB565_COLORFMT
+
+config OV2640_RGB565_COLORFMT
+ bool "RGB565"
+
+config OV2640_YUV422_COLORFMT
+ bool "YUV422"
+
+endchoice
+
+config OV2640_JPEG
+ bool "JPEG output format"
+ default n
+ ---help---
+ Select JPEG output format
+
+choice
+ prompt "JPEG resolution"
+ default OV2640_JPEG_SVGA_RESOLUTION
+ depends on OV2640_JPEG
+
+config OV2640_JPEG_QCIF_RESOLUTION
+ bool "QCIF (176x144)"
+
+config OV2640_JPEG_QVGA_RESOLUTION
+ bool "QVGA (320x240)"
+
+config OV2640_JPEG_CIF_RESOLUTION
+ bool "CIF (352x288)"
+
+config OV2640_JPEG_VGA_RESOLUTION
+ bool "VGA (640x480)"
+
+config OV2640_JPEG_SVGA_RESOLUTION
+ bool "SVGA (800x600)"
+
+config OV2640_JPEG_XVGA_RESOLUTION
+ bool "XVGA (1024x768)"
+
+config OV2640_JPEG_SXVGA_RESOLUTION
+ bool "SXVGA (1280x1024)"
+
+config OV2640_JPEG_UXGA_RESOLUTION
+ bool "UXVGA (1600x1200)"
+
+endchoice
+
+choice
+ prompt "Output resolution"
+ default OV2640_SVGA_RESOLUTION
+ depends on !OV2640_JPEG
+
+config OV2640_QCIF_RESOLUTION
+ bool "QCIF (176x144)"
+
+config OV2640_QVGA_RESOLUTION
+ bool "QVGA (320x240)"
+
+config OV2640_CIF_RESOLUTION
+ bool "CIF (352x288)"
+
+config OV2640_VGA_RESOLUTION
+ bool "VGA (640x480)"
+
+config OV2640_SVGA_RESOLUTION
+ bool "SVGA (800x600)"
+
+config OV2640_XVGA_RESOLUTION
+ bool "XVGA (1024x768)"
+
+config OV2640_SXGA_RESOLUTION
+ bool "SXVGA (1280x1024)"
+
+config OV2640_UXGA_RESOLUTION
+ bool "UXVGA (1600x1200)"
+
+endchoice
+
+config OV2640_REGDEBUG
+ bool "Register level debug output"
+ default n
+ depends on DEBUG
+ ---help---
+ Enable details, register level debug output.
+
+endif
diff --git a/nuttx/drivers/video/Make.defs b/nuttx/drivers/video/Make.defs
new file mode 100644
index 000000000..27a502848
--- /dev/null
+++ b/nuttx/drivers/video/Make.defs
@@ -0,0 +1,56 @@
+############################################################################
+# drivers/ov2640/Make.defs
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# Include video drivers
+
+ifeq ($(CONFIG_VIDEO_DEVICES),y)
+
+# These video drivers depend on I2C support
+
+ifeq ($(CONFIG_I2C),y)
+
+ifeq ($(CONFIG_VIDEO_OV2640),y)
+ CSRCS += ov2640.c
+endif
+
+endif
+
+# Include video driver build support
+
+DEPPATH += --dep-path video
+VPATH += :video
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)video}
+
+endif
diff --git a/nuttx/drivers/video/ov2640.c b/nuttx/drivers/video/ov2640.c
new file mode 100644
index 000000000..29861fb8c
--- /dev/null
+++ b/nuttx/drivers/video/ov2640.c
@@ -0,0 +1,1146 @@
+/****************************************************************************
+ * drivers/video/ov2640.c
+ * OV2640 Color CMOS UXGA (2.0 MegaPixel) CameraChip
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * WARNING: Some of the information in the data tables below came from other
+ * projects with conflicting licenses: Linux and ArduCAM. Those both have
+ * GPL licenses. I am not sure if it is proper or not to lift the content
+ * of those tables and still retain this BSD license. I am guessing so, but
+ * I am not copyright attorney so you should use this driver in products at
+ * your own risk.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/i2c.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* 7-bit I2C address. Default: 0x21 */
+
+#ifndef CONFIG_OV2640_I2CADDR
+# define CONFIG_OV2640_I2CADDR 0x21
+#endif
+
+#ifdef CONFIG_OV2640_JPEG
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+
+#else
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+#endif
+
+#if defined(CONFIG_OV2640_QCIF_RESOLUTION) || defined(CONFIG_OV2640_JPEG_QCIF_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 176
+# define OV2460_IMAGE_HEIGHT 144
+
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_QVGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_QVGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 320
+# define OV2460_IMAGE_HEIGHT 240
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_CIF_RESOLUTION) || defined(CONFIG_OV2640_JPEG_CIF_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 352
+# define OV2460_IMAGE_HEIGHT 288
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_VGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_VGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 640
+# define OV2460_IMAGE_HEIGHT 480
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_SVGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_SVGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 800
+# define OV2460_IMAGE_HEIGHT 600
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_XVGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_XVGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 1024
+# define OV2460_IMAGE_HEIGHT 768
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_SXGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_SXVGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 1280
+# define OV2460_IMAGE_HEIGHT 1024
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_UXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+
+#elif defined(CONFIG_OV2640_UXGA_RESOLUTION) || defined(CONFIG_OV2640_JPEG_UXGA_RESOLUTION)
+
+# define OV2460_IMAGE_WIDTH 1600
+# define OV2460_IMAGE_HEIGHT 1200
+
+# undef CONFIG_OV2640_QCIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+# undef CONFIG_OV2640_QVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+# undef CONFIG_OV2640_CIF_RESOLUTION
+# undef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+# undef CONFIG_OV2640_VGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+# undef CONFIG_OV2640_SVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+# undef CONFIG_OV2640_XVGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+# undef CONFIG_OV2640_SXGA_RESOLUTION
+# undef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+
+#else
+# error Unknown Resolution
+#endif
+
+/* Chip identification */
+
+#define OVR2640_MANUFACTURER_IDL 0xa2
+#define OVR2640_MANUFACTURER_IDH 0x7f
+#define OVR2640_PRODUCT_IDL 0x42
+#define OVR2640_PRODUCT_IDH 0x26
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct ovr2640_reg_s
+{
+ uint8_t regaddr;
+ uint8_t regval;
+};
+#define ARRAY_NENTRIES(a) (sizeof(a)/sizeof(struct ovr2640_reg_s))
+
+struct ov2640_dev_s
+{
+ struct i2c_dev_s *i2c;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* OV2640 register operations */
+
+static int ov2640_putreg(FAR struct i2c_dev_s *i2c, uint8_t regaddr,
+ uint8_t regval);
+static uint8_t ov2640_getreg(FAR struct i2c_dev_s *i2c, uint8_t regaddr);
+static int ov2640_putreglist(FAR struct i2c_dev_s *i2c,
+ FAR const struct ovr2640_reg_s *reglist, size_t nentries);
+
+/* Initialization */
+
+static int ovr2640_chipid(FAR struct i2c_dev_s *i2c);
+static int ov2640_reset(FAR struct i2c_dev_s *i2c);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifndef CONFIG_OV2640_MULTIPLE
+static struct ov2640_dev_s g_ov2640;
+#endif
+
+/* OV2640 reset */
+
+static const struct ovr2640_reg_s g_ov2640_reset[] =
+{
+ {0xff, 0x01}, {0x12, 0x80}
+};
+#define OV2640_RESET_NENTRIES ARRAY_NENTRIES(g_ov2640_reset)
+
+#ifndef CONFIG_OV2640_JPEG
+/* Initial register settings */
+
+static const struct ovr2640_reg_s g_ov2640_initialregs[] =
+{
+ {0xff, 0x00}, {0x2c, 0xff}, {0x2e, 0xdf}, {0xff, 0x01}, {0x3c, 0x32},
+ {0x11, 0x00}, {0x09, 0x02}, {0x04, 0x28}, {0x13, 0xe5}, {0x14, 0x48},
+ {0x2c, 0x0c}, {0x33, 0x78}, {0x3a, 0x33}, {0x3b, 0xfb}, {0x3e, 0x00},
+ {0x43, 0x11}, {0x16, 0x10}, {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a},
+ {0x37, 0x40}, {0x23, 0x00}, {0x34, 0xa0}, {0x06, 0x02}, {0x06, 0x88},
+ {0x07, 0xc0}, {0x0d, 0xb7}, {0x0e, 0x01}, {0x4c, 0x00}, {0x4a, 0x81},
+ {0x21, 0x99}, {0x24, 0x40}, {0x25, 0x38}, {0x26, 0x82}, {0x5c, 0x00},
+ {0x63, 0x00}, {0x46, 0x22}, {0x0c, 0x3a}, {0x5d, 0x55}, {0x5e, 0x7d},
+ {0x5f, 0x7d}, {0x60, 0x55}, {0x61, 0x70}, {0x62, 0x80}, {0x7c, 0x05},
+ {0x20, 0x80}, {0x28, 0x30}, {0x6c, 0x00}, {0x6d, 0x80}, {0x6e, 0x00},
+ {0x70, 0x02}, {0x71, 0x94}, {0x73, 0xc1}, {0x3d, 0x34}, {0x12, 0x04},
+ {0x5a, 0x57}, {0x4f, 0xbb}, {0x50, 0x9c}, {0xff, 0x00}, {0xe5, 0x7f},
+ {0xf9, 0xc0}, {0x41, 0x24}, {0xe0, 0x14}, {0x76, 0xff}, {0x33, 0xa0},
+ {0x42, 0x20}, {0x43, 0x18}, {0x4c, 0x00}, {0x87, 0xd0}, {0x88, 0x3f},
+ {0xd7, 0x03}, {0xd9, 0x10}, {0xd3, 0x82}, {0xc8, 0x08}, {0xc9, 0x80},
+ {0x7c, 0x00}, {0x7d, 0x00}, {0x7c, 0x03}, {0x7d, 0x48}, {0x7d, 0x48},
+ {0x7c, 0x08}, {0x7d, 0x20}, {0x7d, 0x10}, {0x7d, 0x0e}, {0x90, 0x00},
+ {0x91, 0x0e}, {0x91, 0x1a}, {0x91, 0x31}, {0x91, 0x5a}, {0x91, 0x69},
+ {0x91, 0x75}, {0x91, 0x7e}, {0x91, 0x88}, {0x91, 0x8f}, {0x91, 0x96},
+ {0x91, 0xa3}, {0x91, 0xaf}, {0x91, 0xc4}, {0x91, 0xd7}, {0x91, 0xe8},
+ {0x91, 0x20}, {0x92, 0x00}, {0x93, 0x06}, {0x93, 0xe3}, {0x93, 0x03},
+ {0x93, 0x03}, {0x93, 0x00}, {0x93, 0x02}, {0x93, 0x00}, {0x93, 0x00},
+ {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00},
+ {0x96, 0x00}, {0x97, 0x08}, {0x97, 0x19}, {0x97, 0x02}, {0x97, 0x0c},
+ {0x97, 0x24}, {0x97, 0x30}, {0x97, 0x28}, {0x97, 0x26}, {0x97, 0x02},
+ {0x97, 0x98}, {0x97, 0x80}, {0x97, 0x00}, {0x97, 0x00}, {0xa4, 0x00},
+ {0xa8, 0x00}, {0xc5, 0x11}, {0xc6, 0x51}, {0xbf, 0x80}, {0xc7, 0x10},
+ {0xb6, 0x66}, {0xb8, 0xa5}, {0xb7, 0x64}, {0xb9, 0x7c}, {0xb3, 0xaf},
+ {0xb4, 0x97}, {0xb5, 0xff}, {0xb0, 0xc5}, {0xb1, 0x94}, {0xb2, 0x0f},
+ {0xc4, 0x5c}, {0xa6, 0x00}, {0xa7, 0x20}, {0xa7, 0xd8}, {0xa7, 0x1b},
+ {0xa7, 0x31}, {0xa7, 0x00}, {0xa7, 0x18}, {0xa7, 0x20}, {0xa7, 0xd8},
+ {0xa7, 0x19}, {0xa7, 0x31}, {0xa7, 0x00}, {0xa7, 0x18}, {0xa7, 0x20},
+ {0xa7, 0xd8}, {0xa7, 0x19}, {0xa7, 0x31}, {0xa7, 0x00}, {0xa7, 0x18},
+ {0x7f, 0x00}, {0xe5, 0x1f}, {0xe1, 0x77}, {0xdd, 0x7f}, {0xc2, 0x0e}
+};
+#define OV2640_INITIALREGS_NENTRIES ARRAY_NENTRIES(g_ov2640_initialregs)
+
+/* Resolution register settings */
+
+static const struct ovr2640_reg_s g_ov2640_resolution_common[] =
+{
+ {0xff, 0x00}, {0xe0, 0x04}, {0xc0, 0xc8}, {0xc1, 0x96}, {0x86, 0x3d},
+ {0x51, 0x90}, {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88},
+ {0x57, 0x00}
+};
+#define OV2640_RESOLUTION_COMMON_NENTRIES ARRAY_NENTRIES(g_ov2640_resolution_common)
+
+#if defined(CONFIG_OV2640_QCIF_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_qcif_resolution[] =
+{
+ {0x50, 0x9b}, {0x5a, 0x2c}, {0x5b, 0x24}, {0x5c, 0x00}, {0xd3, 0x04},
+ {0xe0, 0x00}
+};
+#define OV2640_QCIF_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_qcif_resolution)
+
+#elif defined(CONFIG_OV2640_QVGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_qvga_resolution[] =
+{
+ {0x50, 0x92}, {0x5a, 0x50}, {0x5b, 0x3c}, {0x5c, 0x00}, {0xd3, 0x04},
+ {0xe0, 0x00},
+};
+#define OV2640_QVGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_qvga_resolution)
+
+#elif defined(CONFIG_OV2640_CIF_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_cif_resolution[] =
+{
+ {0x50, 0x92}, {0x5a, 0x58}, {0x5b, 0x48}, {0x5c, 0x00}, {0xd3, 0x08},
+ {0xe0, 0x00}
+};
+#define OV2640_CIF_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_cif_resolution)
+
+#elif defined(CONFIG_OV2640_VGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_vga_resolution[] =
+{
+ {0x50, 0x80}, {0x5a, 0xa0}, {0x5b, 0x78}, {0x5c, 0x00}, {0xd3, 0x02},
+ {0xe0, 0x00}
+};
+#define OV2640_VGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_vga_resolution)
+
+#elif defined(CONFIG_OV2640_SVGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_svga_resolution[] =
+{
+ {0x50, 0x89}, {0x5a, 0xc8}, {0x5b, 0x96}, {0x5c, 0x00}, {0xd3, 0x02},
+ {0xe0, 0x00}
+};
+#define OV2640_SVGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_svga_resolution)
+
+#elif defined(CONFIG_OV2640_XVGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_xga_resolution[] =
+{
+ {0x50, 0x80}, {0x5a, 0x00}, {0x5b, 0xc0}, {0x5c, 0x01}, {0xd3, 0x02},
+ {0xe0, 0x00}, {0x50, 0x00}
+};
+#define OV2640_XGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_xga_resolution)
+
+#elif defined(CONFIG_OV2640_SXGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_sxga_resolution[] =
+{
+ {0x50, 0x80}, {0x5a, 0x40}, {0x5b, 0x00}, {0x5c, 0x05}, {0xd3, 0x02},
+ {0xe0, 0x00}, {0x50, 0x00}, {0xd3, 0x82}
+};
+#define OV2640_SXGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_sxga_resolution)
+
+#elif defined(CONFIG_OV2640_UXGA_RESOLUTION)
+static const struct ovr2640_reg_s g_ov2640_uxga_resolution[] =
+{
+ {0x50, 0x80}, {0x5a, 0x90}, {0x5b, 0x2c}, {0x5c, 0x05}, {0xd3, 0x00},
+ {0xe0, 0x00}, {0x50, 0x00}, {0xd3, 0x80}
+};
+#define OV2640_UXGA_RESOLUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_uxga_resolution)
+
+#else
+# error Unknown image resolution
+#endif
+
+/* Color format register settings */
+
+static const struct ovr2640_reg_s g_ov2640_colorfmt_common[] =
+{
+ {0xff, 0x00}, {0x05, 0x00}
+};
+#define OV2640_COLORFMT_COMMON_NENTRIES ARRAY_NENTRIES(g_ov2640_colorfmt_common)
+
+#if defined(CONFIG_OV2640_YUV422_COLORFMT)
+static const struct ovr2640_reg_s g_ov2640_yuv422_colorfmt[] =
+{
+ {0xda, 0x01}, {0xd7, 0x01}, {0x33, 0xa0}, {0xe1, 0x67}, {0xe0, 0x00},
+ {0x05, 0x00}
+};
+#define OV2640_YUV422_COLORFMT_NENTRIES ARRAY_NENTRIES(g_ov2640_yuv422_colorfmt)
+
+#elif defined(CONFIG_OV2640_RGB565_COLORFMT)
+static const struct ovr2640_reg_s g_ov2640_rgb565_colorfmt[] =
+{
+ {0xda, 0x09}, {0xd7, 0x03}, {0xe0, 0x00}, {0x05, 0x00}
+};
+#define OV2640_RGB565_COLORFMT_NENTRIES ARRAY_NENTRIES(g_ov2640_rgb565_colorfmt)
+
+#else
+# error Unknown color format
+#endif
+#endif /* !CONFIG_OV2640_JPEG */
+
+#ifdef CONFIG_OV2640_JPEG
+static const struct ovr2640_reg_s g_ov2640_jpeg_init[] =
+{
+ {0xff, 0x00}, {0x2c, 0xff}, {0x2e, 0xdf}, {0xff, 0x01}, {0x3c, 0x32},
+ {0x11, 0x04}, {0x09, 0x02}, {0x04, 0x28}, {0x13, 0xe5}, {0x14, 0x48},
+ {0x2c, 0x0c}, {0x33, 0x78}, {0x3a, 0x33}, {0x3b, 0xfb}, {0x3e, 0x00},
+ {0x43, 0x11}, {0x16, 0x10}, {0x39, 0x92}, {0x35, 0xda}, {0x22, 0x1a},
+ {0x37, 0xc3}, {0x23, 0x00}, {0x34, 0xc0}, {0x36, 0x1a}, {0x06, 0x88},
+ {0x07, 0xc0}, {0x0d, 0x87}, {0x0e, 0x41}, {0x4c, 0x00}, {0x48, 0x00},
+ {0x5b, 0x00}, {0x42, 0x03}, {0x4a, 0x81}, {0x21, 0x99}, {0x24, 0x40},
+ {0x25, 0x38}, {0x26, 0x82}, {0x5c, 0x00}, {0x63, 0x00}, {0x61, 0x70},
+ {0x62, 0x80}, {0x7c, 0x05}, {0x20, 0x80}, {0x28, 0x30}, {0x6c, 0x00},
+ {0x6d, 0x80}, {0x6e, 0x00}, {0x70, 0x02}, {0x71, 0x94}, {0x73, 0xc1},
+ {0x12, 0x40}, {0x17, 0x11}, {0x18, 0x43}, {0x19, 0x00}, {0x1a, 0x4b},
+ {0x32, 0x09}, {0x37, 0xc0}, {0x4f, 0x60}, {0x50, 0xa8}, {0x6d, 0x00},
+ {0x3d, 0x38}, {0x46, 0x3f}, {0x4f, 0x60}, {0x0c, 0x3c}, {0xff, 0x00},
+ {0xe5, 0x7f}, {0xf9, 0xc0}, {0x41, 0x24}, {0xe0, 0x14}, {0x76, 0xff},
+ {0x33, 0xa0}, {0x42, 0x20}, {0x43, 0x18}, {0x4c, 0x00}, {0x87, 0xd5},
+ {0x88, 0x3f}, {0xd7, 0x03}, {0xd9, 0x10}, {0xd3, 0x82}, {0xc8, 0x08},
+ {0xc9, 0x80}, {0x7c, 0x00}, {0x7d, 0x00}, {0x7c, 0x03}, {0x7d, 0x48},
+ {0x7d, 0x48}, {0x7c, 0x08}, {0x7d, 0x20}, {0x7d, 0x10}, {0x7d, 0x0e},
+ {0x90, 0x00}, {0x91, 0x0e}, {0x91, 0x1a}, {0x91, 0x31}, {0x91, 0x5a},
+ {0x91, 0x69}, {0x91, 0x75}, {0x91, 0x7e}, {0x91, 0x88}, {0x91, 0x8f},
+ {0x91, 0x96}, {0x91, 0xa3}, {0x91, 0xaf}, {0x91, 0xc4}, {0x91, 0xd7},
+ {0x91, 0xe8}, {0x91, 0x20}, {0x92, 0x00}, {0x93, 0x06}, {0x93, 0xe3},
+ {0x93, 0x05}, {0x93, 0x05}, {0x93, 0x00}, {0x93, 0x04}, {0x93, 0x00},
+ {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00}, {0x93, 0x00},
+ {0x93, 0x00}, {0x96, 0x00}, {0x97, 0x08}, {0x97, 0x19}, {0x97, 0x02},
+ {0x97, 0x0c}, {0x97, 0x24}, {0x97, 0x30}, {0x97, 0x28}, {0x97, 0x26},
+ {0x97, 0x02}, {0x97, 0x98}, {0x97, 0x80}, {0x97, 0x00}, {0x97, 0x00},
+ {0xc3, 0xed}, {0xa4, 0x00}, {0xa8, 0x00}, {0xc5, 0x11}, {0xc6, 0x51},
+ {0xbf, 0x80}, {0xc7, 0x10}, {0xb6, 0x66}, {0xb8, 0xa5}, {0xb7, 0x64},
+ {0xb9, 0x7c}, {0xb3, 0xaf}, {0xb4, 0x97}, {0xb5, 0xff}, {0xb0, 0xc5},
+ {0xb1, 0x94}, {0xb2, 0x0f}, {0xc4, 0x5c}, {0xc0, 0x64}, {0xc1, 0x4b},
+ {0x8c, 0x00}, {0x86, 0x3d}, {0x50, 0x00}, {0x51, 0xc8}, {0x52, 0x96},
+ {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x00}, {0x5a, 0xc8}, {0x5b, 0x96},
+ {0x5c, 0x00}, {0xd3, 0x00}, {0xc3, 0xed}, {0x7f, 0x00}, {0xda, 0x00},
+ {0xe5, 0x1f}, {0xe1, 0x67}, {0xe0, 0x00}, {0xdd, 0x7f}, {0x05, 0x00},
+ {0x12, 0x40}, {0xd3, 0x04}, {0xc0, 0x16}, {0xc1, 0x12}, {0x8c, 0x00},
+ {0x86, 0x3d}, {0x50, 0x00}, {0x51, 0x2c}, {0x52, 0x24}, {0x53, 0x00},
+ {0x54, 0x00}, {0x55, 0x00}, {0x5a, 0x2c}, {0x5b, 0x24}, {0x5c, 0x00},
+};
+
+#define OV2640_JPEG_INIT_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_init)
+#endif
+
+#ifdef CONFIG_OV2640_JPEG
+static const struct ovr2640_reg_s g_ov2640_yuv422[] =
+{
+ {0xff, 0x00}, {0x05, 0x00}, {0xda, 0x10}, {0xd7, 0x03}, {0xdf, 0x00},
+ {0x33, 0x80}, {0x3c, 0x40}, {0xe1, 0x77}, {0x00, 0x00}
+};
+
+#define OV2640_YUV422_NENTRIES ARRAY_NENTRIES(g_ov2640_yuv422)
+#endif
+
+#ifdef CONFIG_OV2640_JPEG
+static const struct ovr2640_reg_s g_ov2640_jpeg[] =
+{
+ {0xe0, 0x14}, {0xe1, 0x77}, {0xe5, 0x1f}, {0xd7, 0x03}, {0xda, 0x10},
+ {0xe0, 0x00}, {0xff, 0x01}, {0x04, 0x08}
+};
+
+#define OV2640_JPEG_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg)
+#endif
+
+/* JPEG QCIF 176x144 */
+
+#ifdef CONFIG_OV2640_JPEG_QCIF_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_qcif_resolution[] =
+{
+ {0xff, 0x01}, {0x12, 0x40}, {0x17, 0x11}, {0x18, 0x43}, {0x19, 0x00},
+ {0x1a, 0x4b}, {0x32, 0x09}, {0x4f, 0xca}, {0x50, 0xa8}, {0x5a, 0x23},
+ {0x6d, 0x00}, {0x39, 0x12}, {0x35, 0xda}, {0x22, 0x1a}, {0x37, 0xc3},
+ {0x23, 0x00}, {0x34, 0xc0}, {0x36, 0x1a}, {0x06, 0x88}, {0x07, 0xc0},
+ {0x0d, 0x87}, {0x0e, 0x41}, {0x4c, 0x00}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0x64}, {0xc1, 0x4b}, {0x86, 0x35}, {0x50, 0x92}, {0x51, 0xc8},
+ {0x52, 0x96}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x00}, {0x57, 0x00},
+ {0x5a, 0x2c}, {0x5b, 0x24}, {0x5c, 0x00}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_QCIF_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_qcif_resolution)
+#endif
+
+/* JPEG QVGA 320x240 */
+
+#ifdef CONFIG_OV2640_JPEG_QVGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_qvga_resolution[] =
+{
+ {0xff, 0x01}, {0x12, 0x40}, {0x17, 0x11}, {0x18, 0x43}, {0x19, 0x00},
+ {0x1a, 0x4b}, {0x32, 0x09}, {0x4f, 0xca}, {0x50, 0xa8}, {0x5a, 0x23},
+ {0x6d, 0x00}, {0x39, 0x12}, {0x35, 0xda}, {0x22, 0x1a}, {0x37, 0xc3},
+ {0x23, 0x00}, {0x34, 0xc0}, {0x36, 0x1a}, {0x06, 0x88}, {0x07, 0xc0},
+ {0x0d, 0x87}, {0x0e, 0x41}, {0x4c, 0x00}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0x64}, {0xc1, 0x4b}, {0x86, 0x35}, {0x50, 0x89}, {0x51, 0xc8},
+ {0x52, 0x96}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x00}, {0x57, 0x00},
+ {0x5a, 0x50}, {0x5b, 0x3c}, {0x5c, 0x00}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_QVGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_qvga_resolution)
+#endif
+
+/* JPEG CIF 352x288 */
+
+#ifdef CONFIG_OV2640_JPEG_CIF_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_cif_resolution[] =
+{
+ {0xff, 0x01}, {0x12, 0x40}, {0x17, 0x11}, {0x18, 0x43}, {0x19, 0x00},
+ {0x1a, 0x4b}, {0x32, 0x09}, {0x4f, 0xca}, {0x50, 0xa8}, {0x5a, 0x23},
+ {0x6d, 0x00}, {0x39, 0x12}, {0x35, 0xda}, {0x22, 0x1a}, {0x37, 0xc3},
+ {0x23, 0x00}, {0x34, 0xc0}, {0x36, 0x1a}, {0x06, 0x88}, {0x07, 0xc0},
+ {0x0d, 0x87}, {0x0e, 0x41}, {0x4c, 0x00}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0x64}, {0xc1, 0x4b}, {0x86, 0x35}, {0x50, 0x89}, {0x51, 0xc8},
+ {0x52, 0x96}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x00}, {0x57, 0x00},
+ {0x5a, 0x58}, {0x5b, 0x48}, {0x5c, 0x00}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_CIF_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_cif_resolution)
+#endif
+
+/* JPEG VGA 640x480 */
+
+#ifdef CONFIG_OV2640_JPEG_VGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_vga_resolution[] =
+{
+ {0xff, 0x01}, {0x11, 0x01}, {0x12, 0x00}, {0x17, 0x11}, {0x18, 0x75},
+ {0x32, 0x36}, {0x19, 0x01}, {0x1a, 0x97}, {0x03, 0x0f}, {0x37, 0x40},
+ {0x4f, 0xbb}, {0x50, 0x9c}, {0x5a, 0x57}, {0x6d, 0x80}, {0x3d, 0x34},
+ {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a}, {0x37, 0x40}, {0x34, 0xa0},
+ {0x06, 0x02}, {0x0d, 0xb7}, {0x0e, 0x01}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0xc8}, {0xc1, 0x96}, {0x86, 0x3d}, {0x50, 0x89}, {0x51, 0x90},
+ {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88}, {0x57, 0x00},
+ {0x5a, 0xa0}, {0x5b, 0x78}, {0x5c, 0x00}, {0xd3, 0x04}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_VGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_vga_resolution)
+#endif
+
+/* JPEG SVGA 800x600 */
+
+#ifdef CONFIG_OV2640_JPEG_SVGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_svga_resolution[] =
+{
+ {0xff, 0x01}, {0x11, 0x01}, {0x12, 0x00}, {0x17, 0x11}, {0x18, 0x75},
+ {0x32, 0x36}, {0x19, 0x01}, {0x1a, 0x97}, {0x03, 0x0f}, {0x37, 0x40},
+ {0x4f, 0xbb}, {0x50, 0x9c}, {0x5a, 0x57}, {0x6d, 0x80}, {0x3d, 0x34},
+ {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a}, {0x37, 0x40}, {0x34, 0xa0},
+ {0x06, 0x02}, {0x0d, 0xb7}, {0x0e, 0x01}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0xc8}, {0xc1, 0x96}, {0x86, 0x35}, {0x50, 0x89}, {0x51, 0x90},
+ {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88}, {0x57, 0x00},
+ {0x5a, 0xc8}, {0x5b, 0x96}, {0x5c, 0x00}, {0xd3, 0x02}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_SVGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_svga_resolution)
+#endif
+
+/* JPEG 1024x768 */
+
+#ifdef CONFIG_OV2640_JPEG_XVGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_xvga_resolution[] =
+{
+ {0xff, 0x01}, {0x11, 0x01}, {0x12, 0x00}, {0x17, 0x11}, {0x18, 0x75},
+ {0x32, 0x36}, {0x19, 0x01}, {0x1a, 0x97}, {0x03, 0x0f}, {0x37, 0x40},
+ {0x4f, 0xbb}, {0x50, 0x9c}, {0x5a, 0x57}, {0x6d, 0x80}, {0x3d, 0x34},
+ {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a}, {0x37, 0x40}, {0x34, 0xa0},
+ {0x06, 0x02}, {0x0d, 0xb7}, {0x0e, 0x01}, {0xff, 0x00}, {0xc0, 0xc8},
+ {0xc1, 0x96}, {0x8c, 0x00}, {0x86, 0x3d}, {0x50, 0x00}, {0x51, 0x90},
+ {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88}, {0x5a, 0x00},
+ {0x5b, 0xc0}, {0x5c, 0x01}, {0xd3, 0x02}
+};
+
+#define OV2640_JPEG_XVGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_xvga_resolution)
+#endif
+
+/* JPEG 1280x1024 */
+
+#ifdef CONFIG_OV2640_JPEG_SXVGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_sxvga_resolution[] =
+{
+ {0xff, 0x01}, {0x11, 0x01}, {0x12, 0x00}, {0x17, 0x11}, {0x18, 0x75},
+ {0x32, 0x36}, {0x19, 0x01}, {0x1a, 0x97}, {0x03, 0x0f}, {0x37, 0x40},
+ {0x4f, 0xbb}, {0x50, 0x9c}, {0x5a, 0x57}, {0x6d, 0x80}, {0x3d, 0x34},
+ {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a}, {0x37, 0x40}, {0x34, 0xa0},
+ {0x06, 0x02}, {0x0d, 0xb7}, {0x0e, 0x01}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0xc8}, {0xc1, 0x96}, {0x86, 0x3d}, {0x50, 0x00}, {0x51, 0x90},
+ {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88}, {0x57, 0x00},
+ {0x5a, 0x40}, {0x5b, 0xf0}, {0x5c, 0x01}, {0xd3, 0x02}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_SXVGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_sxvga_resolution)
+#endif
+
+/* JPEG 1600x1200 */
+
+#ifdef CONFIG_OV2640_JPEG_UXGA_RESOLUTION
+static const struct ovr2640_reg_s g_ov2640_jpeg_uxga_resolution[] =
+{
+ {0xff, 0x01}, {0x11, 0x01}, {0x12, 0x00}, {0x17, 0x11}, {0x18, 0x75},
+ {0x32, 0x36}, {0x19, 0x01}, {0x1a, 0x97}, {0x03, 0x0f}, {0x37, 0x40},
+ {0x4f, 0xbb}, {0x50, 0x9c}, {0x5a, 0x57}, {0x6d, 0x80}, {0x3d, 0x34},
+ {0x39, 0x02}, {0x35, 0x88}, {0x22, 0x0a}, {0x37, 0x40}, {0x34, 0xa0},
+ {0x06, 0x02}, {0x0d, 0xb7}, {0x0e, 0x01}, {0xff, 0x00}, {0xe0, 0x04},
+ {0xc0, 0xc8}, {0xc1, 0x96}, {0x86, 0x3d}, {0x50, 0x00}, {0x51, 0x90},
+ {0x52, 0x2c}, {0x53, 0x00}, {0x54, 0x00}, {0x55, 0x88}, {0x57, 0x00},
+ {0x5a, 0x90}, {0x5b, 0x2c}, {0x5c, 0x05}, {0xd3, 0x02}, {0xe0, 0x00}
+};
+
+#define OV2640_JPEG_UXGA_RESOUTION_NENTRIES ARRAY_NENTRIES(g_ov2640_jpeg_uxga_resolution)
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+/****************************************************************************
+ * Function: ov2640_putreg
+ *
+ * Description:
+ * Set one OV2640 register
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ * regaddr - The address of the OV2640 register to set
+ * regval - The new value of the register
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+static int ov2640_putreg(FAR struct i2c_dev_s *i2c, uint8_t regaddr,
+ uint8_t regval)
+{
+ uint8_t buffer[2];
+ int ret;
+
+#ifdef CONFIG_OV2640_REGDEBUG
+ dbg("%02x <- %02x\n", regaddr, regval);
+#endif
+
+ /* Set up for the transfer */
+
+ buffer[0] = regaddr; /* Register address */
+ buffer[1] = regval; /* New register value */
+
+ /* And do it */
+
+ ret = I2C_WRITE(i2c, buffer, 2);
+ if (ret < 0)
+ {
+ gdbg("ERROR: I2C_WRITE failed: %d\n", ret);
+ return ret;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Function: ov2640_getreg
+ *
+ * Description:
+ * Set one OV2640 register
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ * regaddr - The address of the OV2640 register to set
+ * regval - The new value of the register
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+static uint8_t ov2640_getreg(FAR struct i2c_dev_s *i2c, uint8_t regaddr)
+{
+ uint8_t regval;
+ int ret;
+
+ /* Write the register address */
+
+ ret = I2C_WRITE(i2c, &regaddr, 1);
+ if (ret < 0)
+ {
+ gdbg("ERROR: I2C_WRITE failed: %d\n", ret);
+ return 0;
+ }
+
+ /* Restart and read 8-bits from the register */
+
+ ret = I2C_READ(i2c, &regval, 1);
+ if (ret < 0)
+ {
+ gdbg("ERROR: I2C_READ failed: %d\n", ret);
+ return 0;
+ }
+#ifdef CONFIG_OV2640_REGDEBUG
+ else
+ {
+ dbg("%02x -> %02x\n", regaddr, regval);
+ }
+#endif
+
+ return regval;
+}
+
+/****************************************************************************
+ * Function: ov2640_putreglist
+ *
+ * Description:
+ * Set a list of OV2640 register values.
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ * reglist - The address of list of OV2640 register settings
+ * nentries - The number of entries in the list
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+static int ov2640_putreglist(FAR struct i2c_dev_s *i2c,
+ FAR const struct ovr2640_reg_s *reglist,
+ size_t nentries)
+{
+ FAR const struct ovr2640_reg_s *entry;
+ int ret;
+
+ for (entry = reglist; nentries > 0; nentries--, entry++)
+ {
+ ret = ov2640_putreg(i2c, entry->regaddr, entry->regval);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+ return ret;
+ }
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Function: ovr2640_chipid
+ *
+ * Description:
+ * Read and verify the CHIP ID
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+static int ovr2640_chipid(FAR struct i2c_dev_s *i2c)
+{
+ uint8_t pidl;
+ uint8_t pidh;
+#if CONFIG_DEBUG_GRAPHICS
+ uint8_t midh;
+ uint8_t midl;
+#endif
+ int ret;
+
+ /* Check and show product ID and manufacturer ID */
+
+ ret = ov2640_putreg(i2c, 0xff, 0x01); /* Select the sensor address bank */
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+ return ret;
+ }
+
+ pidl = ov2640_getreg(i2c, 0x0a); /* Product ID (MS) */
+ pidh = ov2640_getreg(i2c, 0x0b); /* Product ID (LS) */
+
+#if CONFIG_DEBUG_GRAPHICS
+ midh = ov2640_getreg(i2c, 0x1c); /* Manufacturer ID (high) = 0x7f */
+ midl = ov2640_getreg(i2c, 0x1d); /* Manufacturer ID (low) = 0xa2 */
+#endif
+
+ if (pidl != OVR2640_PRODUCT_IDL || pidh != OVR2640_PRODUCT_IDH)
+ {
+ gdbg("ERROR: Unsupported PID=%02x$02x MID=%02x%02x\n",
+ pidh, pidl, midh, midl);
+ return -ENOSYS;
+ }
+
+ gvdbg("PID=%02x$02x MID=%02x%02x\n", pidh, pidl, midh, midl);
+ return OK;
+}
+
+/****************************************************************************
+ * Function: ov2640_reset
+ *
+ * Description:
+ * Reset the OV2640.
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ * reglist - The address of list of OV2640 register settings
+ * nentries - The number of entries in the list
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+static int ov2640_reset(FAR struct i2c_dev_s *i2c)
+{
+ int ret;
+
+ ret = ov2640_putreglist(i2c, g_ov2640_reset, OV2640_RESET_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ return ret;
+ }
+
+ up_mdelay(5);
+ return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+/****************************************************************************
+ * Function: ov2640_initialize
+ *
+ * Description:
+ * Initialize the OV2640.
+ *
+ * Parameters:
+ * i2c - Reference to the I2C driver structure
+ *
+ * Returned Value:
+ * On success, a non-NULL reference tot he ov2640 driver structure is
+ * returned; NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct ov2640_dev_s *ov2640_initialize(struct i2c_dev_s *i2c)
+{
+ FAR struct ov2640_dev_s *priv;
+ int ret;
+
+#ifdef CONFIG_OV2640_MULTIPLE
+ /* Allocate a new OV2640 device structure */
+
+ priv = (FAR struct ov2640_dev_s *)kmalloc(sizeof(struct ov2640_dev_s));
+ if (!priv)
+ {
+ gdbg("ERROR: Failed to allocate OV2640 device structure\n");
+ return -ENOMEM;
+ }
+
+#else /* CONFIG_OV2640_MULTIPLE */
+
+ /* There is only a single OV2640. Use the single, pre-allocated device
+ * structure
+ */
+
+ priv = &g_ov2640;
+
+#endif /* CONFIG_OV2640_MULTIPLE */
+
+ /* Initialize the OV2640 device structure */
+
+ memset(priv, 0, sizeof(struct ov2640_dev_s));
+ priv->i2c = i2c;
+
+ /* Configure I2C bus for the OV2640 */
+
+ I2C_SETADDRESS(i2c, CONFIG_OV2640_FREQUENCY, 7);
+ I2C_SETFREQUENCY(i2c, CONFIG_OV2640_I2CADDR);
+
+ /* Reset the OVR2640 */
+
+ ret = ov2640_reset(i2c);
+ if (ret < 0)
+ {
+ goto errout;
+ }
+
+ /* Check the CHIP ID */
+
+ ret = ovr2640_chipid(i2c);
+ if (ret < 0)
+ {
+ goto errout;
+ }
+
+ /* Initialize the OV2640 hardware */
+
+#ifdef CONFIG_OV2640_JPEG
+ /* Initialize for JPEG output */
+
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_init, OV2640_JPEG_INIT_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+ ret = ov2640_putreglist(i2c, g_ov2640_yuv422, OV2640_YUV422_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg, OV2640_JPEG_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+ ret = ov2640_putreg(i2c, 0xff, 0x01);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+ goto errout;
+ }
+
+ ret = ov2640_putreg(i2c, 0x15, 0x00);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+ goto errout;
+ }
+
+#if defined(CONFIG_OV2640_JPEG_QCIF_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_qcif_resolution,
+ OV2640_JPEG_QCIF_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_QVGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_qvga_resolution,
+ OV2640_JPEG_QVGA_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_CIF_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_cif_resolution,
+ OV2640_JPEG_CIF_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_VGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_vga_resolution,
+ OV2640_JPEG_VGA_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_SVGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_svga_resolution,
+ OV2640_JPEG_SVGA_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_XVGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_xvga_resolution,
+ OV2640_JPEG_XVGA_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_SXVGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_sxvga_resolution,
+ OV2640_JPEG_SXVGA_RESOUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_JPEG_UXGA_RESOLUTION)
+ ret = ov2640_putreglist(i2c, g_ov2640_jpeg_uxga_resolution,
+ OV2640_JPEG_UXGA_RESOUTION_NENTRIES);
+
+#else
+# error Unspecified JPEG resolution
+#endif
+
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+#else /* CONFIG_OV2640_JPEG */
+
+ /* Setup initial register values */
+
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_initialregs,
+ OV2640_INITIALREGS_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+ /* Setup image resolution */
+
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_resolution_common,
+ OV2640_RESOLUTION_COMMON_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+#if defined(CONFIG_OV2640_QCIF_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_qcif_resolution,
+ OV2640_QCIF_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_QVGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_qvga_resolution,
+ OV2640_QVGA_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_CIF_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_cif_resolution,
+ OV2640_CIF_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_VGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_vga_resolution,
+ OV2640_VGA_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_SVGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_svga_resolution,
+ OV2640_SVGA_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_XGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_xga_resolution,
+ OV2640_XGA_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_SXGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_sxga_resolution,
+ OV2640_SXGA_RESOLUTION_NENTRIES);
+
+#elif defined(CONFIG_OV2640_UXGA_RESOLUTION)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_uxga_resolution,
+ OV2640_UXGA_RESOLUTION_NENTRIES);
+
+#else
+# error Unknown image resolution
+#endif
+
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+/* Color format register settings */
+
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_colorfmt_common,
+ OV2640_COLORFMT_COMMON_NENTRIES);
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+#if defined(CONFIG_OV2640_YUV422_COLORFMT)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_yuv422_colorfmt,
+ OV2640_YUV422_COLORFMT_NENTRIES);
+
+#elif defined(CONFIG_OV2640_RGB565_COLORFMT)
+ ret = ov2640_putreglist(priv->i2c, g_ov2640_rgb565_colorfmt,
+ OV2640_RGB565_COLORFMT_NENTRIES);
+
+#else
+# error Unknown color format
+#endif
+
+ if (ret < 0)
+ {
+ gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+ goto errout;
+ }
+
+ return OK;
+
+#endif /* CONFIG_OV2640_JPEG */
+
+ return priv;
+
+errout:
+ gdbg("ERROR: Failed to intialize the OV2640: %d\n", ret);
+
+#ifdef CONFIG_OV2640_MULTIPLE
+ kfree(priv);
+#endif /* CONFIG_OV2640_MULTIPLE */
+
+ (void)ov2640_reset(i2c);
+ return NULL;
+}
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-30 15:07:34 +0000