diff options
Diffstat (limited to 'nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h')
| -rw-r--r-- | nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h b/nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h index 795f6b5f6..eac6e2868 100644 --- a/nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h +++ b/nuttx/arch/mips/src/pic32mz/chip/pic32mzec-pps.h @@ -79,13 +79,13 @@ # define PIC32MZ_U4RXR_OFFSET 0x1480 # define PIC32MZ_U5RXR_OFFSET 0x1488 # define PIC32MZ_U6RXR_OFFSET 0x1490 -#define PIC32MZ_UnTSR_OFFSET(n) (0x1464 + ((n << 3)) /* n=1..6 */ -# define PIC32MZ_U1TSR_OFFSET 0x146c -# define PIC32MZ_U2TSR_OFFSET 0x1474 -# define PIC32MZ_U3TSR_OFFSET 0x147c -# define PIC32MZ_U4TSR_OFFSET 0x1484 -# define PIC32MZ_U5TSR_OFFSET 0x148c -# define PIC32MZ_U6TSR_OFFSET 0x1494 +#define PIC32MZ_UnCTSR_OFFSET(n) (0x1464 + ((n << 3)) /* n=1..6 */ +# define PIC32MZ_U1CTSR_OFFSET 0x146c +# define PIC32MZ_U2CTSR_OFFSET 0x1474 +# define PIC32MZ_U3CTSR_OFFSET 0x147c +# define PIC32MZ_U4CTSR_OFFSET 0x1484 +# define PIC32MZ_U5CTSR_OFFSET 0x148c +# define PIC32MZ_U6CTSR_OFFSET 0x1494 #define PIC32MZ_SDInR_OFFSET(n) (0x1490 + 12*(n)) /* n=1..6 */ # define PIC32MZ_SDI1R_OFFSET 0x149c # define PIC32MZ_SDI2R_OFFSET 0x14a8 @@ -208,13 +208,13 @@ # define PIC32MZ_U4RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4RXR_OFFSET) # define PIC32MZ_U5RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5RXR_OFFSET) # define PIC32MZ_U6RXR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6RXR_OFFSET) -#define PIC32MZ_UnTSR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_UnTSR_OFFSET(n) -# define PIC32MZ_U1TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U1TSR_OFFSET) -# define PIC32MZ_U2TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U2TSR_OFFSET) -# define PIC32MZ_U3TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U3TSR_OFFSET) -# define PIC32MZ_U4TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4TSR_OFFSET) -# define PIC32MZ_U5TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5TSR_OFFSET) -# define PIC32MZ_U6TSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6TSR_OFFSET) +#define PIC32MZ_UnCTSR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_UnCTSR_OFFSET(n) +# define PIC32MZ_U1CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U1CTSR_OFFSET) +# define PIC32MZ_U2CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U2CTSR_OFFSET) +# define PIC32MZ_U3CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U3CTSR_OFFSET) +# define PIC32MZ_U4CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U4CTSR_OFFSET) +# define PIC32MZ_U5CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U5CTSR_OFFSET) +# define PIC32MZ_U6CTSR (PIC32MZ_IOPORT_K1BASE+PIC32MZ_U6CTSR_OFFSET) #define PIC32MZ_SDInR(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDInR_OFFSET(n)) # define PIC32MZ_SDI1R (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDI1R_OFFSET) # define PIC32MZ_SDI2R (PIC32MZ_IOPORT_K1BASE+PIC32MZ_SDI2R_OFFSET) |