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* ENCX24J600: Use the ENC's SRAM from multiple TX packets. From Max HoltzbergGregory Nutt2013-08-263-41/+137
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* #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAOGregory Nutt2013-08-262-0/+7
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* Fix an bug where long ROMFS file names are not read correctly. From Mike SmithGregory Nutt2013-08-252-14/+25
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* SAMA5 EHCI: Data toggle and status phase fixesGregory Nutt2013-08-252-4/+3
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* Add ENCX24J600 Ethernet driver and support for the ENCX24J600 with the ↵Gregory Nutt2013-08-2511-8/+3509
| | | | Olimex STM32 P107 board. From Max Holtberg
* EHCI reset bit was not being set correctlyGregory Nutt2013-08-251-1/+1
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* SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself ↵Gregory Nutt2013-08-252-1/+22
| | | | again after changes to integrate with EHCI
* SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug ↵Gregory Nutt2013-08-252-36/+37
| | | | output
* Network ARP harvesting: Corect backward condition in netmask task. From Max ↵Gregory Nutt2013-08-252-7/+10
| | | | Holtzberg
* SAMA5D3x-EK: Fix some backward conditional compilationGregory Nutt2013-08-243-5/+9
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* SAMA5: OHCI various bugfixes for interrupt handlingGregory Nutt2013-08-241-23/+36
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* SAMA5: EHCI now handles low- and full-speed connections by giving them to ↵Gregory Nutt2013-08-249-191/+412
| | | | OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt
* SAMA5 EHCI: Added logic to detect port speed. Handling is insufficientGregory Nutt2013-08-242-3/+82
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* Fix #endif with missing #if condition. Reported by Andrew BradfordGregory Nutt2013-08-233-1/+5
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* SAMA5/ECHI: Debug register access, add logic to determine transfer size, ↵Gregory Nutt2013-08-234-54/+161
| | | | fix setting of control bit in token
* SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From ↵Gregory Nutt2013-08-233-1/+27
| | | | CCTSAO
* SAMA5 EHCI: cosmetic changesGregory Nutt2013-08-231-14/+15
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* SAMA5: Add support for sharing ports when both OHCI and EHCI are enabledGregory Nutt2013-08-236-70/+246
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* SAMA5 EHCI: Fix some list traversal bugsGregory Nutt2013-08-221-41/+106
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* SAMA5 EHCI: Initial debug changesGregory Nutt2013-08-222-23/+159
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* SAMA5 EHCI: No complete for bulk and control endpointsGregory Nutt2013-08-222-99/+148
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* SAMA5 EHCI: Add data transfer logic for asynchronous endpointsGregory Nutt2013-08-221-20/+488
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* SAMA5 EHCI: Add IOC error handlingGregory Nutt2013-08-222-33/+106
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* SAMA5 EHCI: transfer termination logic. IncompleteGregory Nutt2013-08-211-102/+464
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* SAMA5 EHCI: Hardware initialization logicGregory Nutt2013-08-212-16/+213
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* Move all SAMA5 EHCI interrupt handling to the worker threadGregory Nutt2013-08-214-29/+442
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* ENC28J60 errors reported by Max HoltzbergGregory Nutt2013-08-211-2/+2
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* SAMA5 EHCI: At list-oriented cache operationsGregory Nutt2013-08-201-2/+96
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* Add SAMA5 EHCI list traversal logicGregory Nutt2013-08-201-15/+235
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* Beginning of support for SAMA5 EHCI. Not much there yetGregory Nutt2013-08-2010-18/+1744
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* Add kernel/user memalign functions. Not fully integratedGregory Nutt2013-08-205-6/+33
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* SAMA5 OHCI+EHCI mostly cosmetic changesGregory Nutt2013-08-193-11/+46
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* USB host: Add device address management support in preparation for USB hub ↵Gregory Nutt2013-08-186-4/+491
| | | | support
* Add few more EHCI definitionsGregory Nutt2013-08-185-33/+172
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* Completes EHCI header fileGregory Nutt2013-08-182-567/+799
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* STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran ↵Gregory Nutt2013-08-182-1/+4
| | | | Liao
* Add EHCI header file (not quite complete)Gregory Nutt2013-08-173-2/+568
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* SAMA5 OHCI: Driver is now basically functionalGregory Nutt2013-08-162-15/+73
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* SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things ↵Gregory Nutt2013-08-162-194/+278
| | | | happen when semaphores lie in DMA memory which is occasionally invalidated
* STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. ↵Gregory Nutt2013-08-162-3/+17
| | | | From Teemu Pirinen
* SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list ↵Gregory Nutt2013-08-151-53/+106
| | | | like other cases
* SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until ↵Gregory Nutt2013-08-152-124/+269
| | | | port is connected
* SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no ↵Gregory Nutt2013-08-142-5/+7
| | | | idea why
* SAMA5: ports should not be reset state (seems to make no difference)Gregory Nutt2013-08-142-2/+16
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* SAMA5: Alternatie clock configuration that yields a perfect 48MHz full ↵Gregory Nutt2013-08-146-127/+386
| | | | speed USB clock and a CPU clock of 384MHz
* SAMA5: Fix out of range USB PLL divisorGregory Nutt2013-08-141-3/+5
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* SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as ↵Gregory Nutt2013-08-145-170/+622
| | | | necessary
* Clean up some LP17xx and STM32 USB host configuration compilation errors due ↵Gregory Nutt2013-08-137-80/+187
| | | | to the massive changes to the USB host interfaces needed to support the SAMA5
* SAMA5: Major restructuring of the the OHCI driver drivers to better handle ↵Gregory Nutt2013-08-135-242/+257
| | | | the multiple root hub ports and concureent transfers on each port.
* Separate wait() and enumerate() methods from struct usbhost_driver_s and ↵Gregory Nutt2013-08-1321-133/+169
| | | | move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
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