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* Tiva Ethernet: MMC interrupts need to be disable initiallyGregory Nutt2015-01-021-5/+12
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* Tiva Ethernet: Update DMA BUSMODE settings based on TI example codeGregory Nutt2015-01-021-42/+101
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* Tiva Ethernet: Update PHY initializationGregory Nutt2015-01-022-191/+101
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* STM32 RTC: Add Kconfig options needed with the preceding commitGregory Nutt2015-01-021-0/+22
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* stm32-rtc: Add support for the internal low speed clock (LSI)Gregory Nutt2015-01-025-15/+84
| | | | | | Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock. Turn on by defining CONFIG_RTC_LSICLOCK. From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
* Cosmetic update to some commentsGregory Nutt2015-01-022-1/+6
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* Cosmetic change to file formattingGregory Nutt2015-01-011-2/+2
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* TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user ↵Gregory Nutt2015-01-014-9/+34
| | | | FLASH registers
* Tiva FLASH: Add FLASH register definitions for the TM4C129 familyGregory Nutt2015-01-014-126/+574
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* Tiva PHY: Hard code some properties of the internal PHYGregory Nutt2015-01-013-10/+44
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* Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be doneGregory Nutt2015-01-011-42/+293
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* Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header ↵Gregory Nutt2015-01-013-5/+314
| | | | files
* Ethernet skeleton: Add some more example logicGregory Nutt2014-12-311-6/+2
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* Tiva Ethernet: Integrate use of workqueue so the network processing is not ↵Gregory Nutt2014-12-311-39/+314
| | | | done at the interrupt level
* Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHYGregory Nutt2014-12-312-22/+42
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* Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is ↵Gregory Nutt2014-12-314-6/+3646
| | | | basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment
* Tiva Ethernet: Minor naming update for compatibilityGregory Nutt2014-12-311-51/+44
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* Tiva Ethernet: Add DMA descriptor definitionsGregory Nutt2014-12-311-2/+186
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* Mostly cosmeticGregory Nutt2014-12-301-18/+22
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* Tiva Ethernet: Completes TM4C129X Ethernet register definition header fileGregory Nutt2014-12-301-86/+514
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* Don't error out if no ethernet definitions availableGregory Nutt2014-12-301-2/+0
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* Tiva Ethernet: More progress with register bit definitionsGregory Nutt2014-12-301-62/+255
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* Tiva Ethernet: More progress with register bit definitionsGregory Nutt2014-12-301-11/+152
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* TM4C129G Ethernet: Add Ethernet register addresses. Header files still ↵Gregory Nutt2014-12-301-3/+378
| | | | incomplete
* Tiva: Add framework to support the uniqueu TM4C Ethernet register definitionsGregory Nutt2014-12-303-156/+285
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* stm32: update description and code documentation. Also fixes a few code ↵Gregory Nutt2014-12-291-19/+20
| | | | | | formattings. Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32: fix wait upon vertical blank. This should never have occurred before.Gregory Nutt2014-12-291-1/+1
| | | | Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32: fix faulty access to non existing layer. This disables operation ↵Gregory Nutt2014-12-291-0/+8
| | | | | | that requires double layer support, when configured for single layer only. Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* Tiva SSI: Fix oversight in last commit. Would only fixe the case where the ↵Gregory Nutt2014-12-281-3/+3
| | | | single SSI enabled was SSI0
* Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where ↵Gregory Nutt2014-12-281-0/+20
| | | | only one SSI modules is enabled
* STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David SidraneGregory Nutt2014-12-272-3/+46
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* Remove STM32-specific RX flow control logic from the upper level serial ↵Gregory Nutt2014-12-271-15/+31
| | | | driver to the lower level STM32 serial driver
* Serial Upper Half: Add watermarks to RX flow control logicGregory Nutt2014-12-271-4/+8
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* STM32: Fix some incorrectly placed conditional logicGregory Nutt2014-12-261-4/+3
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* EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel ↵Gregory Nutt2014-12-267-1/+1567
| | | | Bouteville
* ARMv7M: More runtine stack checking logic. From David SidraneGregory Nutt2014-12-261-0/+112
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* STM32 I2C: Add strings to decode trace events. From David SidraneGregory Nutt2014-12-261-3/+24
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* Add support for run time stack checking for the STM32. From David SidraneGregory Nutt2014-12-264-2/+44
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* Tiva: Update UART header file for TM4C129XGregory Nutt2014-12-221-106/+495
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* Tiva: Upate GPIO header file for TM4C129XGregory Nutt2014-12-222-136/+558
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* TM4C129X: Simplify be removing unnecessary temporary variableGregory Nutt2014-12-221-19/+19
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* TM4C129X: Simplify be removing unnecessary temporary variableGregory Nutt2014-12-221-8/+4
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* TM4C129X: First cut at new Tiva clock configuration logicGregory Nutt2014-12-222-66/+273
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* TM4C129X: A small step toward understanding new Tiva clockingGregory Nutt2014-12-222-5/+74
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* Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASEGregory Nutt2014-12-213-3/+3
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* Tiva: Add support for I2C6-9Gregory Nutt2014-12-212-2/+285
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* Tiva SSI and board configurations: hange negative Tiva logic ↵Gregory Nutt2014-12-212-43/+195
| | | | CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3
* Improved commentsGregory Nutt2014-12-214-16/+58
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* TM4C129X: Increated power/clocking macros into I2C driverGregory Nutt2014-12-214-12/+16
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* TM4C129X: Add macros to enable/disable peripheral powerGregory Nutt2014-12-215-97/+536
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