diff options
Diffstat (limited to 'src/google/protobuf/stubs/atomicops_internals_mips_gcc.h')
-rw-r--r-- | src/google/protobuf/stubs/atomicops_internals_mips_gcc.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/google/protobuf/stubs/atomicops_internals_mips_gcc.h b/src/google/protobuf/stubs/atomicops_internals_mips_gcc.h index f5837c9e..6ce6820e 100644 --- a/src/google/protobuf/stubs/atomicops_internals_mips_gcc.h +++ b/src/google/protobuf/stubs/atomicops_internals_mips_gcc.h @@ -125,8 +125,8 @@ inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, // ensure that no later memory access can be reordered ahead of the operation. // "Release" operations ensure that no previous memory access can be reordered // after the operation. "Barrier" operations have both "Acquire" and "Release" -// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory -// access. +// semantics. A MemoryBarrierInternal() has "Barrier" semantics, but does no +// memory access. inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, Atomic32 old_value, Atomic32 new_value) { @@ -149,17 +149,17 @@ inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { *ptr = value; } -inline void MemoryBarrier() { +inline void MemoryBarrierInternal() { __asm__ __volatile__("sync" : : : "memory"); } inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { *ptr = value; - MemoryBarrier(); + MemoryBarrierInternal(); } inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { - MemoryBarrier(); + MemoryBarrierInternal(); *ptr = value; } @@ -169,12 +169,12 @@ inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { Atomic32 value = *ptr; - MemoryBarrier(); + MemoryBarrierInternal(); return value; } inline Atomic32 Release_Load(volatile const Atomic32* ptr) { - MemoryBarrier(); + MemoryBarrierInternal(); return *ptr; } @@ -247,9 +247,9 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment) { - MemoryBarrier(); + MemoryBarrierInternal(); Atomic64 res = NoBarrier_AtomicIncrement(ptr, increment); - MemoryBarrier(); + MemoryBarrierInternal(); return res; } @@ -257,20 +257,20 @@ inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, // ensure that no later memory access can be reordered ahead of the operation. // "Release" operations ensure that no previous memory access can be reordered // after the operation. "Barrier" operations have both "Acquire" and "Release" -// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory -// access. +// semantics. A MemoryBarrierInternal() has "Barrier" semantics, but does no +// memory access. inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, Atomic64 old_value, Atomic64 new_value) { Atomic64 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value); - MemoryBarrier(); + MemoryBarrierInternal(); return res; } inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, Atomic64 old_value, Atomic64 new_value) { - MemoryBarrier(); + MemoryBarrierInternal(); return NoBarrier_CompareAndSwap(ptr, old_value, new_value); } @@ -280,11 +280,11 @@ inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) { inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) { *ptr = value; - MemoryBarrier(); + MemoryBarrierInternal(); } inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) { - MemoryBarrier(); + MemoryBarrierInternal(); *ptr = value; } @@ -294,12 +294,12 @@ inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) { inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) { Atomic64 value = *ptr; - MemoryBarrier(); + MemoryBarrierInternal(); return value; } inline Atomic64 Release_Load(volatile const Atomic64* ptr) { - MemoryBarrier(); + MemoryBarrierInternal(); return *ptr; } #endif |