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| author | Lukas Rytz <lukas.rytz@epfl.ch> | 2010-08-10 11:46:49 +0000 |
|---|---|---|
| committer | Lukas Rytz <lukas.rytz@epfl.ch> | 2010-08-10 11:46:49 +0000 |
| commit | 1809c97bb34c230d2f2eecb6c1a2269ca79480e9 (patch) | |
| tree | 31ed0f408520382924574636cb2cf43cdcf5f7d6 /src/compiler | |
| parent | ca0bb2c4191ff9cd7b1c5f0f8315a4db65785519 (diff) | |
| download | scala-1809c97bb34c230d2f2eecb6c1a2269ca79480e9.tar.gz scala-1809c97bb34c230d2f2eecb6c1a2269ca79480e9.tar.bz2 scala-1809c97bb34c230d2f2eecb6c1a2269ca79480e9.zip | |
fix an msil bug (code gen of exception handlers).
Diffstat (limited to 'src/compiler')
| -rw-r--r-- | src/compiler/scala/tools/nsc/backend/msil/GenMSIL.scala | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/compiler/scala/tools/nsc/backend/msil/GenMSIL.scala b/src/compiler/scala/tools/nsc/backend/msil/GenMSIL.scala index 92ba50e88e..174a1b778e 100644 --- a/src/compiler/scala/tools/nsc/backend/msil/GenMSIL.scala +++ b/src/compiler/scala/tools/nsc/backend/msil/GenMSIL.scala @@ -851,6 +851,10 @@ abstract class GenMSIL extends SubComponent { log("Generating code for block: " + block) for (handler <- beginCatchBlock.get(block)) { + if (!currentHandlers.isEmpty && currentHandlers.top.covered == handler.covered) { + currentHandlers.pop() + currentHandlers.push(handler) + } if (handler.cls == NoSymbol) { // `finally` blocks are represented the same as `catch`, but with no catch-type mcode.BeginFinallyBlock() |