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author | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2012-08-10 22:01:12 +0000 |
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committer | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2012-08-10 22:01:12 +0000 |
commit | 7189150b33612e4c91f6d9ec08a00fdfe0eece65 (patch) | |
tree | 73f84f801733d66d034be2809003d653ff593509 | |
parent | 35451abdd787f4ae8b2803095b2ae678b48be184 (diff) | |
download | px4-firmware-7189150b33612e4c91f6d9ec08a00fdfe0eece65.tar.gz px4-firmware-7189150b33612e4c91f6d9ec08a00fdfe0eece65.tar.bz2 px4-firmware-7189150b33612e4c91f6d9ec08a00fdfe0eece65.zip |
STM32 SDIO DMA setup was losing DMA priority
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5019 7fd9a85b-ad96-42d3-883c-3090e2eb8679
-rw-r--r-- | nuttx/ChangeLog | 5 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_serial.c | 25 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_spi.c | 33 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c | 4 |
5 files changed, 64 insertions, 7 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index c6ce0f130..a5da942f3 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -3143,4 +3143,7 @@ * arch/arm/*/stm32: Add support for STM32 F107 "Connectivity Line" Ethernet (contributed by Max Holtzberg). * configs/olimex-stm32-p107: Add board support for the Olimiex STM32-P107 - board (contributed by Max Holtzberg).
\ No newline at end of file + board (contributed by Max Holtzberg). + * arch/arm/src/stm32/stm32f2xx_dma.c, stm32f4xx_dma.c, stm32_serial.c, and + stm32_spic.c: DMA priority was getting zeroed by STM32 F2/F4 DMA drivers + so that all DMAs ran at the lowest priority. diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c index 01c519b39..265abfbf3 100644 --- a/nuttx/arch/arm/src/stm32/stm32_serial.c +++ b/nuttx/arch/arm/src/stm32/stm32_serial.c @@ -132,6 +132,30 @@ */ # define RXDMA_BUFFER_SIZE 32 + +/* DMA priority */ + +# ifndef CONFIG_USART_DMAPRIO +# if defined(CONFIG_STM32_STM32F10XX) +# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED +# else +# error "Unknown STM32 DMA" +# endif +# endif +# if defined(CONFIG_STM32_STM32F10XX) +# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_USART_DMAPRIO" +# endif +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_USART_DMAPRIO" +# endif +# else +# error "Unknown STM32 DMA" +# endif + #endif /* Power management definitions */ @@ -975,6 +999,7 @@ static int up_dma_setup(struct uart_dev_s *dev) DMA_SCR_MINC | DMA_SCR_PSIZE_8BITS | DMA_SCR_MSIZE_8BITS | + CONFIG_USART_DMAPRIO | DMA_SCR_PBURST_SINGLE | DMA_SCR_MBURST_SINGLE); diff --git a/nuttx/arch/arm/src/stm32/stm32_spi.c b/nuttx/arch/arm/src/stm32/stm32_spi.c index 7fdd988cb..06a994524 100644 --- a/nuttx/arch/arm/src/stm32/stm32_spi.c +++ b/nuttx/arch/arm/src/stm32/stm32_spi.c @@ -88,18 +88,47 @@ * Definitions ************************************************************************************/ /* Configuration ********************************************************************/ +/* SPI interrupts */ #ifdef CONFIG_STM32_SPI_INTERRUPTS # error "Interrupt driven SPI not yet supported" #endif +/* Can't have both interrupt driven SPI and SPI DMA */ + #if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA) # error "Cannot enable both interrupt mode and DMA mode for SPI" #endif -/* DMA channel configuration */ +/* SPI DMA priority */ + +#ifdef CONFIG_STM32_SPI_DMA + +# if defined(CONFIG_SPI_DMAPRIO) +# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO +# elif defined(CONFIG_STM32_STM32F10XX) +# define SPI_DMA_PRIO DMA_CCR_PRIMED +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# define SPI_DMA_PRIO DMA_SCR_PRIMED +# else +# error "Unknown STM32 DMA" +# endif -#define SPI_DMA_PRIO DMA_CCR_PRIMED /* Check this to alter priority */ +# if defined(CONFIG_STM32_STM32F10XX) +# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_SPI_DMAPRIO" +# endif +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_SPI_DMAPRIO" +# endif +# else +# error "Unknown STM32 DMA" +# endif + +#endif + +/* DMA channel configuration */ #define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC ) #define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC ) diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c index 7e3ece2fa..e69f6d329 100644 --- a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c +++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c @@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT| + DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_DBM|DMA_SCR_CIRC| + DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); regval |= scr; dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0; diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c index c3555d714..dce340ff9 100644 --- a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c +++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c @@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET); regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT| + DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC| DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS| - DMA_SCR_DBM|DMA_SCR_CIRC| + DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK| DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK); regval |= scr; dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0; |