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authorJulian Oes <julian@oes.ch>2013-09-03 09:34:25 +0200
committerJulian Oes <julian@oes.ch>2013-09-03 09:34:25 +0200
commit96e7f42844abbd2a3ef36e207e639c0dffe75e66 (patch)
tree4ef89b11ababd57c5d16a1d531918127fbc722d4 /Debug/px4fmu-v1-board.cfg
parent1fed9ef1b1ec2d0bf7c2cba7d60be77e37faaf40 (diff)
parent2457013bbba3e15e3fbfcc45f07428f006d56dcd (diff)
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Merge branch 'master' into python3_compat
Diffstat (limited to 'Debug/px4fmu-v1-board.cfg')
-rw-r--r--Debug/px4fmu-v1-board.cfg38
1 files changed, 38 insertions, 0 deletions
diff --git a/Debug/px4fmu-v1-board.cfg b/Debug/px4fmu-v1-board.cfg
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--- /dev/null
+++ b/Debug/px4fmu-v1-board.cfg
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+# The latest defaults in OpenOCD 0.7.0 are actually prettymuch correct for the px4fmu
+
+# increase working area to 32KB for faster flash programming
+set WORKAREASIZE 0x8000
+
+source [find target/stm32f4x.cfg]
+
+# needed for px4
+reset_config trst_only
+
+proc stm32_reset {} {
+ reset halt
+# FIXME - needed to init periphs on reset
+# 0x40023800 RCC base
+# 0x24 RCC_APB2 0x75933
+# RCC_APB2 0
+}
+
+# perform init that is required on each connection to the target
+proc stm32_init {} {
+
+ # force jtag to not shutdown during sleep
+ #uint32_t cr = getreg32(STM32_DBGMCU_CR);
+ #cr |= DBGMCU_CR_STANDBY | DBGMCU_CR_STOP | DBGMCU_CR_SLEEP;
+ #putreg32(cr, STM32_DBGMCU_CR);
+ mww 0xe0042004 00000007
+}
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq
+
+# Let GDB directly program elf binaries
+gdb_memory_map enable
+
+# doesn't work yet
+gdb_flash_program disable
+