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authorLorenz Meier <lm@inf.ethz.ch>2014-11-12 10:48:16 +0100
committerLorenz Meier <lm@inf.ethz.ch>2014-11-12 10:48:16 +0100
commitc519f569c77c9f94afde58f6ec5e9471ebf6784e (patch)
treef14017fb9bf08b92a4dc3bd3696b0a88ec367bcc /nuttx-configs/px4fmu-v2/include
parentdec25686a98356c8a2faba944317e0798d3dfd6b (diff)
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Modernize FMUv2 config (using the upstream NuttX config)
Diffstat (limited to 'nuttx-configs/px4fmu-v2/include')
-rwxr-xr-xnuttx-configs/px4fmu-v2/include/board.h136
1 files changed, 76 insertions, 60 deletions
diff --git a/nuttx-configs/px4fmu-v2/include/board.h b/nuttx-configs/px4fmu-v2/include/board.h
index 3b3c6fa70..679e4b6c0 100755
--- a/nuttx-configs/px4fmu-v2/include/board.h
+++ b/nuttx-configs/px4fmu-v2/include/board.h
@@ -1,5 +1,5 @@
/************************************************************************************
- * configs/px4fmu/include/board.h
+ * configs/px4fmu-v2_upstream/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
@@ -34,8 +34,8 @@
*
************************************************************************************/
-#ifndef __ARCH_BOARD_BOARD_H
-#define __ARCH_BOARD_BOARD_H
+#ifndef __CONFIGS_PX4FMU_V2_UPSTREAM_INCLUDE_BOARD_H
+#define __CONFIGS_PX4FMU_V2_UPSTREAM_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
@@ -141,26 +141,26 @@
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
- * otherwise frequency is 2xAPBx.
+ * otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
-/* SDIO dividers. Note that slower clocking is required when DMA is disabled
+/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
*/
-
+
#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
@@ -168,9 +168,9 @@
*/
#ifdef CONFIG_SDIO_DMA
-# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
-# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
@@ -196,82 +196,97 @@
/* Alternate function pin selections ************************************************/
-/*
- * UARTs.
- */
-#define GPIO_USART1_RX GPIO_USART1_RX_1 /* console in from IO */
-#define GPIO_USART1_TX 0 /* USART1 is RX-only */
+/* UARTs */
+
+#define GPIO_USART1_RX GPIO_USART1_RX_1 /* Console in from IO */
+#define GPIO_USART1_TX 0 /* USART1 is RX-only */
-#define GPIO_USART2_RX GPIO_USART2_RX_2
-#define GPIO_USART2_TX GPIO_USART2_TX_2
-#define GPIO_USART2_RTS GPIO_USART2_RTS_2
-#define GPIO_USART2_CTS GPIO_USART2_CTS_2
+#define GPIO_USART2_RX GPIO_USART2_RX_2
+#define GPIO_USART2_TX GPIO_USART2_TX_2
+#define GPIO_USART2_RTS GPIO_USART2_RTS_2
+#define GPIO_USART2_CTS GPIO_USART2_CTS_2
-#define GPIO_USART3_RX GPIO_USART3_RX_3
-#define GPIO_USART3_TX GPIO_USART3_TX_3
-#define GPIO_USART3_RTS GPIO_USART3_RTS_2
-#define GPIO_USART3_CTS GPIO_USART3_CTS_2
+#define GPIO_USART3_RX GPIO_USART3_RX_3
+#define GPIO_USART3_TX GPIO_USART3_TX_3
+#define GPIO_USART3_RTS GPIO_USART3_RTS_2
+#define GPIO_USART3_CTS GPIO_USART3_CTS_2
-#define GPIO_UART4_RX GPIO_UART4_RX_1
-#define GPIO_UART4_TX GPIO_UART4_TX_1
+#define GPIO_UART4_RX GPIO_UART4_RX_1
+#define GPIO_UART4_TX GPIO_UART4_TX_1
-#define GPIO_USART6_RX GPIO_USART6_RX_1
-#define GPIO_USART6_TX GPIO_USART6_TX_1
+#define GPIO_USART6_RX GPIO_USART6_RX_1
+#define GPIO_USART6_TX GPIO_USART6_TX_1
-#define GPIO_UART7_RX GPIO_UART7_RX_1
-#define GPIO_UART7_TX GPIO_UART7_TX_1
+#define GPIO_UART7_RX GPIO_UART7_RX_1
+#define GPIO_UART7_TX GPIO_UART7_TX_1
/* UART8 has no alternate pin config */
/* UART RX DMA configurations */
+
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
-/*
- * CAN
+/* CAN
*
- * CAN1 is routed to the onboard transceiver.
+ * CAN1 is routed to the onboard transceiver.
* CAN2 is routed to the expansion connector.
*/
-#define GPIO_CAN1_RX GPIO_CAN1_RX_3
-#define GPIO_CAN1_TX GPIO_CAN1_TX_3
-#define GPIO_CAN2_RX GPIO_CAN2_RX_1
-#define GPIO_CAN2_TX GPIO_CAN2_TX_2
-/*
- * I2C
+#define GPIO_CAN1_RX GPIO_CAN1_RX_3
+#define GPIO_CAN1_TX GPIO_CAN1_TX_3
+#define GPIO_CAN2_RX GPIO_CAN2_RX_1
+#define GPIO_CAN2_TX GPIO_CAN2_TX_2
+
+/* I2C
*
* The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs.
*/
-#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
-#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
-#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
-#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
-
-#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
-#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
-#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
-
-/*
- * SPI
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
+#define GPIO_I2C1_SCL_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SDA_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
+#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
+#define GPIO_I2C2_SCL_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
+
+/* SPI
*
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
-#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
+#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
+
+#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
+#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
+#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI4_MISO (GPIO_SPI4_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI4_MOSI (GPIO_SPI4_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI4_SCK (GPIO_SPI4_SCK_1|GPIO_SPEED_50MHz)
+/* LED Definitions. Needed if CONFIG_ARCH_LEDs is defined */
+
+#define LED_STARTED 0
+#define LED_HEAPALLOCATE 0
+#define LED_IRQSENABLED 0
+#define LED_STACKCREATED 1
+#define LED_INIRQ 1
+#define LED_SIGNAL 1
+#define LED_ASSERTION 1
+#define LED_PANIC 1
+
/************************************************************************************
* Public Data
************************************************************************************/
@@ -281,7 +296,8 @@
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
#else
#define EXTERN extern
#endif
@@ -299,7 +315,7 @@ extern "C" {
*
************************************************************************************/
-EXTERN void stm32_boardinitialize(void);
+void stm32_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
@@ -307,4 +323,4 @@ EXTERN void stm32_boardinitialize(void);
#endif
#endif /* __ASSEMBLY__ */
-#endif /* __ARCH_BOARD_BOARD_H */
+#endif /* __CONFIGS_PX4FMU_V2_UPSTREAM_INCLUDE_BOARD_H */