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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-18 19:16:44 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-18 19:16:44 +0000 |
commit | 40041c8792340b6148338cb3e3a28266fdff7373 (patch) | |
tree | e746a348a0a71399c9811f6645e7e4716ac45aee /nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c | |
parent | 3ff155d04803d8b19f0f56602e95b4034bc33820 (diff) | |
download | px4-firmware-40041c8792340b6148338cb3e3a28266fdff7373.tar.gz px4-firmware-40041c8792340b6148338cb3e3a28266fdff7373.tar.bz2 px4-firmware-40041c8792340b6148338cb3e3a28266fdff7373.zip |
Refactor all lpc17xx header files (more like STM32 header file structure now)
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5534 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c')
-rw-r--r-- | nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c index 4cc73a3fc..9db9b136b 100644 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c @@ -39,6 +39,7 @@ #include <nuttx/config.h> +#include <sys/types.h> #include <stdint.h> #include <stdbool.h> #include <errno.h> @@ -49,8 +50,7 @@ #include "up_arch.h" #include "chip.h" #include "lpc17_gpio.h" -#include "lpc17_pinconn.h" -#include "lpc17_internal.h" + /**************************************************************************** * Pre-processor Definitions @@ -199,6 +199,7 @@ static int lpc17_pinsel(unsigned int port, unsigned int pin, unsigned int value) putreg32(regval, regaddr); return OK; } + return -EINVAL; } @@ -265,6 +266,7 @@ static int lpc17_pullup(uint16_t cfgset, unsigned int port, unsigned int pin) putreg32(regval, regaddr); return OK; } + return -EINVAL; } @@ -518,6 +520,7 @@ static int lpc17_configalternate(uint16_t cfgset, unsigned int port, lpc17_setopendrain(port, pin); } + return OK; } @@ -582,6 +585,7 @@ int lpc17_configgpio(uint16_t cfgset) break; } } + return ret; } @@ -651,5 +655,6 @@ bool lpc17_gpioread(uint16_t pinset) pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; return ((getreg32(fiobase + LPC17_FIO_PIN_OFFSET) & (1 << pin)) != 0); } - return 0; + + return false; } |