Use of BASEPRI to control ARM interrupts is now functional

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5548 42af7a65-404d-4744-a932-0658087f49c3

2 files changed, 35 insertions, 18 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.c b/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.c
index bf6d18287..0241d4bf7 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.c
@@ -104,11 +104,28 @@
 #endif
 
 /* If the user did not specify a priority for Ethernet interrupts, set the
- * interrupt priority to the maximum.
+ * interrupt priority to the maximum (unless CONFIG_ARMV7M_USEBASEPRI is
+ * defined, then set it to the maximum allowable priority).
  */
 
 #ifndef CONFIG_NET_PRIORITY
-#  define CONFIG_NET_PRIORITY NVIC_SYSH_PRIORITY_MAX
+#  ifdef CONFIG_ARMV7M_USEBASEPRI
+#    define CONFIG_NET_PRIORITY NVIC_SYSH_DISABLE_PRIORITY
+#  else
+#    define CONFIG_NET_PRIORITY NVIC_SYSH_PRIORITY_MAX
+#  endif
+#endif
+
+/* If the priority is set at the max (0) and CONFIG_ARMV7M_USEBASEPRI is
+ * defined, then silently drop the priority to NVIC_SYSH_DISABLE_PRIORITY.
+ * In this configuratin, nothing is permitted to run at priority zero
+ * except for the SVCALL handler.  NVIC_SYSH_DISABLE_PRIORITY is the
+ * maximum allowable priority in that case.
+ */
+
+#if CONFIG_NET_PRIORITY == 0 && defined(CONFIG_ARMV7M_USEBASEPRI)
+#  undef CONFIG_NET_PRIORITY
+#  define CONFIG_NET_PRIORITY NVIC_SYSH_DISABLE_PRIORITY
 #endif
 
 /* Debug Configuration *****************************************************/
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
index c9b289d4e..6d96ff386 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -190,7 +190,7 @@ static int lpc17_reserved(int irq, FAR void *context)
 #endif
 
 /****************************************************************************
- * Name: up_prioritize_irq
+ * Name: lpc17_prioritize_syscall
  *
  * Description:
  *   Set the priority of an exception.  This function may be needed
@@ -198,23 +198,17 @@ static int lpc17_reserved(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-#if !defined(CONFIG_ARCH_IRQPRIO) && defined(CONFIG_ARMV7M_USEBASEPRI)
-static int up_prioritize_irq(int irq, int priority)
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+static inline void lpc17_prioritize_syscall(int priority)
 {
-  uint32_t regaddr;
   uint32_t regval;
-  int shift;
 
-  irq        -= 4;
-  regaddr     = NVIC_SYSH_PRIORITY(irq);
-  regval      = getreg32(regaddr);
-  shift       = ((irq & 3) << 3);
-  regval     &= ~(0xff << shift);
-  regval     |= (priority << shift);
-  putreg32(regval, regaddr);
+  /* SVCALL is system handler 11 */
 
-  stm32_dumpnvic("prioritize", irq);
-  return OK;
+  regval  = getreg32(NVIC_SYSH8_11_PRIORITY);
+  regval &= ~NVIC_SYSH_PRIORITY_PR11_MASK;
+  regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT);
+  putreg32(regval, NVIC_SYSH8_11_PRIORITY);
 }
 #endif
 
@@ -335,7 +329,7 @@ void up_irqinitialize(void)
 /* up_prioritize_irq(LPC17_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   up_prioritize_irq(LPC17_IRQ_SVCALL, NVIC_SYSH_SVCALL_PRIORITY);
+   lpc17_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
@@ -490,11 +484,17 @@ int up_prioritize_irq(int irq, int priority)
 
   if (irq < LPC17_IRQ_EXTINT)
     {
-      irq    -= 4;
+      /* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority
+       * registers (0-3 are invalid)
+       */
+
       regaddr = NVIC_SYSH_PRIORITY(irq);
+      irq    -= 4;
     }
   else
     {
+      /* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
+
       irq    -= LPC17_IRQ_EXTINT;
       regaddr = NVIC_IRQ_PRIORITY(irq);
     }