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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-22 01:25:40 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-22 01:25:40 +0000 |
| commit | 4742f55507b6e1392f459a2c228efb75b567b62e (patch) | |
| tree | a1914fb5c45a61232078c98064198ac8818f07b4 /nuttx/arch/arm/src/stm32/stm32_irq.c | |
| parent | e504d643fc23cefe61340e4d3a75d6e80f4b76fb (diff) | |
| download | px4-firmware-4742f55507b6e1392f459a2c228efb75b567b62e.tar.gz px4-firmware-4742f55507b6e1392f459a2c228efb75b567b62e.tar.bz2 px4-firmware-4742f55507b6e1392f459a2c228efb75b567b62e.zip | |
Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_irq.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_irq.c | 43 |
1 files changed, 41 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_irq.c b/nuttx/arch/arm/src/stm32/stm32_irq.c index 36a5cf5fa..8f2b070fb 100644 --- a/nuttx/arch/arm/src/stm32/stm32_irq.c +++ b/nuttx/arch/arm/src/stm32/stm32_irq.c @@ -2,7 +2,7 @@ * arch/arm/src/stm32/stm32_irq.c * arch/arm/src/chip/stm32_irq.c * - * Copyright (C) 2009-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -195,6 +195,35 @@ static int stm32_reserved(int irq, FAR void *context) #endif /**************************************************************************** + * Name: up_prioritize_irq + * + * Description: + * Set the priority of an exception. This function may be needed + * internally even if support for prioritized interrupts is not enabled. + * + ****************************************************************************/ + +#if !defined(CONFIG_ARCH_IRQPRIO) && defined(CONFIG_ARMV7M_USEBASEPRI) +static int up_prioritize_irq(int irq, int priority) +{ + uint32_t regaddr; + uint32_t regval; + int shift; + + irq -= 4; + regaddr = NVIC_SYSH_PRIORITY(irq); + regval = getreg32(regaddr); + shift = ((irq & 3) << 3); + regval &= ~(0xff << shift); + regval |= (priority << shift); + putreg32(regval, regaddr); + + stm32_dumpnvic("prioritize", irq); + return OK; +} +#endif + +/**************************************************************************** * Name: stm32_irqinfo * * Description: @@ -335,6 +364,9 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif +#ifdef CONFIG_ARMV7M_USEBASEPRI + up_prioritize_irq(STM32_IRQ_SVCALL, NVIC_SYSH_SVCALL_PRIORITY); +#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -451,7 +483,14 @@ int up_prioritize_irq(int irq, int priority) uint32_t regval; int shift; - DEBUGASSERT(irq >= STM32_IRQ_MEMFAULT && irq < NR_IRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); +#ifdef CONFIG_ARMV7M_USEBASEPRI + DEBUGASSERT(irq >= STM32_IRQ_MEMFAULT && irq < NR_IRQS && + priority >= NVIC_SYSH_DISABLE_PRIORITY && + priority <= NVIC_SYSH_PRIORITY_MIN); +#else + DEBUGASSERT(irq >= STM32_IRQ_MEMFAULT && irq < NR_IRQS && + (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); +#endif if (irq < STM32_IRQ_INTERRUPTS) { |