Merge branch 'master' into nuttx-merge-5447

19 files changed, 1983 insertions, 63 deletions

diff --git a/nuttx/drivers/Makefile b/nuttx/drivers/Makefile
index 26a2ea992..6d3b40b1f 100644
--- a/nuttx/drivers/Makefile
+++ b/nuttx/drivers/Makefile
@@ -34,6 +34,7 @@
 ############################################################################
 
 -include $(TOPDIR)/Make.defs
+DELIM ?= $(strip /)
 
 ifeq ($(WINTOOL),y)
 INCDIROPT = -w
@@ -48,22 +49,22 @@ VPATH = .
 # files to the source file list, add its DEPPATH info, and will add
 # the appropriate paths to the VPATH variable
 
-include analog/Make.defs
-include bch/Make.defs
-include input/Make.defs
-include lcd/Make.defs
-include mmcsd/Make.defs
-include mtd/Make.defs
-include net/Make.defs
-include pipes/Make.defs
-include power/Make.defs
-include sensors/Make.defs
-include sercomm/Make.defs
-include serial/Make.defs
-include syslog/Make.defs
-include usbdev/Make.defs
-include usbhost/Make.defs
-include wireless/Make.defs
+include analog$(DELIM)Make.defs
+include bch$(DELIM)Make.defs
+include input$(DELIM)Make.defs
+include lcd$(DELIM)Make.defs
+include mmcsd$(DELIM)Make.defs
+include mtd$(DELIM)Make.defs
+include net$(DELIM)Make.defs
+include pipes$(DELIM)Make.defs
+include power$(DELIM)Make.defs
+include sensors$(DELIM)Make.defs
+include sercomm$(DELIM)Make.defs
+include serial$(DELIM)Make.defs
+include syslog$(DELIM)Make.defs
+include usbdev$(DELIM)Make.defs
+include usbhost$(DELIM)Make.defs
+include wireless$(DELIM)Make.defs
 
 ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
   CSRCS += dev_null.c dev_zero.c loop.c
diff --git a/nuttx/drivers/analog/Make.defs b/nuttx/drivers/analog/Make.defs
index d94e39758..89cc5bd3f 100644
--- a/nuttx/drivers/analog/Make.defs
+++ b/nuttx/drivers/analog/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/analog/Make.defs
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -76,12 +76,12 @@ endif
 ifeq ($(CONFIG_DAC),y)
   DEPPATH += --dep-path analog
   VPATH += :analog
-  CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/analog}
+  CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)analog}
 else
 ifeq ($(CONFIG_ADC),y)
   DEPPATH += --dep-path analog
   VPATH += :analog
-  CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/analog}
+  CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)analog}
 endif
 endif
 
diff --git a/nuttx/drivers/bch/Make.defs b/nuttx/drivers/bch/Make.defs
index bc22df8e2..78dfbff30 100644
--- a/nuttx/drivers/bch/Make.defs
+++ b/nuttx/drivers/bch/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/bch/Make.defs
 #
-#   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2008, 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -46,7 +46,7 @@ CSRCS += bchlib_setup.c bchlib_teardown.c bchlib_read.c bchlib_write.c \
 
 DEPPATH += --dep-path bch
 VPATH += :bch
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/bch}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)bch}
 
 endif
 endif
diff --git a/nuttx/drivers/input/Make.defs b/nuttx/drivers/input/Make.defs
index 6dbae268e..10e6db62f 100644
--- a/nuttx/drivers/input/Make.defs
+++ b/nuttx/drivers/input/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/input/Make.defs
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -47,6 +47,10 @@ ifeq ($(CONFIG_INPUT_ADS7843E),y)
   CSRCS += ads7843e.c
 endif
 
+ifeq ($(CONFIG_INPUT_MAX11802),y)
+  CSRCS += max11802.c
+endif
+
 ifeq ($(CONFIG_INPUT_STMPE811),y)
   CSRCS += stmpe811_base.c
 ifneq ($(CONFIG_INPUT_STMPE811_TSC_DISABLE),y)
@@ -67,6 +71,6 @@ endif
 
 DEPPATH += --dep-path input
 VPATH += :input
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/input}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)input}
 endif
 
diff --git a/nuttx/drivers/lcd/Make.defs b/nuttx/drivers/lcd/Make.defs
index 26b169391..1b445b6a7 100644
--- a/nuttx/drivers/lcd/Make.defs
+++ b/nuttx/drivers/lcd/Make.defs
@@ -47,6 +47,10 @@ ifeq ($(CONFIG_LCD_NOKIA6100),y)
   CSRCS += nokia6100.c
 endif
 
+ifeq ($(CONFIG_LCD_UG2864AMBAG01),y)
+  CSRCS += ug-2864ambag01.c
+endif
+
 ifeq ($(CONFIG_LCD_UG9664HSWAG01),y)
   CSRCS += ug-9664hswag01.c
 endif
@@ -63,6 +67,6 @@ endif
 
 DEPPATH += --dep-path lcd
 VPATH += :lcd
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/lcd}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd}
 endif
 
diff --git a/nuttx/drivers/lcd/ug-2864ambag01.c b/nuttx/drivers/lcd/ug-2864ambag01.c
new file mode 100644
index 000000000..2a47b38eb
--- /dev/null
+++ b/nuttx/drivers/lcd/ug-2864ambag01.c
@@ -0,0 +1,1161 @@
+/**************************************************************************************
+ * drivers/lcd/ug-2864ambag01.c
+ * Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller) in SPI
+ * mode
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * References:
+ *   1. Product Specification (Preliminary), Part Name: OEL Display Module, Part ID:
+ *      UG-2864AMBAG01, Doc No: SASI-9015-A, Univision Technology Inc.
+ *   2. SH1101A, 132 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with
+ *      Controller, Sino Wealth
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************/
+/**************************************************************************************
+ * Device memory organization:
+ *
+ *          +----------------------------+
+ *          |           Column           |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page    | 0  | 1 | 2 | 3 | ... | 131 |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 0  | D0 | X |   |   |     |     |
+ *          | D1 | X |   |   |     |     |
+ *          | D2 | X |   |   |     |     |
+ *          | D3 | X |   |   |     |     |
+ *          | D4 | X |   |   |     |     |
+ *          | D5 | X |   |   |     |     |
+ *          | D6 | X |   |   |     |     |
+ *          | D7 | X |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 1  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 2  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 3  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 4  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 5  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 6  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *  Page 7  |    |   |   |   |     |     |
+ *  --------+----+---+---+---+-...-+-----+
+ *
+ *  -----------------------------------+---------------------------------------
+ *  Landscape Display:                 | Reverse Landscape Display:
+ *  --------+-----------------------+  |  --------+---------------------------+
+ *          |       Column          |  |          |         Column            |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 0  | 0 | 1 | 2 |     | 131 |  |  Page 7  | 131 | 130 | 129 |     | 0 |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 1  | V                     |  |  Page 6  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 2  | V                     |  |  Page 5  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 3  | V                     |  |  Page 4  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 4  | V                     |  |  Page 3  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 5  | V                     |  |  Page 2  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 6  | V                     |  |  Page 1  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  Page 7  | V                     |  |  Page 0  |                         ^ |
+ *  --------+---+---+---+-...-+-----+  |  --------+-----+-----+-----+-...-+---+
+ *  -----------------------------------+---------------------------------------
+ *
+ *  -----------------------------------+---------------------------------------
+ *  Portrait Display:                  | Reverse Portrait Display:
+ *  -----------+---------------------+ |  -----------+---------------------+
+ *             |         Page        | |             |       Page          |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  Column 0   | 0 | 1 | 2 |     | 7 | |  Column 131 | 7 | 6 | 5 |     | 0 |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  Column 1   | >   >   >    >    > | |  Column 130 |                     |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  Column 2   |                     | |  Column 129 |                     |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  ...        |                     | |  ...        |                     |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  Column 131 |                     | |  Column 0   | <   <   <    <    < |
+ *  -----------+---+---+---+-...-+---+ |  -----------+---+---+---+-...-+---+
+ *  -----------------------------------+----------------------------------------
+ **************************************************************************************/
+
+/**************************************************************************************
+ * Included Files
+ **************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/spi.h>
+#include <nuttx/lcd/lcd.h>
+#include <nuttx/lcd/ug-2864ambag01.h>
+
+#include <arch/irq.h>
+
+#ifdef CONFIG_LCD_UG2864AMBAG01
+
+/**************************************************************************************
+ * Pre-processor Definitions
+ **************************************************************************************/
+/* Configuration **********************************************************************/
+/* Limitations of the current configuration that I hope to fix someday */
+
+#if CONFIG_UG2864AMBAG01_NINTERFACES != 1
+#  warning "This implementation supports only a single OLED device"
+#  undef CONFIG_UG2864AMBAG01_NINTERFACES
+#  define CONFIG_UG2864AMBAG01_NINTERFACES 1
+#endif
+
+#if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
+#  warning "No support yet for portrait modes"
+#  define CONFIG_LCD_LANDSCAPE 1
+#  undef CONFIG_LCD_PORTRAIT
+#  undef CONFIG_LCD_RLANDSCAPE
+#  undef CONFIG_LCD_RPORTRAIT
+#elif defined(CONFIG_LCD_RLANDSCAPE)
+#  warning "Reverse landscape mode is untested and, hence, probably buggy"
+#endif
+
+/* SH1101A Commands *******************************************************************/
+
+#define SH1101A_SETCOLL(ad)      (0x00 | ((ad) & 0x0f)) /* Set Lower Column Address: (00h - 0fh) */
+#define SH1101A_SETCOLH(ad)      (0x10 | ((ad) & 0x0f)) /* Set Higher Column Address: (10h - 1fh) */
+#define SH1101A_STARTLINE(ln)    (0x40 | ((ln) & 0x3f)) /* Set Display Start Line: (40h - 7fh) */
+#define SH1101A_CONTRAST_MODE    (0x81)                 /* Set Contrast Control Register: (Double Bytes Command) */
+#  define SH1101A_CONTRAST(c)    (c)
+#define SH1101A_SEGREMAP(m)      (0xa0 | ((m) & 0x01))  /* Set Segment Re-map: (a0h - a1h) */
+#  define SH1101A_REMAPRIGHT     SH1101A_SEGREMAP(0)    /*   Right rotation */
+#  define SH1101A_REMAPPLEFT     SH1101A_SEGREMAP(1)    /*   Left rotation */
+#define SH1101A_EDISPOFFON(s)    (0xa4 | ((s) & 0x01))  /* Set Entire Display OFF/ON: (a4h - a5h) */
+#  define SH1101A_EDISPOFF       SH1101A_EDISPOFFON(0)  /*   Display off */
+#  define SH1101A_EDISPON        SH1101A_EDISPOFFON(1)  /*   Display on */
+#define SH1101A_NORMREV(s)       (0xa6 | ((s) & 0x01))  /* Set Normal/Reverse Display: (a6h -a7h) */
+#  define SH1101A_NORMAL         SH1101A_NORMREV(0)     /*   Normal display */
+#  define SH1101A_REVERSE        SH1101A_NORMREV(1)     /*   Reverse display */
+#define SH1101A_MRATIO_MODE      (0xa8)                 /* Set Multiplex Ration: (Double Bytes Command) */
+#  define SH1101A_MRATIO(d)      ((d) & 0x3f)
+#define SH1101A_DCDC_MODE        (0xad)                 /* Set DC-DC OFF/ON: (Double Bytes Command) */
+#  define SH1101A_DCDC_OFF       (0x8a)
+ # define SH1101A_DCDC_ON        (0x8b)
+#define SH1101A_DISPOFFON(s)     (0xae | ((s) & 0x01))  /* Display OFF/ON: (aeh - afh) */
+#  define SH1101A_DISPOFF        SH1101A_DISPOFFON(0)   /*   Display off */
+#  define SH1101A_DISPON         SH1101A_DISPOFFON(1)   /*   Display on */
+#define SH1101A_PAGEADDR(a)      (0xb0 | ((a) & 0x0f))  /* Set Page Address: (b0h - b7h) */
+#define SH1101A_SCANDIR(d)       (0xc0 | ((d) & 0x08))  /* Set Common Output Scan Direction: (c0h - c8h) */
+#  define SH1101A_SCANFROMCOM0   SH1101A_SCANDIR(0x00)  /*   Scan from COM[0] to COM[n-1]*/
+#  define SH1101A_SCANTOCOM0     SH1101A_SCANDIR(0x08)  /*   Scan from COM[n-1] to COM[0] */
+#define SH1101A_DISPOFFS_MODE    (0xd3)                 /* Set Display Offset: (Double Bytes Command) */
+#  define SH1101A_DISPOFFS(o)    ((o) & 0x3f)
+#define SH1101A_CLKDIV_SET       (0xd5)                 /* Set Display Clock Divide Ratio/Oscillator Frequency: (Double Bytes Command) */
+#  define SH1101A_CLKDIV(f,d)    ((((f) & 0x0f) << 4) | ((d) & 0x0f))
+#define SH1101A_CHRGPER_SET      (0xd9)                 /* Set Dis-charge/Pre-charge Period: (Double Bytes Command) */
+#  define SH1101A_CHRGPER(d,p)   ((((d) & 0x0f) << 4) | ((p) & 0x0f))
+#define SH1101A_CMNPAD_CONFIG    (0xda)                 /* Set Common pads hardware configuration: (Double Bytes Command) */
+  #define SH1101A_CMNPAD(c)      ((0x02) | ((c) & 0x10))
+#define SH1101A_VCOM_SET         (0xdb)                 /* Set VCOM Deselect Level: (Double Bytes Command) */
+#  define SH1101A_VCOM(v)        (v)
+#define SH1101A_RMWSTART         (0xe0)                 /* Read-Modify-Write: (e0h) */
+#define SH1101A_NOP              (0xe3)                 /* NOP: (e3h) */
+#define SH1101A_END              (0xee)                 /* End: (eeh) */
+
+#define SH1101A_WRDATA(d)        (d)                    /* Write Display Data */
+#define SH1101A_STATUS_BUSY      (0x80)                 /* Read Status */
+#define SH1101A_STATUS_ONOFF     (0x40)
+#define SH1101A_RDDATA(d)        (d)                    /* Read Display Data */
+
+/* Color Properties *******************************************************************/
+/* Display Resolution
+ *
+ * The SH1101A display controller can handle a resolution of 132x64. The UG-2864AMBAG01
+ * on the base board is 128x64.
+ */
+
+#define UG2864AMBAG01_DEV_XRES    128 /* Only 128 of 131 columns used */
+#define UG2864AMBAG01_DEV_YRES    64  /* 8 pages each 8 rows */
+#define UG2864AMBAG01_DEV_XOFFSET 2   /* Offset to logical column 0 */
+#define UG2864AMBAG01_DEV_PAGES   8   /* 8 pages */
+
+#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
+#  define UG2864AMBAG01_XRES      UG2864AMBAG01_DEV_XRES
+#  define UG2864AMBAG01_YRES      UG2864AMBAG01_DEV_YRES
+#else
+#  define UG2864AMBAG01_XRES      UG2864AMBAG01_DEV_YRES
+#  define UG2864AMBAG01_YRES      UG2864AMBAG01_DEV_XRES
+#endif
+
+/* Color depth and format */
+
+#define UG2864AMBAG01_BPP          1
+#define UG2864AMBAG01_COLORFMT     FB_FMT_Y1
+
+/* Bytes per logical row and actual device row */
+
+#define UG2864AMBAG01_XSTRIDE      (UG2864AMBAG01_XRES >> 3)
+#define UG2864AMBAG01_YSTRIDE      (UG2864AMBAG01_YRES >> 3)
+
+/* Default contrast */
+
+#define UG2864AMBAG01_CONTRAST     (128)
+
+/* The size of the shadow frame buffer or one row buffer.
+ *
+ * Frame buffer size: 128 columns x 64 rows / 8 bits-per-pixel
+ * Row size:          128 columns x 8 rows-per-page / 8 bits-per-pixel
+ */
+
+#define UG2864AMBAG01_FBSIZE       (UG2864AMBAG01_XSTRIDE * UG2864AMBAG01_YRES)
+#define UG2864AMBAG01_ROWSIZE      (UG2864AMBAG01_XSTRIDE)
+
+/* Bit helpers */
+
+#define LS_BIT                     (1 << 0)
+#define MS_BIT                     (1 << 7)
+
+/* Debug ******************************************************************************/
+
+#ifdef CONFIG_DEBUG_LCD
+#  define lcddbg(format, arg...)   dbg(format, ##arg)
+#  define lcdvdbg(format, arg...)  vdbg(format, ##arg)
+#else
+#  define lcddbg(x...)
+#  define lcdvdbg(x...)
+#endif
+
+/**************************************************************************************
+ * Private Type Definition
+ **************************************************************************************/
+
+/* This structure describes the state of this driver */
+
+struct ug2864ambag01_dev_s
+{
+  struct lcd_dev_s       dev;      /* Publically visible device structure */
+
+  /* Private LCD-specific information follows */
+
+  FAR struct spi_dev_s  *spi;      /* Cached SPI device reference */
+  uint8_t                contrast; /* Current contrast setting */
+  bool                   on;       /* true: display is on */
+
+
+ /* The SH1101A does not support reading from the display memory in SPI mode.
+  * Since there is 1 BPP and access is byte-by-byte, it is necessary to keep
+  * a shadow copy of the framebuffer memory. At 128x64, this amounts to 1KB.
+  */
+
+  uint8_t fb[UG2864AMBAG01_FBSIZE];
+};
+
+/**************************************************************************************
+ * Private Function Protototypes
+ **************************************************************************************/
+
+/* Low-level SPI helpers */
+
+#ifdef CONFIG_SPI_OWNBUS
+static inline void ug2864ambag01_configspi(FAR struct spi_dev_s *spi);
+#  define ug2864ambag01_lock(spi)
+#  define ug2864ambag01_unlock(spi)
+#else
+#  define ug2864ambag01_configspi(spi)
+static void ug2864ambag01_lock(FAR struct spi_dev_s *spi);
+static void ug2864ambag01_unlock(FAR struct spi_dev_s *spi);
+#endif
+
+/* LCD Data Transfer Methods */
+
+static int ug2864ambag01_putrun(fb_coord_t row, fb_coord_t col,
+                                FAR const uint8_t *buffer, size_t npixels);
+static int ug2864ambag01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
+                                size_t npixels);
+
+/* LCD Configuration */
+
+static int ug2864ambag01_getvideoinfo(FAR struct lcd_dev_s *dev,
+                                      FAR struct fb_videoinfo_s *vinfo);
+static int ug2864ambag01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
+                                      FAR struct lcd_planeinfo_s *pinfo);
+
+/* LCD RGB Mapping */
+
+#ifdef CONFIG_FB_CMAP
+#  error "RGB color mapping not supported by this driver"
+#endif
+
+/* Cursor Controls */
+
+#ifdef CONFIG_FB_HWCURSOR
+#  error "Cursor control not supported by this driver"
+#endif
+
+/* LCD Specific Controls */
+
+static int ug2864ambag01_getpower(struct lcd_dev_s *dev);
+static int ug2864ambag01_setpower(struct lcd_dev_s *dev, int power);
+static int ug2864ambag01_getcontrast(struct lcd_dev_s *dev);
+static int ug2864ambag01_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
+
+/**************************************************************************************
+ * Private Data
+ **************************************************************************************/
+
+/* This is working memory allocated by the LCD driver for each LCD device
+ * and for each color plane.  This memory will hold one raster line of data.
+ * The size of the allocated run buffer must therefore be at least
+ * (bpp * xres / 8).  Actual alignment of the buffer must conform to the
+ * bitwidth of the underlying pixel type.
+ *
+ * If there are multiple planes, they may share the same working buffer
+ * because different planes will not be operate on concurrently.  However,
+ * if there are multiple LCD devices, they must each have unique run buffers.
+ */
+
+static uint8_t g_runbuffer[UG2864AMBAG01_ROWSIZE];
+
+/* This structure describes the overall LCD video controller */
+
+static const struct fb_videoinfo_s g_videoinfo =
+{
+  .fmt     = UG2864AMBAG01_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
+  .xres    = UG2864AMBAG01_XRES,     /* Horizontal resolution in pixel columns */
+  .yres    = UG2864AMBAG01_YRES,     /* Vertical resolution in pixel rows */
+  .nplanes = 1,                      /* Number of color planes supported */
+};
+
+/* This is the standard, NuttX Plane information object */
+
+static const struct lcd_planeinfo_s g_planeinfo =
+{
+  .putrun = ug2864ambag01_putrun,    /* Put a run into LCD memory */
+  .getrun = ug2864ambag01_getrun,    /* Get a run from LCD memory */
+  .buffer = (uint8_t*)g_runbuffer,   /* Run scratch buffer */
+  .bpp    = UG2864AMBAG01_BPP,       /* Bits-per-pixel */
+};
+
+/* This is the OLED driver instance (only a single device is supported for now) */
+
+static struct ug2864ambag01_dev_s g_oleddev =
+{
+  .dev =
+  {
+    /* LCD Configuration */
+
+    .getvideoinfo = ug2864ambag01_getvideoinfo,
+    .getplaneinfo = ug2864ambag01_getplaneinfo,
+
+    /* LCD RGB Mapping -- Not supported */
+    /* Cursor Controls -- Not supported */
+
+    /* LCD Specific Controls */
+
+    .getpower     = ug2864ambag01_getpower,
+    .setpower     = ug2864ambag01_setpower,
+    .getcontrast  = ug2864ambag01_getcontrast,
+    .setcontrast  = ug2864ambag01_setcontrast,
+  },
+};
+
+/**************************************************************************************
+ * Private Functions
+ **************************************************************************************/
+
+/**************************************************************************************
+ * Name: ug2864ambag01_configspi
+ *
+ * Description:
+ *   Configure the SPI for use with the UG-2864AMBAG01
+ *
+ * Input Parameters:
+ *   spi  - Reference to the SPI driver structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ **************************************************************************************/
+
+#ifdef CONFIG_SPI_OWNBUS
+static inline void ug2864ambag01_configspi(FAR struct spi_dev_s *spi)
+{
+  lcdvdbg("Mode: %d Bits: 8 Frequency: %d\n",
+          CONFIG_UG2864AMBAG01_SPIMODE, CONFIG_UG2864AMBAG01_FREQUENCY);
+
+  /* Configure SPI for the UG-2864AMBAG01.  But only if we own the SPI bus.  Otherwise,
+   * don't bother because it might change.
+   */
+
+  SPI_SETMODE(spi, CONFIG_UG2864AMBAG01_SPIMODE);
+  SPI_SETBITS(spi, 8);
+  SPI_SETFREQUENCY(spi, CONFIG_UG2864AMBAG01_FREQUENCY)
+}
+#endif
+
+/**************************************************************************************
+ * Name: ug2864ambag01_lock
+ *
+ * Description:
+ *   Select the SPI, locking and  re-configuring if necessary
+ *
+ * Input Parameters:
+ *   spi  - Reference to the SPI driver structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ **************************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static inline void ug2864ambag01_lock(FAR struct spi_dev_s *spi)
+{
+  /* Lock the SPI bus if there are multiple devices competing for the SPI bus. */
+
+  SPI_LOCK(spi, true);
+
+  /* Now make sure that the SPI bus is configured for the UG-2864AMBAG01 (it
+   * might have gotten configured for a different device while unlocked)
+   */
+
+  SPI_SETMODE(spi, CONFIG_UG2864AMBAG01_SPIMODE);
+  SPI_SETBITS(spi, 8);
+  SPI_SETFREQUENCY(spi, CONFIG_UG2864AMBAG01_FREQUENCY);
+}
+#endif
+
+/**************************************************************************************
+ * Name: ug2864ambag01_unlock
+ *
+ * Description:
+ *   De-select the SPI
+ *
+ * Input Parameters:
+ *   spi  - Reference to the SPI driver structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ **************************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static inline void ug2864ambag01_unlock(FAR struct spi_dev_s *spi)
+{
+  /* De-select UG-2864AMBAG01 chip and relinquish the SPI bus. */
+
+  SPI_LOCK(spi, false);
+}
+#endif
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_putrun
+ *
+ * Description:
+ *   This method can be used to write a partial raster line to the LCD.
+ *
+ * Input Parameters:
+ *   row     - Starting row to write to (range: 0 <= row < yres)
+ *   col     - Starting column to write to (range: 0 <= col <= xres-npixels)
+ *   buffer  - The buffer containing the run to be written to the LCD
+ *   npixels - The number of pixels to write to the LCD
+ *             (range: 0 < npixels <= xres-col)
+ *
+ **************************************************************************************/
+
+#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
+static int ug2864ambag01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
+                                size_t npixels)
+{
+  /* Because of this line of code, we will only be able to support a single UG device */
+
+  FAR struct ug2864ambag01_dev_s *priv = (FAR struct ug2864ambag01_dev_s *)&g_oleddev;
+  FAR uint8_t *fbptr;
+  FAR uint8_t *ptr;
+  uint8_t devcol;
+  uint8_t fbmask;
+  uint8_t page;
+  uint8_t usrmask;
+  int pixlen;
+  uint8_t i;
+
+  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  DEBUGASSERT(buffer);
+
+  /* Clip the run to the display */
+
+  pixlen = npixels;
+  if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG2864AMBAG01_XRES)
+    {
+      pixlen = (int)UG2864AMBAG01_XRES - (int)col;
+    }
+
+  /* Verify that some portion of the run remains on the display */
+
+  if (pixlen <= 0 || row > UG2864AMBAG01_YRES)
+    {
+      return OK;
+    }
+
+  /* Perform coordinate conversion for reverse landscape mode */
+
+#ifdef CONFIG_LCD_RLANDSCAPE
+  row = (UG2864AMBAG01_YRES-1) - row;
+  col = (UG2864AMBAG01_XRES-1) - col;
+#endif
+
+  /* Get the page number.  The range of 64 lines is divided up into eight
+   * pages of 8 lines each.
+   */
+
+  page = row >> 3;
+
+  /* Update the shadow frame buffer memory. First determine the pixel
+   * position in the frame buffer memory.  Pixels are organized like
+   * this:
+   *
+   *  --------+---+---+---+---+-...-+-----+
+   *  Segment | 0 | 1 | 2 | 3 | ... | 131 |
+   *  --------+---+---+---+---+-...-+-----+
+   *     D0   |   | X |   |   |     |     |
+   *     D1   |   | X |   |   |     |     |
+   *     D2   |   | X |   |   |     |     |
+   *     D3   |   | X |   |   |     |     |
+   *     D4   |   | X |   |   |     |     |
+   *     D5   |   | X |   |   |     |     |
+   *     D6   |   | X |   |   |     |     |
+   *     D7   |   | X |   |   |     |     | 
+   *  --------+---+---+---+---+-...-+-----+
+   *
+   * So, in order to draw a white, horizontal line, at row 45. we
+   * would have to modify all of the bytes in page 45/8 = 5.  We
+   * would have to set bit 45%8 = 5 in every byte in the page.
+   */
+
+  fbmask  = 1 << (row & 7);
+  fbptr   = &priv->fb[page * UG2864AMBAG01_XRES + col];
+#ifdef CONFIG_LCD_RLANDSCAPE
+  ptr     = fbptr + pixlen - 1;
+#else
+  ptr     = fbptr;
+#endif
+#ifdef CONFIG_NX_PACKEDMSFIRST
+  usrmask = MS_BIT;
+#else
+  usrmask = LS_BIT;
+#endif
+
+  for (i = 0; i < pixlen; i++)
+    {
+      /* Set or clear the corresponding bit */
+
+#ifdef CONFIG_LCD_RLANDSCAPE
+      if ((*buffer & usrmask) != 0)
+        {
+          *ptr-- |= fbmask;
+        }
+      else
+        {
+          *ptr-- &= ~fbmask;
+        }
+#else
+      if ((*buffer & usrmask) != 0)
+        {
+          *ptr++ |= fbmask;
+        }
+      else
+        {
+          *ptr++ &= ~fbmask;
+        }
+#endif
+
+      /* Inc/Decrement to the next source pixel */
+
+#ifdef CONFIG_NX_PACKEDMSFIRST
+      if (usrmask == LS_BIT)
+        {
+          buffer++;
+          usrmask = MS_BIT;
+        }
+      else
+        {
+          usrmask >>= 1;
+        }
+#else
+      if (usrmask == MS_BIT)
+        {
+          buffer++;
+          usrmask = LS_BIT;
+        }
+      else
+        {
+          usrmask <<= 1;
+        }
+#endif
+    }
+
+  /* Offset the column position to account for smaller horizontal
+   * display range.
+   */
+
+  devcol = col + UG2864AMBAG01_DEV_XOFFSET;
+
+  /* Lock and select device */
+
+  ug2864ambag01_lock(priv->spi);
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true);
+
+  /* Select command transfer */
+
+  SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true);
+
+  /* Set the starting position for the run */
+  /* Set the column address to the XOFFSET value */
+  
+  SPI_SEND(priv->spi, SH1101A_SETCOLL(devcol & 0x0f));
+  SPI_SEND(priv->spi, SH1101A_SETCOLH(devcol >> 4));
+
+  /* Set the page address */
+
+  SPI_SEND(priv->spi, SH1101A_PAGEADDR(page));
+
+  /* Select data transfer */
+
+  SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, false);
+
+  /* Then transfer all of the data */
+
+  (void)SPI_SNDBLOCK(priv->spi, fbptr, pixlen);
+
+  /* De-select and unlock the device */
+
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false);
+  ug2864ambag01_unlock(priv->spi);
+  return OK;
+}
+#else
+#  error "Configuration not implemented"
+#endif
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_getrun
+ *
+ * Description:
+ *   This method can be used to read a partial raster line from the LCD:
+ *
+ * Description:
+ *   This method can be used to write a partial raster line to the LCD.
+ *
+ *  row     - Starting row to read from (range: 0 <= row < yres)
+ *  col     - Starting column to read read (range: 0 <= col <= xres-npixels)
+ *  buffer  - The buffer in which to return the run read from the LCD
+ *  npixels - The number of pixels to read from the LCD
+ *            (range: 0 < npixels <= xres-col)
+ *
+ **************************************************************************************/
+
+#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
+static int ug2864ambag01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
+                      size_t npixels)
+{
+  /* Because of this line of code, we will only be able to support a single UG device */
+
+  FAR struct ug2864ambag01_dev_s *priv = &g_oleddev;
+  FAR uint8_t *fbptr;
+  uint8_t page;
+  uint8_t fbmask;
+  uint8_t usrmask;
+  int pixlen;
+  uint8_t i;
+
+  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  DEBUGASSERT(buffer);
+
+  /* Clip the run to the display */
+
+  pixlen = npixels;
+  if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG2864AMBAG01_XRES)
+    {
+      pixlen = (int)UG2864AMBAG01_XRES - (int)col;
+    }
+
+  /* Verify that some portion of the run is actually the display */
+
+  if (pixlen <= 0 || row > UG2864AMBAG01_YRES)
+    {
+      return -EINVAL;
+    }
+
+  /* Perform coordinate conversion for reverse landscape mode */
+
+#ifdef CONFIG_LCD_RLANDSCAPE
+  row = (UG2864AMBAG01_YRES-1) - row;
+  col = (UG2864AMBAG01_XRES-1) - col;
+#endif
+
+  /* Then transfer the display data from the shadow frame buffer memory */
+  /* Get the page number.  The range of 64 lines is divided up into eight
+   * pages of 8 lines each.
+   */
+
+  page = row >> 3;
+
+  /* Update the shadow frame buffer memory. First determine the pixel
+   * position in the frame buffer memory.  Pixels are organized like
+   * this:
+   *
+   *  --------+---+---+---+---+-...-+-----+
+   *  Segment | 0 | 1 | 2 | 3 | ... | 131 |
+   *  --------+---+---+---+---+-...-+-----+
+   *     D0   |   | X |   |   |     |     |
+   *     D1   |   | X |   |   |     |     |
+   *     D2   |   | X |   |   |     |     |
+   *     D3   |   | X |   |   |     |     |
+   *     D4   |   | X |   |   |     |     |
+   *     D5   |   | X |   |   |     |     |
+   *     D6   |   | X |   |   |     |     |
+   *     D7   |   | X |   |   |     |     | 
+   *  --------+---+---+---+---+-...-+-----+
+   *
+   * So, in order to draw a white, horizontal line, at row 45. we
+   * would have to modify all of the bytes in page 45/8 = 5.  We
+   * would have to set bit 45%8 = 5 in every byte in the page.
+   */
+
+  fbmask  = 1 << (row & 7);
+#ifdef CONFIG_LCD_RLANDSCAPE
+  fbptr   = &priv->fb[page * (UG2864AMBAG01_XRES-1) + col + pixlen];
+#else
+  fbptr   = &priv->fb[page * UG2864AMBAG01_XRES + col];
+#endif
+#ifdef CONFIG_NX_PACKEDMSFIRST
+  usrmask = MS_BIT;
+#else
+  usrmask = LS_BIT;
+#endif
+
+  *buffer = 0;
+  for (i = 0; i < pixlen; i++)
+    {
+      /* Set or clear the corresponding bit */
+      
+#ifdef CONFIG_LCD_RLANDSCAPE
+      uint8_t byte = *fbptr--;
+#else
+      uint8_t byte = *fbptr++;
+#endif
+      if ((byte & fbmask) != 0)
+        {
+          *buffer |= usrmask;
+        }
+
+      /* Inc/Decrement to the next destination pixel. Hmmmm. It looks like
+       * this logic could write past the end of the user buffer.  Revisit
+       * this!
+       */
+
+#ifdef CONFIG_NX_PACKEDMSFIRST
+      if (usrmask == LS_BIT)
+        {
+          buffer++;
+         *buffer = 0;
+          usrmask = MS_BIT;
+        }
+      else
+        {
+          usrmask >>= 1;
+        }
+#else
+      if (usrmask == MS_BIT)
+        {
+          buffer++;
+         *buffer = 0;
+          usrmask = LS_BIT;
+        }
+      else
+        {
+          usrmask <<= 1;
+        }
+#endif
+    }
+
+  return OK;
+}
+#else
+#  error "Configuration not implemented"
+#endif
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_getvideoinfo
+ *
+ * Description:
+ *   Get information about the LCD video controller configuration.
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_getvideoinfo(FAR struct lcd_dev_s *dev,
+                              FAR struct fb_videoinfo_s *vinfo)
+{
+  DEBUGASSERT(dev && vinfo);
+  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
+  memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
+  return OK;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_getplaneinfo
+ *
+ * Description:
+ *   Get information about the configuration of each LCD color plane.
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
+                              FAR struct lcd_planeinfo_s *pinfo)
+{
+  DEBUGASSERT(pinfo && planeno == 0);
+  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
+  return OK;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_getpower
+ *
+ * Description:
+ *   Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on. On
+ *   backlit LCDs, this setting may correspond to the backlight setting.
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_getpower(FAR struct lcd_dev_s *dev)
+{
+  FAR struct ug2864ambag01_dev_s *priv = (FAR struct ug2864ambag01_dev_s *)dev;
+  DEBUGASSERT(priv);
+
+  lcdvdbg("power: %s\n", priv->on ? "ON" : "OFF");
+  return priv->on ? CONFIG_LCD_MAXPOWER : 0;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_setpower
+ *
+ * Description:
+ *   Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On
+ *   backlit LCDs, this setting may correspond to the backlight setting.
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_setpower(struct lcd_dev_s *dev, int power)
+{
+  struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
+  DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER && priv->spi);
+
+  lcdvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
+
+  /* Lock and select device */
+
+  ug2864ambag01_lock(priv->spi);
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true);
+
+  if (power <= 0)
+    {
+      /* Turn the display off */
+
+      (void)SPI_SEND(priv->spi, SH1101A_DISPOFF);
+      priv->on = false;
+    }
+  else
+    {
+      /* Turn the display on */
+
+      (void)SPI_SEND(priv->spi, SH1101A_DISPON); /* Display on, dim mode */
+      priv->on = true;
+    }
+
+  /* De-select and unlock the device */
+
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false);
+  ug2864ambag01_unlock(priv->spi);
+  return OK;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_getcontrast
+ *
+ * Description:
+ *   Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_getcontrast(struct lcd_dev_s *dev)
+{
+  struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
+  DEBUGASSERT(priv);
+
+  lcdvdbg("contrast: %d\n", priv->contrast);
+  return priv->contrast;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_setcontrast
+ *
+ * Description:
+ *   Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
+ *
+ **************************************************************************************/
+
+static int ug2864ambag01_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
+{
+  struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
+  unsigned int scaled;
+
+  lcdvdbg("contrast: %d\n", contrast);
+  DEBUGASSERT(priv);
+
+  /* Verify the contrast value */
+
+#ifdef CONFIG_DEBUG
+  if (contrast > CONFIG_LCD_MAXCONTRAST)
+    {
+      return -EINVAL;
+    }
+#endif
+
+  /* Scale contrast:  newcontrast = 255 * contrast / CONFIG_LCD_MAXCONTRAST
+   * Where contrast is in the range {1,255}
+   */
+
+#if CONFIG_LCD_MAXCONTRAST != 255
+  scaled = ((contrast << 8) - 1) / CONFIG_LCD_MAXCONTRAST;
+#else
+  scaled = contrast;
+#endif
+
+  /* Lock and select device */
+
+  ug2864ambag01_lock(priv->spi);
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true);
+
+  /* Select command transfer */
+
+  SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true);
+
+  /* Set the contrast */
+
+  (void)SPI_SEND(priv->spi, SH1101A_CONTRAST_MODE);    /* Set contrast control register */
+  (void)SPI_SEND(priv->spi, SH1101A_CONTRAST(scaled)); /* Data 1: Set 1 of 256 contrast steps */
+  priv->contrast = contrast;
+
+  /* De-select and unlock the device */
+
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false);
+  ug2864ambag01_unlock(priv->spi);
+  return OK;
+}
+
+/**************************************************************************************
+ * Public Functions
+ **************************************************************************************/
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_initialize
+ *
+ * Description:
+ *   Initialize the UG-2864AMBAG01 video hardware.  The initial state of the
+ *   OLED is fully initialized, display memory cleared, and the OLED ready
+ *   to use, but with the power setting at 0 (full off == sleep mode).
+ *
+ * Input Parameters:
+ *
+ *   spi - A reference to the SPI driver instance.
+ *   devno - A value in the range of 0 through CONFIG_UG2864AMBAG01_NINTERFACES-1.
+ *     This allows support for multiple OLED devices.
+ *
+ * Returned Value:
+ *
+ *   On success, this function returns a reference to the LCD object for
+ *   the specified OLED.  NULL is returned on any failure.
+ *
+ **************************************************************************************/
+
+FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsigned int devno)
+{
+  FAR struct ug2864ambag01_dev_s  *priv = &g_oleddev;
+
+  lcdvdbg("Initializing\n");
+  DEBUGASSERT(spi && devno == 0);
+
+  /* Save the reference to the SPI device */
+
+  priv->spi = spi;
+
+  /* Configure the SPI */
+
+  ug2864ambag01_configspi(spi)
+
+  /* Lock and select device */
+
+  ug2864ambag01_lock(priv->spi);
+  SPI_SELECT(spi, SPIDEV_DISPLAY, true);
+
+  /* Select command transfer */
+
+  SPI_CMDDATA(spi, SPIDEV_DISPLAY, true);
+
+  /* Configure the device */
+
+  SPI_SEND(spi, SH1101A_DISPOFF);         /* Display off */
+  SPI_SEND(spi, SH1101A_SETCOLL(0));      /* Set lower column address */
+  SPI_SEND(spi, SH1101A_SETCOLH(0));      /* Set higher column address */
+  SPI_SEND(spi, SH1101A_STARTLINE(0));    /* Set display start line */
+  SPI_SEND(spi, SH1101A_PAGEADDR(0));     /* Set page address */
+  SPI_SEND(spi, SH1101A_CONTRAST_MODE);   /* Contrast control */
+  SPI_SEND(spi ,UG2864AMBAG01_CONTRAST);  /*   Default contrast */
+  SPI_SEND(spi, SH1101A_REMAPPLEFT);      /* Set segment remap left */
+  SPI_SEND(spi, SH1101A_EDISPOFF);        /* Normal display */
+  SPI_SEND(spi, SH1101A_NORMAL);          /* Normal (un-reversed) display mode */
+  SPI_SEND(spi, SH1101A_MRATIO_MODE);     /* Multiplex ratio */
+  SPI_SEND(spi, SH1101A_MRATIO(0x3f));    /*   Duty = 1/64 */
+  SPI_SEND(spi, SH1101A_SCANTOCOM0);      /* Com scan direction: Scan from COM[n-1] to COM[0] */
+  SPI_SEND(spi, SH1101A_DISPOFFS_MODE);   /* Set display offset */
+  SPI_SEND(spi, SH1101A_DISPOFFS(0));
+  SPI_SEND(spi, SH1101A_CLKDIV_SET);      /* Set clock divider */
+  SPI_SEND(spi, SH1101A_CLKDIV(0,0));
+  SPI_SEND(spi, SH1101A_CMNPAD_CONFIG);   /* Set common pads */
+  SPI_SEND(spi, SH1101A_CMNPAD(0x10));
+  SPI_SEND(spi, SH1101A_VCOM_SET);
+  SPI_SEND(spi, SH1101A_VCOM(0x40));
+  SPI_SEND(spi, SH1101A_DCDC_MODE);       /* DC/DC control mode: on */
+  SPI_SEND(spi, SH1101A_DCDC_ON);
+  SPI_SEND(spi, SH1101A_DISPON);          /* display ON  */
+
+  /* De-select and unlock the device */
+
+  SPI_SELECT(spi, SPIDEV_DISPLAY, false);
+  ug2864ambag01_unlock(priv->spi);
+
+  /* Clear the display */
+
+  up_mdelay(100);
+  ug2864ambag01_fill(&priv->dev, UG_Y1_BLACK);
+  return &priv->dev;
+}
+
+/**************************************************************************************
+ * Name:  ug2864ambag01_fill
+ *
+ * Description:
+ *   This non-standard method can be used to clear the entire display by writing one
+ *   color to the display.  This is much faster than writing a series of runs.
+ *
+ * Input Parameters:
+ *   priv   - Reference to private driver structure
+ *
+ * Assumptions:
+ *   Caller has selected the OLED section.
+ *
+ **************************************************************************************/
+
+void ug2864ambag01_fill(FAR struct lcd_dev_s *dev, uint8_t color)
+{
+  FAR struct ug2864ambag01_dev_s  *priv = &g_oleddev;
+  unsigned int page;
+
+  /* Make an 8-bit version of the selected color */
+
+  if (color & 1)
+    {
+      color = 0xff;
+    }
+  else
+    {
+      color = 0;
+    }
+
+  /* Initialize the framebuffer */
+
+  memset(priv->fb, color, UG2864AMBAG01_FBSIZE);
+
+  /* Lock and select device */
+
+  ug2864ambag01_lock(priv->spi);
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true);
+
+  /* Visit each page */
+
+  for (page = 0; page < UG2864AMBAG01_DEV_PAGES; page++)
+    {
+      /* Select command transfer */
+
+      SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true);
+
+      /* Set the column address to the XOFFSET value */
+  
+      SPI_SEND(priv->spi, SH1101A_SETCOLL(UG2864AMBAG01_DEV_XOFFSET));
+      SPI_SEND(priv->spi, SH1101A_SETCOLH(0));
+
+      /* Set the page address */
+
+      SPI_SEND(priv->spi, SH1101A_PAGEADDR(page));
+
+      /* Select data transfer */
+
+      SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, false);
+
+      /* Transfer one page of the selected color */
+
+       (void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG2864AMBAG01_XRES],
+                          UG2864AMBAG01_XRES);
+    }
+
+  /* De-select and unlock the device */
+
+  SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false);
+  ug2864ambag01_unlock(priv->spi);
+}
+
+#endif /* CONFIG_LCD_UG2864AMBAG01 */
diff --git a/nuttx/drivers/loop.c b/nuttx/drivers/loop.c
index df96da59f..b5b5d82d8 100644
--- a/nuttx/drivers/loop.c
+++ b/nuttx/drivers/loop.c
@@ -215,7 +215,7 @@ static ssize_t loop_read(FAR struct inode *inode, unsigned char *buffer,
                        size_t start_sector, unsigned int nsectors)
 {
   FAR struct loop_struct_s *dev;
-  size_t nbytesread;
+  ssize_t nbytesread;
   off_t offset;
   int ret;
 
diff --git a/nuttx/drivers/mmcsd/Make.defs b/nuttx/drivers/mmcsd/Make.defs
index 850456597..06e689c75 100644
--- a/nuttx/drivers/mmcsd/Make.defs
+++ b/nuttx/drivers/mmcsd/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/mmcsd/Make.defs
 #
-#   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2008, 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -33,14 +33,24 @@
 #
 ############################################################################
 
+ifeq ($(CONFIG_MMCSD),y)
+
 # Include MMC/SD drivers
 
-CSRCS += mmcsd_sdio.c mmcsd_spi.c mmcsd_debug.c
+ifeq ($(CONFIG_MMCSD_SDIO),y)
+CSRCS += mmcsd_sdio.c
+endif
+
+ifeq ($(CONFIG_MMCSD_SPI),y)
+CSRCS += mmcsd_spi.c mmcsd_debug.c
+endif
 
 # Include MMC/SD driver build support
 
 DEPPATH += --dep-path mmcsd
 VPATH += :mmcsd
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/mmcsd}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)mmcsd}
+
+endif
 
 
diff --git a/nuttx/drivers/mmcsd/mmcsd_sdio.c b/nuttx/drivers/mmcsd/mmcsd_sdio.c
index d0bc6659c..b17ae077d 100644
--- a/nuttx/drivers/mmcsd/mmcsd_sdio.c
+++ b/nuttx/drivers/mmcsd/mmcsd_sdio.c
@@ -2597,7 +2597,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
    * operating condition. CMD 8 is reserved on SD version 1.0 and MMC.
    *
    * CMD8 Argument:
-   *    [31:12]: Reserved (shall be set to '0')
   *    [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
+   *    [31:12]: Reserved (shall be set to '0')
+   *    [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
    *    [7:0]: Check Pattern (recommended 0xaa)
    * CMD8 Response: R7
    */
diff --git a/nuttx/drivers/mtd/Make.defs b/nuttx/drivers/mtd/Make.defs
index 258e77ec9..7db7592d4 100644
--- a/nuttx/drivers/mtd/Make.defs
+++ b/nuttx/drivers/mtd/Make.defs
@@ -51,6 +51,10 @@ ifeq ($(CONFIG_MTD_W25),y)
 CSRCS += w25.c
 endif
 
+ifeq ($(CONFIG_MTD_AT25),y)
+CSRCS += at25.c
+endif
+
 # Include MTD driver support
 
 DEPPATH += --dep-path mtd
diff --git a/nuttx/drivers/mtd/at25.c b/nuttx/drivers/mtd/at25.c
new file mode 100644
index 000000000..e35b794a5
--- /dev/null
+++ b/nuttx/drivers/mtd/at25.c
@@ -0,0 +1,708 @@
+/************************************************************************************
+ * drivers/mtd/at25.c
+ * Driver for SPI-based AT25DF321 (32Mbit) flash.
+ *
+ *   Copyright (C) 2009-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *           Petteri Aimonen <jpa@nx.mail.kapsi.fi>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/kmalloc.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/spi.h>
+#include <nuttx/mtd.h>
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifndef CONFIG_AT25_SPIMODE
+#  define CONFIG_AT25_SPIMODE SPIDEV_MODE0
+#endif
+
+/* AT25 Registers *******************************************************************/
+/* Indentification register values */
+
+#define AT25_MANUFACTURER         0x1F
+#define AT25_AT25DF321_TYPE       0x47 /* 32 M-bit */
+
+/*  AT25DF321 capacity is 4,194,304 bytes:
+ *  (64 sectors) * (65,536 bytes per sector)
+ *  (16384 pages) * (256 bytes per page)
+ */
+
+#define AT25_AT25DF321_SECTOR_SHIFT  12    /* Sector size 1 << 12 = 4096 */
+#define AT25_AT25DF321_NSECTORS      1024
+#define AT25_AT25DF321_PAGE_SHIFT    9     /* Page size 1 << 9 = 512 */
+#define AT25_AT25DF321_NPAGES        8192
+
+/* Instructions */
+/*      Command        Value      N Description             Addr Dummy Data */
+#define AT25_WREN      0x06    /* 1 Write Enable              0   0     0 */
+#define AT25_WRDI      0x04    /* 1 Write Disable             0   0     0 */
+#define AT25_RDID      0x9f    /* 1 Read Identification       0   0     1-3 */
+#define AT25_RDSR      0x05    /* 1 Read Status Register      0   0     >=1 */
+#define AT25_WRSR      0x01    /* 1 Write Status Register     0   0     1 */
+#define AT25_READ      0x03    /* 1 Read Data Bytes           3   0     >=1 */
+#define AT25_FAST_READ 0x0b    /* 1 Higher speed read         3   1     >=1 */
+#define AT25_PP        0x02    /* 1 Page Program              3   0     1-256 */
+#define AT25_SE        0x20    /* 1 Sector Erase              3   0     0 */
+#define AT25_BE        0xc7    /* 1 Bulk Erase                0   0     0 */
+#define AT25_DP        0xb9    /* 2 Deep power down           0   0     0 */
+#define AT25_RES       0xab    /* 2 Read Electronic Signature 0   3     >=1 */
+
+/* Status register bit definitions */
+
+#define AT25_SR_WIP            (1 << 0)    /* Bit 0: Write in progress bit */
+#define AT25_SR_WEL            (1 << 1)    /* Bit 1: Write enable latch bit */
+#define AT25_SR_EPE            (1 << 5)    /* Bit 5: Erase/program error */
+#define AT25_SR_UNPROT         0x00        /* Global unprotect command */
+
+#define AT25_DUMMY     0xa5
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* This type represents the state of the MTD device.  The struct mtd_dev_s
+ * must appear at the beginning of the definition so that you can freely
+ * cast between pointers to struct mtd_dev_s and struct at25_dev_s.
+ */
+
+struct at25_dev_s
+{
+  struct mtd_dev_s mtd;      /* MTD interface */
+  FAR struct spi_dev_s *dev; /* Saved SPI interface instance */
+  uint8_t  sectorshift;      /* 16 or 18 */
+  uint8_t  pageshift;        /* 8 */
+  uint16_t nsectors;         /* 128 or 64 */
+  uint32_t npages;           /* 32,768 or 65,536 */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* Helpers */
+
+static void at25_lock(FAR struct spi_dev_s *dev);
+static inline void at25_unlock(FAR struct spi_dev_s *dev);
+static inline int at25_readid(struct at25_dev_s *priv);
+static void at25_waitwritecomplete(struct at25_dev_s *priv);
+static void at25_writeenable(struct at25_dev_s *priv);
+static inline void at25_sectorerase(struct at25_dev_s *priv, off_t offset);
+static inline int  at25_bulkerase(struct at25_dev_s *priv);
+static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *buffer,
+                                  off_t offset);
+
+/* MTD driver methods */
+
+static int at25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
+static ssize_t at25_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                          size_t nblocks, FAR uint8_t *buf);
+static ssize_t at25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR const uint8_t *buf);
+static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR uint8_t *buffer);
+static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: at25_lock
+ ************************************************************************************/
+
+static void at25_lock(FAR struct spi_dev_s *dev)
+{
+  /* On SPI busses where there are multiple devices, it will be necessary to
+   * lock SPI to have exclusive access to the busses for a sequence of
+   * transfers.  The bus should be locked before the chip is selected.
+   *
+   * This is a blocking call and will not return until we have exclusiv access to
+   * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
+   */
+
+  (void)SPI_LOCK(dev, true);
+
+  /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
+   * setmode methods to make sure that the SPI is properly configured for the device.
+   * If the SPI buss is being shared, then it may have been left in an incompatible
+   * state.
+   */
+
+  SPI_SETMODE(dev, CONFIG_AT25_SPIMODE);
+  SPI_SETBITS(dev, 8);
+  (void)SPI_SETFREQUENCY(dev, 20000000);
+}
+
+/************************************************************************************
+ * Name: at25_unlock
+ ************************************************************************************/
+
+static inline void at25_unlock(FAR struct spi_dev_s *dev)
+{
+  (void)SPI_LOCK(dev, false);
+}
+
+/************************************************************************************
+ * Name: at25_readid
+ ************************************************************************************/
+
+static inline int at25_readid(struct at25_dev_s *priv)
+{
+  uint16_t manufacturer;
+  uint16_t memory;
+  uint16_t version;
+
+  fvdbg("priv: %p\n", priv);
+
+  /* Lock the SPI bus, configure the bus, and select this FLASH part. */
+
+  at25_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Read ID (RDID)" command and read the first three ID bytes */
+
+  (void)SPI_SEND(priv->dev, AT25_RDID);
+  manufacturer = SPI_SEND(priv->dev, AT25_DUMMY);
+  memory       = SPI_SEND(priv->dev, AT25_DUMMY);
+  
+  /* Deselect the FLASH and unlock the bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  at25_unlock(priv->dev);
+
+  fvdbg("manufacturer: %02x memory: %02x\n",
+        manufacturer, memory);
+
+  /* Check for a valid manufacturer and memory type */
+
+  if (manufacturer == AT25_MANUFACTURER && memory == AT25_AT25DF321_TYPE)
+    {
+        priv->sectorshift = AT25_AT25DF321_SECTOR_SHIFT;
+        priv->nsectors    = AT25_AT25DF321_NSECTORS;
+        priv->pageshift   = AT25_AT25DF321_PAGE_SHIFT;
+        priv->npages      = AT25_AT25DF321_NPAGES;
+        return OK;
+    }
+
+  return -ENODEV;
+}
+
+/************************************************************************************
+ * Name: at25_waitwritecomplete
+ ************************************************************************************/
+
+static void at25_waitwritecomplete(struct at25_dev_s *priv)
+{
+  uint8_t status;
+
+  /* Are we the only device on the bus? */
+
+#ifdef CONFIG_SPI_OWNBUS
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read Status Register (RDSR)" command */
+
+  (void)SPI_SEND(priv->dev, AT25_RDSR);
+  
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, AT25_DUMMY);
+    }
+  while ((status & AT25_SR_WIP) != 0);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+#else
+
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Select this FLASH part */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+      /* Send "Read Status Register (RDSR)" command */
+
+      (void)SPI_SEND(priv->dev, AT25_RDSR);
+
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, AT25_DUMMY);
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+      /* Given that writing could take up to few tens of milliseconds, and erasing
+       * could take more.  The following short delay in the "busy" case will allow
+       * other peripherals to access the SPI bus.
+       */
+
+      if ((status & AT25_SR_WIP) != 0)
+        {
+          at25_unlock(priv->dev);
+          usleep(10000);
+          at25_lock(priv->dev);
+        }
+    }
+  while ((status & AT25_SR_WIP) != 0);
+#endif
+
+  if (status & AT25_SR_EPE)
+    {
+      fdbg("Write error, status: 0x%02x\n", status);
+    }
+  
+  fvdbg("Complete, status: 0x%02x\n", status);
+}
+
+/************************************************************************************
+ * Name:  at25_writeenable
+ ************************************************************************************/
+
+static void at25_writeenable(struct at25_dev_s *priv)
+{
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+  (void)SPI_SEND(priv->dev, AT25_WREN);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  fvdbg("Enabled\n");
+}
+
+/************************************************************************************
+ * Name:  at25_sectorerase
+ ************************************************************************************/
+
+static inline void at25_sectorerase(struct at25_dev_s *priv, off_t sector)
+{
+  off_t offset = sector << priv->sectorshift;
+
+  fvdbg("sector: %08lx\n", (long)sector);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  at25_waitwritecomplete(priv);
+
+  /* Send write enable instruction */
+
+  at25_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Sector Erase (SE)" instruction */
+
+  (void)SPI_SEND(priv->dev, AT25_SE);
+
+  /* Send the sector offset high byte first.  For all of the supported
+   * parts, the sector number is completely contained in the first byte
+   * and the values used in the following two bytes don't really matter.
+   */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  fvdbg("Erased\n");
+}
+
+/************************************************************************************
+ * Name:  at25_bulkerase
+ ************************************************************************************/
+
+static inline int at25_bulkerase(struct at25_dev_s *priv)
+{
+  fvdbg("priv: %p\n", priv);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  at25_waitwritecomplete(priv);
+
+  /* Send write enable instruction */
+
+  at25_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Bulk Erase (BE)" instruction */
+
+  (void)SPI_SEND(priv->dev, AT25_BE);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  fvdbg("Return: OK\n");
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  at25_pagewrite
+ ************************************************************************************/
+
+static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *buffer,
+                                  off_t page)
+{
+  off_t offset = page << 8;
+
+  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  at25_waitwritecomplete(priv);
+
+  /* Enable the write access to the FLASH */
+
+  at25_writeenable(priv);
+  
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Page Program (PP)" command */
+
+  (void)SPI_SEND(priv->dev, AT25_PP);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then write the specified number of bytes */
+
+  SPI_SNDBLOCK(priv->dev, buffer, 256);
+  
+  /* Deselect the FLASH: Chip Select high */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  fvdbg("Written\n");
+}
+
+/************************************************************************************
+ * Name: at25_erase
+ ************************************************************************************/
+
+static int at25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
+{
+  FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
+  size_t blocksleft = nblocks;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock access to the SPI bus until we complete the erase */
+
+  at25_lock(priv->dev);
+  while (blocksleft-- > 0)
+    {
+      /* Erase each sector */
+
+      at25_sectorerase(priv, startblock);
+      startblock++;
+    }
+
+  at25_unlock(priv->dev);
+  return (int)nblocks;
+}
+
+/************************************************************************************
+ * Name: at25_bread
+ ************************************************************************************/
+
+static ssize_t at25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
+                          FAR uint8_t *buffer)
+{
+  FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
+  ssize_t nbytes;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* On this device, we can handle the block read just like the byte-oriented read */
+
+  nbytes = at25_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift, buffer);
+  if (nbytes > 0)
+    {
+        return nbytes >> priv->pageshift;
+    }
+
+  return (int)nbytes;
+}
+
+/************************************************************************************
+ * Name: at25_bwrite
+ ************************************************************************************/
+
+static ssize_t at25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
+                           FAR const uint8_t *buffer)
+{
+  FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
+  size_t blocksleft = nblocks;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock the SPI bus and write each page to FLASH */
+
+  at25_lock(priv->dev);
+  while (blocksleft-- > 0)
+    {
+      at25_pagewrite(priv, buffer, startblock * 2);
+      at25_pagewrite(priv, buffer + 256, startblock * 2 + 1);
+      buffer += 1 << priv->pageshift;
+      startblock++;
+   }
+
+  at25_unlock(priv->dev);
+  return nblocks;
+}
+
+/************************************************************************************
+ * Name: at25_read
+ ************************************************************************************/
+
+static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR uint8_t *buffer)
+{
+  FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
+
+  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  at25_waitwritecomplete(priv);
+
+  /* Lock the SPI bus and select this FLASH part */
+
+  at25_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read from Memory " instruction */
+
+  (void)SPI_SEND(priv->dev, AT25_READ);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then read all of the requested bytes */
+
+  SPI_RECVBLOCK(priv->dev, buffer, nbytes);
+
+  /* Deselect the FLASH and unlock the SPI bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  at25_unlock(priv->dev);
+
+  fvdbg("return nbytes: %d\n", (int)nbytes);
+  return nbytes;
+}
+
+/************************************************************************************
+ * Name: at25_ioctl
+ ************************************************************************************/
+
+static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
+  int ret = -EINVAL; /* Assume good command with bad parameters */
+
+  fvdbg("cmd: %d \n", cmd);
+
+  switch (cmd)
+    {
+      case MTDIOC_GEOMETRY:
+        {
+          FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg);
+          if (geo)
+            {
+              /* Populate the geometry structure with information need to know
+               * the capacity and how to access the device.
+               *
+               * NOTE: that the device is treated as though it where just an array
+               * of fixed size blocks.  That is most likely not true, but the client
+               * will expect the device logic to do whatever is necessary to make it
+               * appear so.
+               */
+
+              geo->blocksize    = (1 << priv->pageshift);
+              geo->erasesize    = (1 << priv->sectorshift);
+              geo->neraseblocks = priv->nsectors;
+              ret               = OK;
+
+              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+                    geo->blocksize, geo->erasesize, geo->neraseblocks);
+            }
+        }
+        break;
+
+      case MTDIOC_BULKERASE:
+        {
+            /* Erase the entire device */
+
+            at25_lock(priv->dev);
+            ret = at25_bulkerase(priv);
+            at25_unlock(priv->dev);
+        }
+        break;
+ 
+      case MTDIOC_XIPBASE:
+      default:
+        ret = -ENOTTY; /* Bad command */
+        break;
+    }
+
+  fvdbg("return %d\n", ret);
+  return ret;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: at25_initialize
+ *
+ * Description:
+ *   Create an initialize MTD device instance.  MTD devices are not registered
+ *   in the file system, but are created as instances that can be bound to
+ *   other functions (such as a block or character driver front end).
+ *
+ ************************************************************************************/
+
+FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev)
+{
+  FAR struct at25_dev_s *priv;
+  int ret;
+
+  fvdbg("dev: %p\n", dev);
+
+  /* Allocate a state structure (we allocate the structure instead of using
+   * a fixed, static allocation so that we can handle multiple FLASH devices.
+   * The current implementation would handle only one FLASH part per SPI
+   * device (only because of the SPIDEV_FLASH definition) and so would have
+   * to be extended to handle multiple FLASH parts on the same SPI bus.
+   */
+
+  priv = (FAR struct at25_dev_s *)kmalloc(sizeof(struct at25_dev_s));
+  if (priv)
+    {
+      /* Initialize the allocated structure */
+
+      priv->mtd.erase  = at25_erase;
+      priv->mtd.bread  = at25_bread;
+      priv->mtd.bwrite = at25_bwrite;
+      priv->mtd.read   = at25_read;
+      priv->mtd.ioctl  = at25_ioctl;
+      priv->dev        = dev;
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(dev, SPIDEV_FLASH, false);
+
+      /* Identify the FLASH chip and get its capacity */
+
+      ret = at25_readid(priv);
+      if (ret != OK)
+        {
+          /* Unrecognized! Discard all of that work we just did and return NULL */
+
+          fdbg("Unrecognized\n");
+          kfree(priv);
+          priv = NULL;
+        }
+        
+      /* Unprotect all sectors */
+
+      at25_writeenable(priv);
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+      (void)SPI_SEND(priv->dev, AT25_WRSR);
+      (void)SPI_SEND(priv->dev, AT25_SR_UNPROT);
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+    }
+
+  /* Return the implementation-specific state structure as the MTD device */
+
+  fvdbg("Return %p\n", priv);
+  return (FAR struct mtd_dev_s *)priv;
+}
diff --git a/nuttx/drivers/mtd/ftl.c b/nuttx/drivers/mtd/ftl.c
index cdb35aa5c..6cf8f0317 100644
--- a/nuttx/drivers/mtd/ftl.c
+++ b/nuttx/drivers/mtd/ftl.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/mtd/ftl.c
  *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -229,6 +229,10 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
   remaining = nblocks;
   if (alignedblock > startblock)
     {
+      /* Check if the write is shorter than to the end of the erase block */
+
+      bool short_write = (remaining < (alignedblock - startblock));
+      
       /* Read the full erase block into the buffer */
 
       rwblock = startblock & ~mask;
@@ -252,9 +256,19 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       /* Copy the user data at the end of the buffered erase block */
 
       offset = (startblock & mask) * dev->geo.blocksize;
-      nbytes = dev->geo.erasesize - offset;
+      
+      if (short_write)
+        {
+          nbytes = remaining * dev->geo.blocksize;
+        }
+      else
+        {
+          nbytes = dev->geo.erasesize - offset;
+        }
+      
       fvdbg("Copy %d bytes into erase block=%d at offset=%d\n",
              nbytes, eraseblock, offset);
+
       memcpy(dev->eblock + offset, buffer, nbytes);
 
       /* And write the erase back to flash */
@@ -268,8 +282,16 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
 
       /* Then update for amount written */
 
-      remaining -= dev->blkper - (startblock & mask);
-      buffer    += nbytes;
+      if (short_write)
+        {
+          remaining = 0;
+        }
+      else
+        {
+          remaining -= dev->blkper - (startblock & mask);
+        }
+      
+      buffer += nbytes;
     }
 
   /* How handle full erase pages in the middle */
@@ -290,6 +312,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
 
       fvdbg("Write %d bytes into erase block=%d at offset=0\n",
              dev->geo.erasesize, alignedblock);
+
       nxfrd = MTD_BWRITE(dev->mtd, alignedblock, dev->blkper, buffer);
       if (nxfrd != dev->blkper)
         {
diff --git a/nuttx/drivers/power/Make.defs b/nuttx/drivers/power/Make.defs
index 45c6aebc3..e3452120d 100644
--- a/nuttx/drivers/power/Make.defs
+++ b/nuttx/drivers/power/Make.defs
@@ -47,7 +47,7 @@ CSRCS += pm_activity.c pm_changestate.c pm_checkstate.c pm_initialize.c pm_regis
 
 POWER_DEPPATH := --dep-path power
 POWER_VPATH := :power
-POWER_CFLAGS := ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/power}
+POWER_CFLAGS := ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)power}
 
 endif
 
@@ -73,7 +73,7 @@ endif
 
 POWER_DEPPATH := --dep-path power
 POWER_VPATH := :power
-POWER_CFLAGS := ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/power}
+POWER_CFLAGS := ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)power}
 
 endif
 
diff --git a/nuttx/drivers/sensors/Make.defs b/nuttx/drivers/sensors/Make.defs
index 866ccb053..1713edb99 100644
--- a/nuttx/drivers/sensors/Make.defs
+++ b/nuttx/drivers/sensors/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/sensors/Make.defs
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -57,4 +57,4 @@ endif
 
 DEPPATH += --dep-path sensors
 VPATH += :sensors
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/sensors}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)sensors}
diff --git a/nuttx/drivers/serial/Kconfig b/nuttx/drivers/serial/Kconfig
index 43869fdec..a1e0dff49 100644
--- a/nuttx/drivers/serial/Kconfig
+++ b/nuttx/drivers/serial/Kconfig
@@ -3,10 +3,12 @@
 # see misc/tools/kconfig-language.txt.
 #
 
-config LOWLEVEL_CONSOLE
+config DEV_LOWCONSOLE
 	bool "Low-level console support"
 	default n
 	depends on ARCH_LOWPUTC
+	---help---
+		Use the simple, low-level, write-only serial console driver (minimal support)
 
 config 16550_UART
 	bool "16550 UART Chip support"
@@ -317,7 +319,7 @@ config STANDARD_SERIAL
 	bool "Enable standard \"upper-half\" serial driver"
 	default y if MCU_SERIAL
 	default n if !MCU_SERIAL
-	depends on !LOWLEVEL_CONSOLE
+	depends on !DEV_LOWCONSOLE
 	---help---
 		Enable the standard, upper-half serial driver used by most MCU serial peripherals.
 
@@ -422,7 +424,7 @@ config UART_TXBUFSIZE
 
 config UART_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -465,7 +467,7 @@ config UART0_TXBUFSIZE
 
 config UART0_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -508,7 +510,7 @@ config USART0_TXBUFSIZE
 
 config USART0_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -551,7 +553,7 @@ config UART1_TXBUFSIZE
 
 config UART1_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -594,7 +596,7 @@ config USART1_TXBUFSIZE
 
 config USART1_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -637,7 +639,7 @@ config UART2_TXBUFSIZE
 
 config UART2_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -680,7 +682,7 @@ config USART2_TXBUFSIZE
 
 config USART2_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -723,7 +725,7 @@ config UART3_TXBUFSIZE
 
 config UART3_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -766,7 +768,7 @@ config USART3_TXBUFSIZE
 
 config USART3_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -809,7 +811,7 @@ config UART4_TXBUFSIZE
 
 config UART4_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -852,7 +854,7 @@ config USART4_TXBUFSIZE
 
 config USART4_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -895,7 +897,7 @@ config UART5_TXBUFSIZE
 
 config UART5_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
@@ -938,7 +940,7 @@ config USART5_TXBUFSIZE
 
 config USART5_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -981,7 +983,7 @@ config USART6_TXBUFSIZE
 
 config USART6_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the USART.
 
@@ -1024,7 +1026,7 @@ config UART6_TXBUFSIZE
 
 config UART6_BAUD
 	int "baud rate"
-	default 11520
+	default 115200
 	help
 	  The configured BAUD of the UART.
 
diff --git a/nuttx/drivers/serial/serial.c b/nuttx/drivers/serial/serial.c
index da326f8c6..30ad8ff6e 100644
--- a/nuttx/drivers/serial/serial.c
+++ b/nuttx/drivers/serial/serial.c
@@ -233,7 +233,9 @@ static int uart_putxmitchar(FAR uart_dev_t *dev, int ch)
         }
     }
 
-  /* We won't get here */
+  /* We won't get here.  Some compilers may complain that this code is
+   * unreachable.
+   */
 
   return OK;
 }
diff --git a/nuttx/drivers/usbdev/Make.defs b/nuttx/drivers/usbdev/Make.defs
index f1b3c405a..e43693b29 100644
--- a/nuttx/drivers/usbdev/Make.defs
+++ b/nuttx/drivers/usbdev/Make.defs
@@ -59,5 +59,5 @@ CSRCS += usbdev_trace.c usbdev_trprintf.c
 
 DEPPATH += --dep-path usbdev
 VPATH += :usbdev
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/usbdev}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)usbdev}
 endif
diff --git a/nuttx/drivers/usbhost/Make.defs b/nuttx/drivers/usbhost/Make.defs
index fd54ab53e..ebb522695 100644
--- a/nuttx/drivers/usbhost/Make.defs
+++ b/nuttx/drivers/usbhost/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/usbhost/Make.defs
 #
-#   Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -45,7 +45,7 @@ CSRCS  += usbhost_enumerate.c usbhost_storage.c usbhost_hidkbd.c
 # Include add-on USB host driver logic (see misc/drivers)
 
 ifeq ($(CONFIG_NET),y)
-  RTL8187_CSRC  := ${shell if [ -f usbhost/rtl8187x.c ]; then echo "rtl8187x.c"; fi}
+  RTL8187_CSRC  := ${shell if [ -f usbhost$(DELIM)rtl8187x.c ]; then echo "rtl8187x.c"; fi}
   CSRCS += $(RTL8187_CSRC)
 endif
 endif
@@ -54,4 +54,4 @@ endif
 
 DEPPATH += --dep-path usbhost
 VPATH += :usbhost
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/usbhost}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)usbhost}
diff --git a/nuttx/drivers/wireless/Make.defs b/nuttx/drivers/wireless/Make.defs
index f47f7666a..fa8e8acb5 100644
--- a/nuttx/drivers/wireless/Make.defs
+++ b/nuttx/drivers/wireless/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/wireless/Make.defs
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -41,7 +41,7 @@ CSRCS += cc1101.c ISM1_868MHzGFSK100kbps.c ISM2_905MHzGFSK250kbps.c
 
 # Include wireless build support
 
-DEPPATH += --dep-path wireless/cc1101
-VPATH += :wireless/cc1101
-CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/wireless/cc1101}
+DEPPATH += --dep-path wireless$(DELIM)cc1101
+VPATH += :wireless$(DELIM)cc1101
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)wireless$(DELIM)cc1101}
 endif