Fix ENC28J60 chip enable issue

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5153 7fd9a85b-ad96-42d3-883c-3090e2eb8679

2 files changed, 7 insertions, 7 deletions

diff --git a/nuttx/drivers/mtd/sst25.c b/nuttx/drivers/mtd/sst25.c
index 01838f078..66d201add 100644
--- a/nuttx/drivers/mtd/sst25.c
+++ b/nuttx/drivers/mtd/sst25.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * drivers/mtd/m25px.c
+ * drivers/mtd/sst25.c
  * Driver for SPI-based SST25 FLASH.
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
diff --git a/nuttx/drivers/net/enc28j60.c b/nuttx/drivers/net/enc28j60.c
index d3c735b11..6ac399a19 100644
--- a/nuttx/drivers/net/enc28j60.c
+++ b/nuttx/drivers/net/enc28j60.c
@@ -652,14 +652,14 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
 
   DEBUGASSERT(priv && priv->spi);
 
-  /* Select ENC28J60 chip */
-
-  enc_select(priv);
-
   /* Set the bank */
 
   enc_setbank(priv, GETBANK(ctrlreg));
 
+  /* Select ENC28J60 chip */
+
+  enc_select(priv);
+
   /* Send the RCR command and collect the data.  How we collect the data
    * depends on if this is a PHY/CAN or not.  The normal sequence requires
    * 16-clocks:  8 to clock out the cmd and  8 to clock in the data.
@@ -672,10 +672,10 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
        * 8 dummy bits, and 8 to clock in the PHY/MAC data.
        */
 
-      (void)SPI_SEND(priv->spi, 0);                      /* Clock in the dummy byte */
+      (void)SPI_SEND(priv->spi, 0); /* Clock in the dummy byte */
     }
 
-  rddata = SPI_SEND(priv->spi, 0);                       /* Clock in the data */
+  rddata = SPI_SEND(priv->spi, 0);  /* Clock in the data */
 
   /* De-select ENC28J60 chip */