Add support for the TI PGA11x amplifier/multiplexer

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4977 7fd9a85b-ad96-42d3-883c-3090e2eb8679

13 files changed, 1016 insertions, 35 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 44ffa57bf..9d18dcf49 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -3050,7 +3050,7 @@
 	* include/termios.h and lib/termios/*:  Redesigned yet again (this is getting
 	  painful.  NuttX now supports the BOTHER baud setting just as Linux does.  termios
 	  Bxxx definitions are again encoded; cf[set|get][o|i]speed now deal with only the
-	  encoded values.  If the encoed baud is set to BOTHER, then the values in the (non-
+	  encoded values.  If the encode baud is set to BOTHER, then the values in the (non-
 	  standard) c_ispeed and c_ospeed baud values may be accessed directly.
 	* arch/arm/src/stm32/stm32_serial.c:  Add minimal termios support for the STM32
 	  (BOTHER style baud settings only).  Contributed by Mike Smith.
@@ -3068,4 +3068,8 @@
 	* configs/stm32f4discovery/src and configs/stm32f4discovery/pm:  Add a power
 	  management configuration for the STM32F4Discovery and supporting logic.  This
 	  check-in also includes some fixes for the F4 RTC alarm logic.
+	* drivers/input/pga11x.c and include/nuttx/input/pga11x.h:  Add support for the
+	  TI PGA112/3/6/7 amplifier/multiplexer parts.
+	* configs/mirtoo/README.txt, nsh/defconfig, and nxffs/defconfig:  Add support
+	  for the PGA117 on the Mirtoo module.
 
diff --git a/nuttx/configs/mirtoo/README.txt b/nuttx/configs/mirtoo/README.txt
index 7ef2f5b3f..41d101228 100644
--- a/nuttx/configs/mirtoo/README.txt
+++ b/nuttx/configs/mirtoo/README.txt
@@ -776,6 +776,7 @@ selected as follow:
 Where <subdir> is one of the following:
 
   ostest:
+  =======
     This configuration directory, performs a simple OS test using
     apps/examples/ostest.  This configuration use UART1 which is
     available on FUNC 4 and 5 on connector X3:
@@ -799,6 +800,7 @@ Where <subdir> is one of the following:
     the XC32 toolchain.
 
   nsh:
+  ====
     This configuration directory holds configuration files tht can
     be used to support the NuttShell (NSH).  This configuration use
     UART1 which is available on FUNC 4 and 5 on connector X3:
@@ -806,6 +808,8 @@ Where <subdir> is one of the following:
       CONFIG_PIC32MX_UART1=y           : UART1 for serial console
       CONFIG_UART1_SERIAL_CONSOLE=n
 
+    UART2
+    -----
     If you are not using MPLAB to debug, you may switch to UART2
     by following the instructions above for the ostest configuration.
 
@@ -819,7 +823,17 @@ Where <subdir> is one of the following:
     path to the toolchain in setenv.sh.  See notes above with regard to
     the XC32 toolchain.
 
+    PGA117 Support:
+    --------------
+    The Mirtoo's PGA117 amplifier/multipexer is not used by this configuration
+    but can be enabled by setting:
+
+       CONFIG_INPUT=y         : Enable support for INPUT devices
+       CONFIG_SPI_OWNBUS=y    : If the PGA117 is the only device on the bus
+       CONFIG_INPUT_PGA11X=y  : Enable support for the PGA117
+
   nxffs:
+  ======
     This is a configuration very similar to the nsh configuration.  This
     configure also provides the NuttShell (NSH).  And this configuration use
     UART1 which is available on FUNC 4 and 5 on connector X3 (as described
@@ -867,29 +881,40 @@ Where <subdir> is one of the following:
        CONFIG_NSH_DISABLE_TEST=y
        CONFIG_NSH_DISABLE_WGET=y
 
-     When the system boots, you should have the NXFFS file system mounted
-     at /mnt/sst25.
+    When the system boots, you should have the NXFFS file system mounted
+    at /mnt/sst25.
+
+    NOTES:  (1) It takes many seconds to boot the sytem using the NXFFS
+    file system because the entire FLASH must be verified on power up
+    (and longer the first time that NXFFS comes up and has to format the
+    entire FLASH). (2) FAT does not have these delays and this configuration
+    can be modified to use the (larger) FAT file system as described below.
+    But you will, or course, lose the wear-leveling feature if FAT is used.
+
+    fat:
+    ----
+    There is no FAT configuration, but the nxffx configuration can be used
+    to support the FAT FS if the following changes are made to the NuttX
+    configuration file:
+
+      CONFIG_FS_NXFFS=n
+      CONFIG_FS_FAT=y
+      CONFIG_NSH_DISABLE_MKFATFS=n
 
-     NOTES:  (1) It takes many seconds to boot the sytem using the NXFFS
-     file system because the entire FLASH must be verified on power up
-     (and longer the first time that NXFFS comes up and has to format the
-     entire FLASH). (2) FAT does not have these delays and this configuration
-     can be modified to use the (larger) FAT file system as described below.
-     But you will, or course, lose the wear-leveling feature if FAT is used.
+    In this configuration, the FAT file system will not be automatically
+    monounted.  When NuttX boots to the NSH prompt, you will find the
+    SST5 block driver at /dev/mtdblock0.  This can be formatted with a
+    FAT file system and mounted with these commands:
 
-  fat:
-     There is no FAT configuration, but the nxffx configuration can be used
-     to support the FAT FS if the following changes are made to the NuttX
-     configuration file:
+      nsh> mkfatfs /dev/mtdblock0
+      nsh> mount -t vfat /dev/mtdblock0 /mnt/sst25
 
-       CONFIG_FS_NXFFS=n
-       CONFIG_FS_FAT=y
-       CONFIG_NSH_DISABLE_MKFATFS=n
+    PGA117 Support:
+    ---------------
+    The Mirtoo's PGA117 amplifier/multipexer is not used by this configuration
+    but can be enabled by setting:
 
-     In this configuration, the FAT file system will not be automatically
-     monounted.  When NuttX boots to the NSH prompt, you will find the
-     SST5 block driver at /dev/mtdblock0.  This can be formatted with a
-     FAT file system and mounted with these commands:
+      CONFIG_INPUT=y         : Enable support for INPUT devices
+      CONFIG_SPI_OWNBUS=n    : The PGA117 is *not* the only device on the bus
+      CONFIG_INPUT_PGA11X=y  : Enable support for the PGA117
 
-       nsh> mkfatfs /dev/mtdblock0
-       nsh> mount -t vfat /dev/mtdblock0 /mnt/sst25
diff --git a/nuttx/configs/mirtoo/nsh/defconfig b/nuttx/configs/mirtoo/nsh/defconfig
index a96ccbc14..b4eb54f11 100644
--- a/nuttx/configs/mirtoo/nsh/defconfig
+++ b/nuttx/configs/mirtoo/nsh/defconfig
@@ -747,6 +747,43 @@ CONFIG_USBMSC_VERSIONNO=0x0399
 CONFIG_USBMSC_REMOVABLE=y
 
 #
+# PGA117 support
+#
+# Prerequisites:
+#  CONFIG_INPUT=y is needed to enable support for INPUT devices
+#
+# CONFIG_INPUT_PGA11X
+#   Enables support for the PGA11X driver (Needs CONFIG_INPUT)
+# CONFIG_PGA11X_SPIFREQUENCY
+#   SPI frequency.  Default 1MHz
+# CONFIG_PGA11X_DAISYCHAIN
+#   Use two PGA116/7's in Daisy Chain commands.
+# CONFIG_PGA11X_SPIMODE
+#   SPI Mode.  The specification says that the device operates in Mode 0 or
+#   Mode 3.  But sometimes you need to tinker with this to get things to
+#   work correctly. Default:  Mode 0
+# CONFIG_PGA11X_MULTIPLE
+#   Can be defined to support multiple PGA11X devices on board.  Each
+#   device will require a customized SPI interface to distinguish them
+#   When SPI_SELECT is called with devid=SPIDEV_MUX.
+#
+# Other settings that effect the driver:
+#   CONFIG_SPI_OWNBUS -- If the PGA117 is the only device on the SPI
+#     bus, then this should be set to 'y'
+#   CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
+#     this will enable debug output from the PGA117 driver.
+#
+CONFIG_INPUT=n
+CONFIG_SPI_OWNBUS=y
+CONFIG_DEBUG_SPI=n
+
+CONFIG_INPUT_PGA11X=n
+#CONFIG_PGA11X_SPIFREQUENCY
+CONFIG_PGA11X_DAISYCHAIN=n
+CONFIG_PGA11X_SPIMODE=1
+CONFIG_PGA11X_MULTIPLE=n
+
+#
 # Settings for examples/uip
 #
 CONFIG_EXAMPLE_UIP_IPADDR=(10<<24|0<<16|0<<8|2)
diff --git a/nuttx/configs/mirtoo/nxffs/defconfig b/nuttx/configs/mirtoo/nxffs/defconfig
index 8073dd828..fb9be8e0c 100644
--- a/nuttx/configs/mirtoo/nxffs/defconfig
+++ b/nuttx/configs/mirtoo/nxffs/defconfig
@@ -747,6 +747,46 @@ CONFIG_USBMSC_VERSIONNO=0x0399
 CONFIG_USBMSC_REMOVABLE=y
 
 #
+# PGA117 support
+#
+# Prerequisites:
+#  CONFIG_INPUT=y is needed to enable support for INPUT devices
+#
+# CONFIG_INPUT_PGA11X
+#   Enables support for the PGA11X driver (Needs CONFIG_INPUT)
+# CONFIG_PGA11X_SPIFREQUENCY
+#   SPI frequency.  Default 1MHz
+# CONFIG_PGA11X_DAISYCHAIN
+#   Use two PGA116/7's in Daisy Chain commands.
+# CONFIG_PGA11X_SPIMODE
+#   SPI Mode.  The specification says that the device operates in Mode 0 or
+#   Mode 3.  But sometimes you need to tinker with this to get things to
+#   work correctly. Default:  Mode 0
+# CONFIG_PGA11X_MULTIPLE
+#   Can be defined to support multiple PGA11X devices on board.  Each
+#   device will require a customized SPI interface to distinguish them
+#   When SPI_SELECT is called with devid=SPIDEV_MUX.
+#
+# Other settings that effect the driver:
+#   CONFIG_SPI_OWNBUS -- If the PGA117 is enabled, this must be set to 'n'
+#     because the PGA117 is *not* the only device on the SPI bus; the SPI
+#     bus is shared with the serial FLASH.  If PGA117 is not enabled, then
+#     'y' is the correct value because the serial FLASH is the only device
+#     on the SPI bus.
+#   CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
+#     this will enable debug output from the PGA117 driver.
+#
+CONFIG_INPUT=n
+CONFIG_SPI_OWNBUS=y
+CONFIG_DEBUG_SPI=n
+
+CONFIG_INPUT_PGA11X=n
+#CONFIG_PGA11X_SPIFREQUENCY
+CONFIG_PGA11X_DAISYCHAIN=n
+CONFIG_PGA11X_SPIMODE=1
+CONFIG_PGA11X_MULTIPLE=n
+
+#
 # Settings for examples/uip
 #
 CONFIG_EXAMPLE_UIP_IPADDR=(10<<24|0<<16|0<<8|2)
diff --git a/nuttx/drivers/input/Make.defs b/nuttx/drivers/input/Make.defs
index aaf08b827..cd9174087 100644
--- a/nuttx/drivers/input/Make.defs
+++ b/nuttx/drivers/input/Make.defs
@@ -63,6 +63,10 @@ ifneq ($(CONFIG_INPUT_STMPE811_TEMP_DISABLE),y)
 endif
 endif
 
+ifeq ($(CONFIG_INPUT_PGA11X),y)
+  CSRCS += pga11x.c
+endif
+
 # Include input device driver build support
 
 DEPPATH += --dep-path input
diff --git a/nuttx/drivers/input/ads7843e.c b/nuttx/drivers/input/ads7843e.c
index 4db412ea4..750b91ff2 100644
--- a/nuttx/drivers/input/ads7843e.c
+++ b/nuttx/drivers/input/ads7843e.c
@@ -183,7 +183,7 @@ static void ads7843e_select(FAR struct spi_dev_s *spi)
    * devices competing for the SPI bus
    */
 
-  SPI_LOCK(spi, true);
+  (void)SPI_LOCK(spi, true);
   SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, true);
 
   /* Now make sure that the SPI bus is configured for the ADS7843 (it
@@ -229,7 +229,7 @@ static void ads7843e_deselect(FAR struct spi_dev_s *spi)
   /* De-select ADS7843 chip and relinquish the SPI bus. */
 
   SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, false);
-  SPI_LOCK(spi, false);
+  (void)SPI_LOCK(spi, false);
 }
 #endif
 
diff --git a/nuttx/drivers/input/pga11x.c b/nuttx/drivers/input/pga11x.c
new file mode 100644
index 000000000..e2edb4f3d
--- /dev/null
+++ b/nuttx/drivers/input/pga11x.c
@@ -0,0 +1,580 @@
+/****************************************************************************
+ * drivers/input/pga11x.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * References:
+ *   "PGA112, PGA113, PGA116, PGA117: Zerø-Drift PROGRAMMABLE GAIN AMPLIFIER
+ *   with MUX", SBOS424B, March 2008, Revised September 2008, Texas
+ *   Instruments Incorporated"
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/input/pga11x.h>
+
+#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_PGA11X)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* The PGA112/PGA113 have a three-wire SPI digital interface; the
+ * PGA116/PGA117 have a four-wire SPI digital interface. The PGA116/117 also
+ * have daisy-chain capability (The PGA112/PGA113 can be used as the last device
+ * in a daisy-chain as shown if write-only communication is acceptable).
+ */
+
+/* PGA11x commands (PGA112/PGA113) */
+
+#define PGA11X_CMD_READ          0x6a00
+#define PGA11X_CMD_WRITE         0x2a00
+#define PGA11X_CMA_NOOP          0x0000
+#define PGA11X_CMA_SDN_DIS       0xe100
+#define PGA11X_CMA_SDN_EN        0xe1f1
+
+/* SPI Daisy-Chain Commands (PGA116/PGA117) */
+
+#define PGA11X_DCCMD_SELECTOR    0x8000
+#define PGA11X_DCCMD_NOOP        (PGA11X_DCCMD_SELECTOR | PGA11X_CMA_NOOP)
+#define PGA11X_DCCMA_SDN_DIS     (PGA11X_DCCMD_SELECTOR | PGA11X_CMA_SDN_DIS)
+#define PGA11X_DCCMA_SDN_EN      (PGA11X_DCCMD_SELECTOR | PGA11X_CMA_SDN_EN)
+#define PGA11X_DCCMD_READ        (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_READ)
+#define PGA11X_DCCMD_WRITE       (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_WRITE)
+
+/* Write command Gain Selection Bits (PGA112/PGA113)
+ *
+ * the PGA112 and PGA116 provide binary gain selections (1, 2, 4, 8, 16, 32,
+ * 64, 128); the PGA113 and PGA117 provide scope gain selections (1, 2, 5, 10,
+ * 20, 50, 100, 200).
+ */
+
+#define PGA11X_GAIN_SHIFT        (4)      /* Bits 4-7: Gain Selection Bits */
+#define PGA11X_GAIN_MASK         (15 << PGA11X_GAIN_SHIFT)
+
+/* Write command Mux Channel Selection Bits
+ *
+ * The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
+ * 10-channel input MUX.
+ */
+
+#define PGA11X_CHAN_SHIFT        (0)      /* Bits 0-3: Channel Selection Bits */
+#define PGA11X_CHAN_MASK         (15 << PGA11X_CHAN_SHIFT)
+
+/* Other definitions ********************************************************/
+
+#define SPI_DUMMY 0xff
+
+/* Debug ****************************************************************************/
+/* Check if (non-standard) SPI debug is enabled */
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_VERBOSE
+#  undef CONFIG_DEBUG_SPI
+#endif
+
+#ifdef CONFIG_DEBUG_SPI
+#  define spidbg lldbg
+#  ifdef CONFIG_DEBUG_VERBOSE
+#    define spivdbg lldbg
+#  else
+#    define spivdbg(x...)
+#  endif
+#else
+#  define spidbg(x...)
+#  define spivdbg(x...)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pga11x_configure
+ *
+ * Description:
+ *   Configure the SPI bus as needed for the PGA11x device.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void pga11x_configure(FAR struct spi_dev_s *spi)
+{
+  spivdbg("MODE: %d BITS: 8 Frequency: %d\n",
+          CONFIG_PGA11X_SPIMODE, CONFIG_PGA11X_SPIFREQUENCY);
+
+  /* Call the setfrequency, setbits, and setmode methods to make sure that
+   * the SPI is properly configured for the device.
+   */
+
+  SPI_SETMODE(spi, CONFIG_PGA11X_SPIMODE);
+  SPI_SETBITS(spi, 8);
+  (void)SPI_SETFREQUENCY(spi, CONFIG_PGA11X_SPIFREQUENCY);
+}
+
+/****************************************************************************
+ * Name: pga11x_lock
+ *
+ * Description:
+ *   Lock the SPI bus and configure it as needed for the PGA11x device.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static void pga11x_lock(FAR struct spi_dev_s *spi)
+{
+  spivdbg("Locking\n");
+
+  /* On SPI busses where there are multiple devices, it will be necessary to
+   * lock SPI to have exclusive access to the busses for a sequence of
+   * transfers.  The bus should be locked before the chip is selected.
+   *
+   * This is a blocking call and will not return until we have exclusiv access to
+   * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
+   */
+
+  SPI_LOCK(spi, true);
+
+  /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
+   * setmode methods to make sure that the SPI is properly configured for the device.
+   * If the SPI buss is being shared, then it may have been left in an incompatible
+   * state.
+   */
+
+  pga11x_configure(spi);
+}
+#else
+#  define pga11x_lock(spi)
+#endif
+
+/****************************************************************************
+ * Name: pga11x_unlock
+ *
+ * Description:
+ *   Lock the SPI bus and configure it as needed for the PGA11x device.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_OWNBUS
+static inline void pga11x_unlock(FAR struct spi_dev_s *spi)
+{
+  spivdbg("Unlocking\n");
+
+  SPI_LOCK(spi, false);
+}
+#else
+#  define pga11x_unlock(spi)
+#endif
+
+/****************************************************************************
+ * Name: pga11x_send16
+ *
+ * Description:
+ *   Send 16 bits of data, ignoring any returned data
+ *
+ * Input Parameters:
+ *   spi - PGA11X driver instance
+ *   word - The data to send
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   The bus is locked and the device is selected
+ *
+ ****************************************************************************/
+
+static void pga11x_send16(FAR struct spi_dev_s *spi, uint16_t word)
+{
+  spivdbg("Send %04x\n", word);
+
+  /* The logical interface is 16-bits wide.  However, this driver uses a
+   * 8-bit configuration for greaer portability.
+   *
+   * Send the MS byte first.  Then the LS byte.
+   */
+ 
+  SPI_SEND(spi, word >> 8);
+  SPI_SEND(spi, word & 0xff);
+}
+
+/****************************************************************************
+ * Name: pga11x_recv16
+ *
+ * Description:
+ *   Receive 16 bits of data.
+ *
+ * Input Parameters:
+ *   spi -  PGA11X driver instance
+ *
+ * Returned Value:
+ *   The received 16-bit value
+ *
+ * Assumptions:
+ *   The bus is locked and the device is selected
+ *
+ ****************************************************************************/
+
+static uint16_t pga11x_recv16(FAR struct spi_dev_s *spi)
+{
+  uint8_t msb;
+  uint8_t lsb;
+
+  /* The logical interface is 16-bits wide.  However, this driver uses a
+   * 8-bit configuration for greaer portability.
+   *
+   * Send a dummy byte and receive MS byte first.  Then the LS byte.
+   */
+ 
+  msb = SPI_SEND(spi, SPI_DUMMY);
+  lsb = SPI_SEND(spi, SPI_DUMMY);
+  spivdbg("Received %02x %02x\n", msb, lsb);
+
+  return ((uint16_t)msb << 8) | (uint16_t)lsb;
+}
+
+/****************************************************************************
+ * Name: pga11x_write
+ *
+ * Description:
+ *   Send a 16-bit command.
+ *
+ * Input Parameters:
+ *   spi -  PGA11X driver instance
+ *
+ * Returned Value:
+ *   The received 16-bit value
+ *
+ * Assumptions:
+ *   The device is NOT selected and the NOT bus is locked.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_PGA11X_DAISYCHAIN
+static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t cmd)
+{
+  spivdbg("cmd %04x\n", cmd);
+
+  /* Lock, select, send the 16-bit command, de-select, and un-lock. */
+
+  pga11x_lock(spi);
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  pga11x_send16(spi, cmd);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+  pga11x_unlock(spi);
+}
+#else
+{
+  spivdbg("cmd %04x\n", cmd);
+
+  /* Lock, select, send the 16-bit command, the 16-bit daisy-chain command,
+   * de-select, and un-lock.
+   */
+
+  pga11x_lock(spi);
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  pga11x_send16(spi, cmd);
+  pga11x_send16(spi, cmd | PGA11X_DCCMD_SELECTOR);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+  pga11x_unlock(spi);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pga11x_initialize
+ *
+ * Description:
+ *   Initialize the PGA117 amplifier/multiplexer.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   On success, a non-NULL opaque handle is returned; a NULL is returned
+ *   on any failure.  This handle may be used with the other PGA117 interface
+ *   functions to control the multiplexer
+ *
+ ****************************************************************************/
+
+PGA11X_HANDLE pga11x_initialize(FAR struct spi_dev_s *spi)
+{
+  spivdbg("Entry\n");
+
+  /* Configure the SPI us for the device.  Do this now only if the PGA11X is
+   * the only device on the bus.
+   */
+
+#ifdef CONFIG_SPI_OWNBUS
+  pga11x_configure(spi);
+#endif
+
+  /* No other special state is required, just return the SPI driver instance
+   * as the handle.  This gives us a place to extend functionality in the
+   * future if neccessary.
+   */
+ 
+  return (PGA11X_HANDLE)spi;
+}
+
+/****************************************************************************
+ * Name: pga11x_select
+ *
+ * Description:
+ *   Select an input channel and gain.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *   channel - See the PGA11X_CHAN_* definitions above
+ *   gain    - See the PGA11X_GAIN_* definitions above
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int pga11x_select(PGA11X_HANDLE handle, uint8_t channel, uint8_t gain)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+  uint16_t cmd;
+
+  spivdbg("channel: %d gain: %d\n");
+  DEBUGASSERT(handle);
+
+  /* Format the command */
+
+  cmd = PGA11X_CMD_WRITE |
+        (channel << PGA11X_CHAN_SHIFT) |
+        (gain << PGA11X_GAIN_SHIFT);
+
+  /* Lock the bus and send the command */
+
+  pga11x_write(spi, cmd);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pga11x_read
+ *
+ * Description:
+ *   Read from the PGA117 amplifier/multiplexer.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   16-bit value read from the device (32-bits in daisy chain mode)
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PGA11X_DAISYCHAIN
+uint32_t pga11x_read(PGA11X_HANDLE handle)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+  uint16_t msvalue;
+  uint16_t lsvalue;
+
+  spivdbg("Entry\n");
+  DEBUGASSERT(handle);
+
+  /* Lock the bus and read the configuration */
+
+  pga11x_lock(spi);
+
+  /* Select, send the 16-bit command, the 16-bit daisy-chain command, and
+   * then de-select the part. I do not know if de-selection between word
+   * transfers is required.  However, it is shown in the timing diagrams
+   * for the part.
+   */
+
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  pga11x_send16(spi, PGA11X_CMD_READ);
+  pga11x_send16(spi, PGA11X_DCCMD_READ);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+
+  /* Re-select, get the returned values, de-select, and unlock */
+
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  msvalue = pga11x_recv16(spi);
+  mssvalue = pga11x_recv16(spi);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+  pga11x_unlock(spi);
+
+  spivdbg("Returning %04x %04x\n", msvalue, lsvalue);
+  return (uint32_t)msvalue << 16 | (uint32_t)lsvalue;
+}
+#else
+uint16_t pga11x_read(PGA11X_HANDLE handle)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+  uint16_t value;
+
+  spivdbg("Entry\n");
+  DEBUGASSERT(handle);
+
+  /* Lock the bus and read the configuration */
+
+  pga11x_lock(spi);
+
+  /* Select, send the 16-bit PGA11X_CMD_READ command, and de-select.  I do
+   * not know if de-selection between word transfers is required.  However,
+   * it is shown in the timing diagrams for the part.
+   */
+
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  pga11x_send16(spi, PGA11X_CMD_READ);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+
+  /* Re-select, get the returned value, de-select, and unlock */
+
+  SPI_SELECT(spi, SPIDEV_MUX, true);
+  value = pga11x_recv16(spi);
+  SPI_SELECT(spi, SPIDEV_MUX, false);
+  pga11x_unlock(spi);
+
+  spivdbg("Returning: %04x\n", value);
+  return value;
+}
+#endif
+
+/****************************************************************************
+ * Name: pga11x_noop
+ *
+ * Description:
+ *   Perform PGA11x no-operation.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int pga11x_noop(PGA11X_HANDLE handle)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+
+  spivdbg("Entry\n");
+  DEBUGASSERT(handle);
+
+  /* Lock the bus and send the NOOP command */
+
+  pga11x_write(spi, PGA11X_CMA_NOOP);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pga11x_shutdown
+ *
+ * Description:
+ *   Put the PGA11x in shutdown down mode.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int pga11x_shutdown(PGA11X_HANDLE handle)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+
+  spivdbg("Entry\n");
+  DEBUGASSERT(handle);
+
+  /* Lock the bus and enter shutdown mode by issuing an SDN_EN command */
+
+  pga11x_write(spi, PGA11X_CMA_SDN_EN);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pga11x_enable
+ *
+ * Description:
+ *   Take the PGA11x out of shutdown down mode.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int pga11x_enable(PGA11X_HANDLE handle)
+{
+  FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
+
+  spivdbg("Entry\n");
+  DEBUGASSERT(handle);
+
+  /* Lock the bus and send the shutdown disable command.  Shutdown mode is
+   * cleared (returned to the last valid write configuration) by the SDN_DIS
+   * command or by any valid Write command
+   */
+
+  pga11x_write(spi, PGA11X_CMA_SDN_DIS);
+  return OK;
+}
+
+#endif /* CONFIG_INPUT && CONFIG_INPUT_PGA11X */
+
diff --git a/nuttx/drivers/mtd/at45db.c b/nuttx/drivers/mtd/at45db.c
index 037cc5e76..f4a695de0 100644
--- a/nuttx/drivers/mtd/at45db.c
+++ b/nuttx/drivers/mtd/at45db.c
@@ -276,7 +276,7 @@ static void at45db_lock(struct at45db_dev_s *priv)
    * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
    */
 
-  SPI_LOCK(priv->spi, true);
+  (void)SPI_LOCK(priv->spi, true);
 
   /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
    * setmode methods to make sure that the SPI is properly configured for the device.
@@ -295,7 +295,7 @@ static void at45db_lock(struct at45db_dev_s *priv)
 
 static inline void at45db_unlock(struct at45db_dev_s *priv)
 {
-  SPI_LOCK(priv->spi, false);
+  (void)SPI_LOCK(priv->spi, false);
 }
 
 /************************************************************************************
diff --git a/nuttx/drivers/mtd/m25px.c b/nuttx/drivers/mtd/m25px.c
index 8ff1c717d..4f96c5a3b 100644
--- a/nuttx/drivers/mtd/m25px.c
+++ b/nuttx/drivers/mtd/m25px.c
@@ -232,7 +232,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
    * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
    */
 
-  SPI_LOCK(dev, true);
+  (void)SPI_LOCK(dev, true);
 
   /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
    * setmode methods to make sure that the SPI is properly configured for the device.
@@ -251,7 +251,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
 
 static inline void m25p_unlock(FAR struct spi_dev_s *dev)
 {
-  SPI_LOCK(dev, false);
+  (void)SPI_LOCK(dev, false);
 }
 
 /************************************************************************************
diff --git a/nuttx/drivers/mtd/ramtron.c b/nuttx/drivers/mtd/ramtron.c
index 5615823d6..074545e2d 100644
--- a/nuttx/drivers/mtd/ramtron.c
+++ b/nuttx/drivers/mtd/ramtron.c
@@ -275,7 +275,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev)
    * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
    */
 
-  SPI_LOCK(dev, true);
+  (void)SPI_LOCK(dev, true);
 
   /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
    * setmode methods to make sure that the SPI is properly configured for the device.
@@ -295,7 +295,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev)
 
 static inline void ramtron_unlock(FAR struct spi_dev_s *dev)
 {
-  SPI_LOCK(dev, false);
+  (void)SPI_LOCK(dev, false);
 }
 
 /************************************************************************************
diff --git a/nuttx/drivers/mtd/sst25.c b/nuttx/drivers/mtd/sst25.c
index 717a9c898..01838f078 100644
--- a/nuttx/drivers/mtd/sst25.c
+++ b/nuttx/drivers/mtd/sst25.c
@@ -273,7 +273,7 @@ static void sst25_lock(FAR struct spi_dev_s *dev)
    * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
    */
 
-  SPI_LOCK(dev, true);
+  (void)SPI_LOCK(dev, true);
 
   /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
    * setmode methods to make sure that the SPI is properly configured for the device.
@@ -292,7 +292,7 @@ static void sst25_lock(FAR struct spi_dev_s *dev)
 
 static inline void sst25_unlock(FAR struct spi_dev_s *dev)
 {
-  SPI_LOCK(dev, false);
+  (void)SPI_LOCK(dev, false);
 }
 
 /************************************************************************************
diff --git a/nuttx/drivers/wireless/cc1101/cc1101.c b/nuttx/drivers/wireless/cc1101/cc1101.c
index a35575690..45faaecd2 100755
--- a/nuttx/drivers/wireless/cc1101/cc1101.c
+++ b/nuttx/drivers/wireless/cc1101/cc1101.c
@@ -308,7 +308,7 @@ struct cc1101_dev_s {
  
 void cc1101_access_begin(struct cc1101_dev_s * dev)
 {
-    SPI_LOCK(dev->spi, true);
+    (void)SPI_LOCK(dev->spi, true);
     SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
     SPI_SETMODE(dev->spi, SPIDEV_MODE0);     /* CPOL=0, CPHA=0 */
     SPI_SETBITS(dev->spi, 8);
@@ -318,11 +318,10 @@ void cc1101_access_begin(struct cc1101_dev_s * dev)
 void cc1101_access_end(struct cc1101_dev_s * dev)
 {
     SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
-    SPI_LOCK(dev->spi, false);
+    (void)SPI_LOCK(dev->spi, false);
 }
 
 
-
 /** CC1101 Access with Range Check
  * 
  * \param dev CC1101 Private Structure
diff --git a/nuttx/include/nuttx/input/pga11x.h b/nuttx/include/nuttx/input/pga11x.h
new file mode 100644
index 000000000..f60d7830d
--- /dev/null
+++ b/nuttx/include/nuttx/input/pga11x.h
@@ -0,0 +1,292 @@
+/****************************************************************************
+ * include/nuttx/input/pga11x.h
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * References:
+ *   "PGA112, PGA113, PGA116, PGA117: Zerø-Drift PROGRAMMABLE GAIN AMPLIFIER
+ *   with MUX", SBOS424B, March 2008, Revised September 2008, Texas
+ *   Instruments Incorporated"
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_INPUT_PGA11X_H
+#define __INCLUDE_NUTTX_INPUT_PGA11X_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/spi.h>
+
+#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_PGA11X)
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+/* Prerequisites:  CONFIG_INPUT=y
+ *
+ * CONFIG_INPUT_PGA11X
+ *   Enables support for the PGA11X driver (Needs CONFIG_INPUT)
+ * CONFIG_PGA11X_SPIFREQUENCY
+ *   SPI frequency.  Default 1MHz
+ * CONFIG_PGA11X_DAISYCHAIN
+ *   Use two PGA116/7's in Daisy Chain commands.
+ * CONFIG_PGA11X_SPIMODE
+ *   SPI Mode.  The specification says that the device operates in Mode 0 or
+ *   Mode 3.  But sometimes you need to tinker with this to get things to
+ *   work correctly. Default:  Mode 0
+ * CONFIG_PGA11X_MULTIPLE
+ *   Can be defined to support multiple PGA11X devices on board.  Each
+ *   device will require a customized SPI interface to distinguish them
+ *   When SPI_SELECT is called with devid=SPIDEV_MUX.
+ *
+ * Other settings that effect the driver:  CONFIG_SPI_OWNBUS, CONFIG_DEBUG_SPI.
+ */
+
+#ifndef CONFIG_PGA11X_SPIFREQUENCY
+#  define CONFIG_PGA11X_SPIFREQUENCY 1000000
+#endif
+
+#ifndef CONFIG_PGA11X_SPIMODE
+#  define CONFIG_PGA11X_SPIMODE SPIDEV_MODE0
+#endif
+
+/* PGA11x Commands **********************************************************/
+/* Write command Gain Selection Bits (PGA112/PGA113)
+ *
+ * the PGA112 and PGA116 provide binary gain selections (1, 2, 4, 8, 16, 32,
+ * 64, 128); the PGA113 and PGA117 provide scope gain selections (1, 2, 5, 10,
+ * 20, 50, 100, 200).
+ */
+
+#define PGA11X_GAIN_1          (0) /* Gain=1:   Scope Gain=1 */
+#define PGA11X_GAIN_2          (1) /* Gain=2:   Scope Gain=2 */
+#define PGA11X_GAIN_4          (2) /* Gain=4:   Scope Gain=5 */
+#define PGA11X_GAIN_5          (2) /* Gain=4:   Scope Gain=5 */
+#define PGA11X_GAIN_8          (3) /* Gain=8:   Scope Gain=10 */
+#define PGA11X_GAIN_10         (3) /* Gain=8:   Scope Gain=10 */
+#define PGA11X_GAIN_16         (4) /* Gain=16:  Scope Gain=20 */
+#define PGA11X_GAIN_20         (4) /* Gain=16:  Scope Gain=20 */
+#define PGA11X_GAIN_32         (5) /* Gain=32:  Scope Gain=50 */
+#define PGA11X_GAIN_50         (5) /* Gain=32:  Scope Gain=50 */
+#define PGA11X_GAIN_64         (6) /* Gain=64:  Scope Gain=100 */
+#define PGA11X_GAIN_100        (6) /* Gain=64:  Scope Gain=100 */
+#define PGA11X_GAIN_128        (7) /* Gain=128: Scope Gain=200 */
+#define PGA11X_GAIN_200        (7) /* Gain=128: Scope Gain=200 */
+
+/* Write command Mux Channel Selection Bits
+ *
+ * The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
+ * 10-channel input MUX.
+ */
+
+#define PGA11X_CHAN_VCAL       (0) /* VCAL/CH0 */
+#define PGA11X_CHAN_CH0        (0) /* VCAL/CH0 */
+#define PGA11X_CHAN_CH1        (1) /* CH1 */
+#define PGA11X_CHAN_CH2        (2) /* CH2 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH3        (3) /* CH3 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH4        (4) /* CH4 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH5        (5) /* CH5 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH6        (6) /* CH6 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH7        (7) /* CH7 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH8        (8) /* CH8 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CH9        (9) /* CH9 (PGA116/PGA117 only) */
+#define PGA11X_CHAN_CAL1       (12) /* CAL1: connects to GND */
+#define PGA11X_CHAN_CAL2       (13) /* CAL2: connects to 0.9VCAL */
+#define PGA11X_CHAN_CAL3       (14) /* CAL3: connects to 0.1VCAL */
+#define PGA11X_CHAN_CAL4       (15) /* CAL4: connects to VREF */
+
+/* These macros may be used to decode the value returned by pga11x_read() */
+
+
+#define PGA11X_GAIN_SHIFT        (4)      /* B*/
+#define PGA11X_GAIN_MASK         (15 << PGA11X_GAIN_SHIFT)
+
+/* Write command Mux Channel Selection Bits
+ *
+ * The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
+ * 10-channel input MUX.
+ */
+
+#ifndef CONFIG_PGA11X_DAISYCHAIN
+/* Bits 0-3: Channel Selection Bits
+ * Bits 4-7: Gain Selection Bits
+ */
+
+#  define PGA11X_CHAN(value)     ((uint16_t)value & 0x000f)
+#  define PGA11X_GAIN(value)     (((uint16_t)value >> 4) & 0x000f)
+
+#else
+/* Bits 0-3:   U1 Channel Selection Bits
+ * Bits 4-7:   U1 Gain Selection Bits
+ * Bits 16-19: U2 Channel Selection Bits
+ * Bits 20-23: U2 Gain Selection Bits
+ */
+
+#  define PGA11X_U1_CHAN(value)  ((uint32_t)value & 0x0000000f)
+#  define PGA11X_U1_GAIN(value)  (((uint32_t)value >> 4) & 0x0000000f)
+#  define PGA11X_U2_CHAN(value)  (((uint32_t)value >> 16) & 0x0000000f)
+#  define PGA11X_U2_GAIN(value)  (((uint32_t)value >> 20) & 0x0000000f)
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Handle used to reference the particular PGA11X instance */
+
+typedef FAR void *PGA11X_HANDLE;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: pga11x_initialize
+ *
+ * Description:
+ *   Initialize the PGA117 amplifier/multiplexer.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   On success, a non-NULL opaque handle is returned; a NULL is returned
+ *   on any failure.  This handle may be used with the other PGA117 interface
+ *   functions to control the multiplexer
+ *
+ ****************************************************************************/
+
+EXTERN PGA11X_HANDLE pga11x_initialize(FAR struct spi_dev_s *spi);
+
+/****************************************************************************
+ * Name: pga11x_select
+ *
+ * Description:
+ *   Select an input channel and gain.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *   channel - See the PGA11X_CHAN_* definitions above
+ *   gain    - See the PGA11X_GAIN_* definitions above
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+EXTERN int pga11x_select(PGA11X_HANDLE handle, uint8_t channel, uint8_t gain);
+
+/****************************************************************************
+ * Name: pga11x_read
+ *
+ * Description:
+ *   Read from the PGA117 amplifier/multiplexer.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   16-bit value read from the device (32-bits in daisy chain mode)
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PGA11X_DAISYCHAIN
+EXTERN uint32_t pga11x_read(PGA11X_HANDLE handle);
+#else
+EXTERN uint16_t pga11x_read(PGA11X_HANDLE handle);
+#endif
+
+/****************************************************************************
+ * Name: pga11x_noop
+ *
+ * Description:
+ *   Perform PGA11x no-operation.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+EXTERN int pga11x_noop(PGA11X_HANDLE handle);
+
+/****************************************************************************
+ * Name: pga11x_shutdown
+ *
+ * Description:
+ *   Put the PGA11x in shutdown down mode.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+EXTERN int pga11x_shutdown(PGA11X_HANDLE handle);
+
+/****************************************************************************
+ * Name: pga11x_enable
+ *
+ * Description:
+ *   Take the PGA11x out of shutdown down mode.
+ *
+ * Input Parameters:
+ *   spi - An SPI "bottom half" device driver instance
+ *
+ * Returned Value:
+ *   Zero on sucess; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+EXTERN int pga11x_enable(PGA11X_HANDLE handle);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_INPUT && CONFIG_INPUT_PGA11X */
+#endif /* __INCLUDE_NUTTX_INPUT_PGA11X_H */