Merge branch 'fmuv2_bringup' of github.com:cvg/Firmware_Private into fmuv2_bringup

3 files changed, 44 insertions, 5 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
index 40fce8cb5..5140ee4f9 100644
--- a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
+++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
@@ -130,7 +130,7 @@ static struct stm32_dma_s g_dma[DMA_NSTREAMS] =
     .stream   = 3,
     .irq      = STM32_IRQ_DMA1S3,
     .shift    = DMA_INT_STREAM3_SHIFT,
-    .base     = STM32_DMA1_BASE + STM32_DMA_OFFSET(4),
+    .base     = STM32_DMA1_BASE + STM32_DMA_OFFSET(3),
   },
   {
     .stream   = 4,
diff --git a/nuttx/configs/px4fmuv2/include/board.h b/nuttx/configs/px4fmuv2/include/board.h
index fd8f78b80..be4cdcdfd 100755
--- a/nuttx/configs/px4fmuv2/include/board.h
+++ b/nuttx/configs/px4fmuv2/include/board.h
@@ -181,6 +181,17 @@
 #  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
 #endif
 
+/* DMA Channl/Stream Selections *****************************************************/
+/* Stream selections are arbitrary for now but might become important in the future
+ * is we set aside more DMA channels/streams.
+ *
+ * SDIO DMA
+ *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
+ *   DMAMAP_SDIO_2 = Channel 4, Stream 6
+ */
+
+#define DMAMAP_SDIO DMAMAP_SDIO_1
+
 /* High-resolution timer
  */
 #ifdef CONFIG_HRT_TIMER
diff --git a/nuttx/configs/px4fmuv2/nsh/defconfig b/nuttx/configs/px4fmuv2/nsh/defconfig
index d10309580..307c5079c 100755
--- a/nuttx/configs/px4fmuv2/nsh/defconfig
+++ b/nuttx/configs/px4fmuv2/nsh/defconfig
@@ -118,6 +118,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 #   to do this if DMA is enabled to prevent non-DMA-able CCM memory from
 #   being a part of the stack.
 #
+CONFIG_STM32_CCMEXCLUDE=y
 
 #
 # On-board FSMC SRAM configuration
@@ -192,7 +193,7 @@ CONFIG_STM32_USART6=y
 CONFIG_STM32_ADC1=y
 CONFIG_STM32_ADC2=n
 CONFIG_STM32_ADC3=n
-CONFIG_STM32_SDIO=n
+CONFIG_STM32_SDIO=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_SYSCFG=y
 CONFIG_STM32_TIM9=y
@@ -784,7 +785,7 @@ CONFIG_FS_BINFS=y
 # CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
 #   Default is 20MHz, current setting 24 MHz
 #
-CONFIG_MMCSD=n
+#CONFIG_MMCSD=n
 # XXX need to rejig this for SDIO
 #CONFIG_MMCSD_SPI=y
 #CONFIG_MMCSD_NSLOTS=1
@@ -792,6 +793,33 @@ CONFIG_MMCSD=n
 #CONFIG_MMCSD_SPICLOCK=24000000
 
 #
+# Maintain legacy build behavior (revisit)
+#
+
+CONFIG_MMCSD=y
+#CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SDIO=y
+CONFIG_MTD=y
+
+#
+# SPI-based MMC/SD driver
+#
+#CONFIG_MMCSD_NSLOTS=1
+#CONFIG_MMCSD_READONLY=n
+#CONFIG_MMCSD_SPICLOCK=12500000
+
+#
+# STM32 SDIO-based MMC/SD driver
+#
+CONFIG_SDIO_DMA=y
+#CONFIG_SDIO_PRI=128
+#CONFIG_SDIO_DMAPRIO
+#CONFIG_SDIO_WIDTH_D1_ONLY
+CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
+CONFIG_MMCSD_MMCSUPPORT=n
+CONFIG_MMCSD_HAVECARDDETECT=n
+
+#
 # Block driver buffering
 #
 # CONFIG_FS_READAHEAD
@@ -1008,8 +1036,8 @@ CONFIG_NSH_FATMOUNTPT=/tmp
 # Architecture-specific NSH options
 #
 #CONFIG_NSH_MMCSDSPIPORTNO=3
-#CONFIG_NSH_MMCSDSLOTNO=0
-#CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDMINOR=0
 
 
 #