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| author | Anton Babushkin <anton.babushkin@me.com> | 2013-08-15 10:33:45 +0200 |
|---|---|---|
| committer | Anton Babushkin <anton.babushkin@me.com> | 2013-08-15 10:33:45 +0200 |
| commit | 7476b03543f879df5ea29d44be147ff4926f8216 (patch) | |
| tree | e1c056fa3e12b2c2c3ae601ae2835ac086b60338 /src/drivers/stm32/drv_pwm_servo.c | |
| parent | 39ae01dd07d53e3509826ae3737fc6a509adec34 (diff) | |
| parent | d2f19c7d84030ad6ed1f6c17538fa96864c5dcef (diff) | |
| download | px4-firmware-7476b03543f879df5ea29d44be147ff4926f8216.tar.gz px4-firmware-7476b03543f879df5ea29d44be147ff4926f8216.tar.bz2 px4-firmware-7476b03543f879df5ea29d44be147ff4926f8216.zip | |
Merge branch 'master' into new_state_machine_drton
Diffstat (limited to 'src/drivers/stm32/drv_pwm_servo.c')
| -rw-r--r-- | src/drivers/stm32/drv_pwm_servo.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/drivers/stm32/drv_pwm_servo.c b/src/drivers/stm32/drv_pwm_servo.c index 7b060412c..dbb45a138 100644 --- a/src/drivers/stm32/drv_pwm_servo.c +++ b/src/drivers/stm32/drv_pwm_servo.c @@ -88,6 +88,7 @@ #define rCCR4(_tmr) REG(_tmr, STM32_GTIM_CCR4_OFFSET) #define rDCR(_tmr) REG(_tmr, STM32_GTIM_DCR_OFFSET) #define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET) +#define rBDTR(_tmr) REG(_tmr, STM32_ATIM_BDTR_OFFSET) static void pwm_timer_init(unsigned timer); static void pwm_timer_set_rate(unsigned timer, unsigned rate); @@ -110,6 +111,11 @@ pwm_timer_init(unsigned timer) rCCER(timer) = 0; rDCR(timer) = 0; + if ((pwm_timers[timer].base == STM32_TIM1_BASE) || (pwm_timers[timer].base == STM32_TIM8_BASE)) { + /* master output enable = on */ + rBDTR(timer) = ATIM_BDTR_MOE; + } + /* configure the timer to free-run at 1MHz */ rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1; |