diff options
Diffstat (limited to 'nuttx/arch/arm/include')
21 files changed, 0 insertions, 4448 deletions
diff --git a/nuttx/arch/arm/include/arch.h b/nuttx/arch/arm/include/arch.h deleted file mode 100644 index d0b2602eb..000000000 --- a/nuttx/arch/arm/include/arch.h +++ /dev/null @@ -1,122 +0,0 @@ -/**************************************************************************** - * arch/arm/include/arch.h - * - * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, - * only indirectly through nuttx/arch.h - */ - -#ifndef __ARCH_ARM_INCLUDE_ARCH_H -#define __ARCH_ARM_INCLUDE_ARCH_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#ifndef __ASSEMBLY__ -# include <stdint.h> -#endif - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -#ifdef CONFIG_PIC - -/* This identifies the register the is used by the processor as the PIC base - * register. It is usually r9 or r10 - */ - -#define PIC_REG r10 -#define PIC_REG_STRING "r10" - -/* Macros to get and set the PIC base register. picbase is assumed to be - * of type (void*) and that it will fit into a uint32_t. These must be - * inline so that they will be compatible with the ABIs rules for - * preserving the PIC register - */ - -#define up_getpicbase(ppicbase) \ -do { \ - uint32_t picbase; \ - __asm__ \ - ( \ - "\tmov %0, " PIC_REG_STRING "\n\t" \ - : "=r"(picbase) \ - ); \ - *ppicbase = (FAR void*)picbase; \ -} while (0) - -#define up_setpicbase(picbase) \ -do { \ - uint32_t _picbase = (uint32_t)picbase; \ - __asm__ \ - ( \ - "\tmov " PIC_REG_STRING ", %0\n\t" \ - : : "r"(_picbase) : PIC_REG_STRING \ - ); \ -} while (0) - -#endif - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __ARCH_ARM_INCLUDE_ARCH_H */ diff --git a/nuttx/arch/arm/include/arm/irq.h b/nuttx/arch/arm/include/arm/irq.h deleted file mode 100644 index a06abe888..000000000 --- a/nuttx/arch/arm/include/arm/irq.h +++ /dev/null @@ -1,231 +0,0 @@ -/**************************************************************************** - * arch/arm/include/arm/irq.h - * - * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_ARM_IRQ_H -#define __ARCH_ARM_INCLUDE_ARM_IRQ_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/irq.h> -#ifndef __ASSEMBLY__ -# include <stdint.h> -#endif - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/* IRQ Stack Frame Format: - * - * Context is always saved/restored in the same way: - * - * (1) stmia rx, {r0-r14} - * (2) then the PC and CPSR - * - * This results in the following set of indices that - * can be used to access individual registers in the - * xcp.regs array: - */ - -#define REG_R0 (0) -#define REG_R1 (1) -#define REG_R2 (2) -#define REG_R3 (3) -#define REG_R4 (4) -#define REG_R5 (5) -#define REG_R6 (6) -#define REG_R7 (7) -#define REG_R8 (8) -#define REG_R9 (9) -#define REG_R10 (10) -#define REG_R11 (11) -#define REG_R12 (12) -#define REG_R13 (13) -#define REG_R14 (14) -#define REG_R15 (15) -#define REG_CPSR (16) - -#define XCPTCONTEXT_REGS (17) -#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) - -#define REG_A1 REG_R0 -#define REG_A2 REG_R1 -#define REG_A3 REG_R2 -#define REG_A4 REG_R3 -#define REG_V1 REG_R4 -#define REG_V2 REG_R5 -#define REG_V3 REG_R6 -#define REG_V4 REG_R7 -#define REG_V5 REG_R8 -#define REG_V6 REG_R9 -#define REG_V7 REG_R10 -#define REG_SB REG_R9 -#define REG_SL REG_R10 -#define REG_FP REG_R11 -#define REG_IP REG_R12 -#define REG_SP REG_R13 -#define REG_LR REG_R14 -#define REG_PC REG_R15 - -/* The PIC register is usually R10. It can be R9 is stack checking is enabled - * or if the user changes it with -mpic-register on the GCC command line. - */ - -#define REG_PIC REG_R10 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/* This struct defines the way the registers are stored. We - * need to save: - * - * 1 CPSR - * 7 Static registers, v1-v7 (aka r4-r10) - * 1 Frame pointer, fp (aka r11) - * 1 Stack pointer, sp (aka r13) - * 1 Return address, lr (aka r14) - * --- - * 11 (XCPTCONTEXT_USER_REG) - * - * On interrupts, we also need to save: - * 4 Volatile registers, a1-a4 (aka r0-r3) - * 1 Scratch Register, ip (aka r12) - *--- - * 5 (XCPTCONTEXT_IRQ_REGS) - * - * For a total of 17 (XCPTCONTEXT_REGS) - */ - -#ifndef __ASSEMBLY__ -struct xcptcontext -{ - /* The following function pointer is non-zero if there - * are pending signals to be processed. - */ - -#ifndef CONFIG_DISABLE_SIGNALS - void *sigdeliver; /* Actual type is sig_deliver_t */ - - /* These are saved copies of LR and CPSR used during - * signal processing. - */ - - uint32_t saved_pc; - uint32_t saved_cpsr; -#endif - - /* Register save area */ - - uint32_t regs[XCPTCONTEXT_REGS]; - - /* Extra fault address register saved for common paging logic. In the - * case of the prefetch abort, this value is the same as regs[REG_R15]; - * For the case of the data abort, this value is the value of the fault - * address register (FAR) at the time of data abort exception. - */ - -#ifdef CONFIG_PAGING - uintptr_t far; -#endif -}; -#endif - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* Save the current interrupt enable state & disable IRQs */ - -static inline irqstate_t irqsave(void) -{ - unsigned int flags; - unsigned int temp; - __asm__ __volatile__ - ( - "\tmrs %0, cpsr\n" - "\torr %1, %0, #128\n" - "\tmsr cpsr_c, %1" - : "=r" (flags), "=r" (temp) - : - : "memory"); - return flags; -} - -/* Restore saved IRQ & FIQ state */ - -static inline void irqrestore(irqstate_t flags) -{ - __asm__ __volatile__ - ( - "msr cpsr_c, %0" - : - : "r" (flags) - : "memory"); -} -#endif /* __ASSEMBLY__ */ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_ARM_IRQ_H */ - diff --git a/nuttx/arch/arm/include/arm/syscall.h b/nuttx/arch/arm/include/arm/syscall.h deleted file mode 100644 index 3fc36c3db..000000000 --- a/nuttx/arch/arm/include/arm/syscall.h +++ /dev/null @@ -1,243 +0,0 @@ -/**************************************************************************** - * arch/arm/include/arm/syscall.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through include/syscall.h or include/sys/sycall.h - */ - -#ifndef __ARCH_ARM_INCLUDE_ARM_SYSCALL_H -#define __ARCH_ARM_INCLUDE_ARM_SYSCALL_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#ifndef __ASSEMBLY__ -# include <stdint.h> -#endif - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -#define SYS_syscall 0x900001 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* SWI with SYS_ call number and no parameters */ - -static inline uintptr_t sys_call0(unsigned int nbr) -{ - register long reg0 __asm__("r0") = (long)(nbr); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and one parameter */ - -static inline uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and two parameters */ - -static inline uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and three parameters */ - -static inline uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), "r"(reg3) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and four parameters */ - -static inline uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and five parameters */ - -static inline uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4, uintptr_t parm5) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg5 __asm__("r5") = (long)(parm5); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4), "r"(reg5) - : "memory" - ); - - return reg0; -} - -/* SWI with SYS_ call number and six parameters */ - -static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4, uintptr_t parm5, - uintptr_t parm6) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg6 __asm__("r6") = (long)(parm6); - register long reg5 __asm__("r5") = (long)(parm5); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "swi %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4), "r"(reg5), "r"(reg6) - : "memory" - ); - - return reg0; -} - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_INCLUDE_ARM_SYSCALL_H */ - diff --git a/nuttx/arch/arm/include/armv7-m/irq.h b/nuttx/arch/arm/include/armv7-m/irq.h deleted file mode 100644 index 8acec4c07..000000000 --- a/nuttx/arch/arm/include/armv7-m/irq.h +++ /dev/null @@ -1,355 +0,0 @@ -/**************************************************************************** - * arch/arm/include/armv7-m/irq.h - * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H -#define __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <nuttx/irq.h> -#ifndef __ASSEMBLY__ -# include <nuttx/compiler.h> -# include <stdint.h> -#endif - -/* Included implementation-dependent register save structure layouts */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR -# include <arch/armv7-m/irq_cmnvector.h> -#else -# include <arch/armv7-m/irq_lazyfpu.h> -#endif - -#ifdef CONFIG_ARMV7M_USEBASEPRI -# include <arch/chip/chip.h> -#endif - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Alternate register names */ - -#define REG_A1 REG_R0 -#define REG_A2 REG_R1 -#define REG_A3 REG_R2 -#define REG_A4 REG_R3 -#define REG_V1 REG_R4 -#define REG_V2 REG_R5 -#define REG_V3 REG_R6 -#define REG_V4 REG_R7 -#define REG_V5 REG_R8 -#define REG_V6 REG_R9 -#define REG_V7 REG_R10 -#define REG_SB REG_R9 -#define REG_SL REG_R10 -#define REG_FP REG_R11 -#define REG_IP REG_R12 -#define REG_SP REG_R13 -#define REG_LR REG_R14 -#define REG_PC REG_R15 - -/* The PIC register is usually R10. It can be R9 is stack checking is enabled - * or if the user changes it with -mpic-register on the GCC command line. - */ - -#define REG_PIC REG_R10 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/* The following structure is included in the TCB and defines the complete - * state of the thread. - */ - -#ifndef __ASSEMBLY__ -struct xcptcontext -{ - /* The following function pointer is non-zero if there - * are pending signals to be processed. - */ - -#ifndef CONFIG_DISABLE_SIGNALS - void *sigdeliver; /* Actual type is sig_deliver_t */ - - /* These are saved copies of LR, PRIMASK, and xPSR used during - * signal processing. - */ - - uint32_t saved_pc; -#ifdef CONFIG_ARMV7M_USEBASEPRI - uint32_t saved_basepri; -#else - uint32_t saved_primask; -#endif - uint32_t saved_xpsr; -#endif - - /* Register save area */ - - uint32_t regs[XCPTCONTEXT_REGS]; -}; -#endif - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* Get/set the PRIMASK register */ - -static inline uint8_t getprimask(void) inline_function; -static inline uint8_t getprimask(void) -{ - uint32_t primask; - __asm__ __volatile__ - ( - "\tmrs %0, primask\n" - : "=r" (primask) - : - : "memory"); - - return (uint8_t)primask; -} - -static inline void setprimask(uint32_t primask) inline_function; -static inline void setprimask(uint32_t primask) -{ - __asm__ __volatile__ - ( - "\tmsr primask, %0\n" - : - : "r" (primask) - : "memory"); -} - -/* Get/set the BASEPRI register. The BASEPRI register defines the minimum - * priority for exception processing. When BASEPRI is set to a nonzero - * value, it prevents the activation of all exceptions with the same or - * lower priority level as the BASEPRI value. - */ - -static inline uint8_t getbasepri(void) inline_function; -static inline uint8_t getbasepri(void) -{ - uint32_t basepri; - - __asm__ __volatile__ - ( - "\tmrs %0, basepri\n" - : "=r" (basepri) - : - : "memory"); - - return (uint8_t)basepri; -} - -static inline void setbasepri(uint32_t basepri) inline_function; -static inline void setbasepri(uint32_t basepri) -{ - __asm__ __volatile__ - ( - "\tmsr basepri, %0\n" - : - : "r" (basepri) - : "memory"); -} - -/* Disable IRQs */ - -static inline void irqdisable(void) inline_function; -static inline void irqdisable(void) -{ -#ifdef CONFIG_ARMV7M_USEBASEPRI - setbasepri(NVIC_SYSH_DISABLE_PRIORITY); -#else - __asm__ __volatile__ ("\tcpsid i\n"); -#endif -} - -/* Save the current primask state & disable IRQs */ - -static inline irqstate_t irqsave(void) inline_function; -static inline irqstate_t irqsave(void) -{ -#ifdef CONFIG_ARMV7M_USEBASEPRI - - uint8_t basepri = getbasepri(); - setbasepri(NVIC_SYSH_DISABLE_PRIORITY); - return (irqstate_t)basepri; - -#else - - unsigned short primask; - - /* Return the current value of primask register and set - * bit 0 of the primask register to disable interrupts - */ - - __asm__ __volatile__ - ( - "\tmrs %0, primask\n" - "\tcpsid i\n" - : "=r" (primask) - : - : "memory"); - - return primask; -#endif -} - -/* Enable IRQs */ - -static inline void irqenable(void) inline_function; -static inline void irqenable(void) -{ - setbasepri(0); - __asm__ __volatile__ ("\tcpsie i\n"); -} - -/* Restore saved primask state */ - -static inline void irqrestore(irqstate_t flags) inline_function; -static inline void irqrestore(irqstate_t flags) -{ -#ifdef CONFIG_ARMV7M_USEBASEPRI - setbasepri((uint32_t)flags); -#else - /* If bit 0 of the primask is 0, then we need to restore - * interupts. - */ - - __asm__ __volatile__ - ( - "\ttst %0, #1\n" - "\tbne 1f\n" - "\tcpsie i\n" - "1:\n" - : - : "r" (flags) - : "memory"); -#endif -} - -/* Get/set IPSR */ - -static inline uint32_t getipsr(void) inline_function; -static inline uint32_t getipsr(void) -{ - uint32_t ipsr; - __asm__ __volatile__ - ( - "\tmrs %0, ipsr\n" - : "=r" (ipsr) - : - : "memory"); - - return ipsr; -} - -static inline void setipsr(uint32_t ipsr) inline_function; -static inline void setipsr(uint32_t ipsr) -{ - __asm__ __volatile__ - ( - "\tmsr ipsr, %0\n" - : - : "r" (ipsr) - : "memory"); -} - -/* Get/set CONTROL */ - -static inline uint32_t getcontrol(void) inline_function; -static inline uint32_t getcontrol(void) -{ - uint32_t control; - __asm__ __volatile__ - ( - "\tmrs %0, control\n" - : "=r" (control) - : - : "memory"); - - return control; -} - -static inline void setcontrol(uint32_t control) inline_function; -static inline void setcontrol(uint32_t control) -{ - __asm__ __volatile__ - ( - "\tmsr control, %0\n" - : - : "r" (control) - : "memory"); -} - -#endif /* __ASSEMBLY__ */ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H */ - diff --git a/nuttx/arch/arm/include/armv7-m/irq_cmnvector.h b/nuttx/arch/arm/include/armv7-m/irq_cmnvector.h deleted file mode 100644 index bc67004ed..000000000 --- a/nuttx/arch/arm/include/armv7-m/irq_cmnvector.h +++ /dev/null @@ -1,168 +0,0 @@ -/**************************************************************************** - * arch/arm/include/armv7-m/irq_cmnvector.h - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_CMNVECTOR_H -#define __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_CMNVECTOR_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* IRQ Stack Frame Format: */ - -/* The following additional registers are stored by the interrupt handling - * logic. - */ - -#define REG_R13 (0) /* R13 = SP at time of interrupt */ -#ifdef CONFIG_ARMV7M_USEBASEPRI -# define REG_BASEPRI (1) /* BASEPRI */ -#else -# define REG_PRIMASK (1) /* PRIMASK */ -#endif -#define REG_R4 (2) /* R4 */ -#define REG_R5 (3) /* R5 */ -#define REG_R6 (4) /* R6 */ -#define REG_R7 (5) /* R7 */ -#define REG_R8 (6) /* R8 */ -#define REG_R9 (7) /* R9 */ -#define REG_R10 (8) /* R10 */ -#define REG_R11 (9) /* R11 */ -#define REG_EXC_RETURN (10) /* EXC_RETURN */ -#define SW_INT_REGS (11) - -#ifdef CONFIG_ARCH_FPU - -/* If the MCU supports a floating point unit, then it will be necessary - * to save the state of the non-volatile registers before calling code - * that may save and overwrite them. - */ - -# define REG_S16 (SW_INT_REGS+0) /* S16 */ -# define REG_S17 (SW_INT_REGS+1) /* S17 */ -# define REG_S18 (SW_INT_REGS+2) /* S18 */ -# define REG_S19 (SW_INT_REGS+3) /* S19 */ -# define REG_S20 (SW_INT_REGS+4) /* S20 */ -# define REG_S21 (SW_INT_REGS+5) /* S21 */ -# define REG_S22 (SW_INT_REGS+6) /* S22 */ -# define REG_S23 (SW_INT_REGS+7) /* S23 */ -# define REG_S24 (SW_INT_REGS+8) /* S24 */ -# define REG_S25 (SW_INT_REGS+9) /* S25 */ -# define REG_S26 (SW_INT_REGS+10) /* S26 */ -# define REG_S27 (SW_INT_REGS+11) /* S27 */ -# define REG_S28 (SW_INT_REGS+12) /* S28 */ -# define REG_S29 (SW_INT_REGS+13) /* S29 */ -# define REG_S30 (SW_INT_REGS+14) /* S30 */ -# define REG_S31 (SW_INT_REGS+15) /* S31 */ -# define SW_FPU_REGS (16) -#else -# define SW_FPU_REGS (0) -#endif - -/* The total number of registers saved by software */ - -#define SW_XCPT_REGS (SW_INT_REGS + SW_FPU_REGS) -#define SW_XCPT_SIZE (4 * SW_XCPT_REGS) - -/* On entry into an IRQ, the hardware automatically saves the following - * registers on the stack in this (address) order: - */ - -#define REG_R0 (SW_XCPT_REGS+0) /* R0 */ -#define REG_R1 (SW_XCPT_REGS+1) /* R1 */ -#define REG_R2 (SW_XCPT_REGS+2) /* R2 */ -#define REG_R3 (SW_XCPT_REGS+3) /* R3 */ -#define REG_R12 (SW_XCPT_REGS+4) /* R12 */ -#define REG_R14 (SW_XCPT_REGS+5) /* R14 = LR */ -#define REG_R15 (SW_XCPT_REGS+6) /* R15 = PC */ -#define REG_XPSR (SW_XCPT_REGS+7) /* xPSR */ -#define HW_INT_REGS (8) - -#ifdef CONFIG_ARCH_FPU - -/* If the FPU is enabled, the hardware also saves the volatile FP registers. - */ - -# define REG_S0 (SW_XCPT_REGS+8) /* S0 */ -# define REG_S1 (SW_XCPT_REGS+9) /* S1 */ -# define REG_S2 (SW_XCPT_REGS+10) /* S2 */ -# define REG_S3 (SW_XCPT_REGS+11) /* S3 */ -# define REG_S4 (SW_XCPT_REGS+12) /* S4 */ -# define REG_S5 (SW_XCPT_REGS+13) /* S5 */ -# define REG_S6 (SW_XCPT_REGS+14) /* S6 */ -# define REG_S7 (SW_XCPT_REGS+15) /* S7 */ -# define REG_S8 (SW_XCPT_REGS+16) /* S8 */ -# define REG_S9 (SW_XCPT_REGS+17) /* S9 */ -# define REG_S10 (SW_XCPT_REGS+18) /* S10 */ -# define REG_S11 (SW_XCPT_REGS+19) /* S11 */ -# define REG_S12 (SW_XCPT_REGS+20) /* S12 */ -# define REG_S13 (SW_XCPT_REGS+21) /* S13 */ -# define REG_S14 (SW_XCPT_REGS+22) /* S14 */ -# define REG_S15 (SW_XCPT_REGS+23) /* S15 */ -# define REG_FPSCR (SW_XCPT_REGS+24) /* FPSCR */ -# define REG_FPReserved (SW_XCPT_REGS+25) /* Reserved */ -# define HW_FPU_REGS (18) -#else -# define HW_FPU_REGS (0) -#endif - -#define HW_XCPT_REGS (HW_INT_REGS + HW_FPU_REGS) -#define HW_XCPT_SIZE (4 * HW_XCPT_REGS) - -#define XCPTCONTEXT_REGS (HW_XCPT_REGS + SW_XCPT_REGS) -#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_CMNVECTOR_H */ - diff --git a/nuttx/arch/arm/include/armv7-m/irq_lazyfpu.h b/nuttx/arch/arm/include/armv7-m/irq_lazyfpu.h deleted file mode 100644 index f2380cbb6..000000000 --- a/nuttx/arch/arm/include/armv7-m/irq_lazyfpu.h +++ /dev/null @@ -1,186 +0,0 @@ -/**************************************************************************** - * arch/arm/include/armv7-m/irq.h - * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_LAZYFPU_H -#define __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_LAZYFPU_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* IRQ Stack Frame Format: */ - -/* The following additional registers are stored by the interrupt handling - * logic. - */ - -#define REG_R13 (0) /* R13 = SP at time of interrupt */ -#ifdef CONFIG_ARMV7M_USEBASEPRI -# define REG_BASEPRI (1) /* BASEPRI */ -#else -# define REG_PRIMASK (1) /* PRIMASK */ -#endif -#define REG_R4 (2) /* R4 */ -#define REG_R5 (3) /* R5 */ -#define REG_R6 (4) /* R6 */ -#define REG_R7 (5) /* R7 */ -#define REG_R8 (6) /* R8 */ -#define REG_R9 (7) /* R9 */ -#define REG_R10 (8) /* R10 */ -#define REG_R11 (9) /* R11 */ - -#ifdef CONFIG_NUTTX_KERNEL -# define REG_EXC_RETURN (10) /* EXC_RETURN */ -# define SW_INT_REGS (11) -#else -# define SW_INT_REGS (10) -#endif - -/* If the MCU supports a floating point unit, then it will be necessary - * to save the state of the FPU status register and data registers on - * each context switch. These registers are not saved during interrupt - * level processing, however. So, as a consequence, floating point - * operations may NOT be performed in interrupt handlers. - * - * The FPU provides an extension register file containing 32 single- - * precision registers. These can be viewed as: - * - * - Sixteen 64-bit doubleword registers, D0-D15 - * - Thirty-two 32-bit single-word registers, S0-S31 - * S<2n> maps to the least significant half of D<n> - * S<2n+1> maps to the most significant half of D<n>. - */ - -#ifdef CONFIG_ARCH_FPU -# define REG_D0 (SW_INT_REGS+0) /* D0 */ -# define REG_S0 (SW_INT_REGS+0) /* S0 */ -# define REG_S1 (SW_INT_REGS+1) /* S1 */ -# define REG_D1 (SW_INT_REGS+2) /* D1 */ -# define REG_S2 (SW_INT_REGS+2) /* S2 */ -# define REG_S3 (SW_INT_REGS+3) /* S3 */ -# define REG_D2 (SW_INT_REGS+4) /* D2 */ -# define REG_S4 (SW_INT_REGS+4) /* S4 */ -# define REG_S5 (SW_INT_REGS+5) /* S5 */ -# define REG_D3 (SW_INT_REGS+6) /* D3 */ -# define REG_S6 (SW_INT_REGS+6) /* S6 */ -# define REG_S7 (SW_INT_REGS+7) /* S7 */ -# define REG_D4 (SW_INT_REGS+8) /* D4 */ -# define REG_S8 (SW_INT_REGS+8) /* S8 */ -# define REG_S9 (SW_INT_REGS+9) /* S9 */ -# define REG_D5 (SW_INT_REGS+10) /* D5 */ -# define REG_S10 (SW_INT_REGS+10) /* S10 */ -# define REG_S11 (SW_INT_REGS+11) /* S11 */ -# define REG_D6 (SW_INT_REGS+12) /* D6 */ -# define REG_S12 (SW_INT_REGS+12) /* S12 */ -# define REG_S13 (SW_INT_REGS+13) /* S13 */ -# define REG_D7 (SW_INT_REGS+14) /* D7 */ -# define REG_S14 (SW_INT_REGS+14) /* S14 */ -# define REG_S15 (SW_INT_REGS+15) /* S15 */ -# define REG_D8 (SW_INT_REGS+16) /* D8 */ -# define REG_S16 (SW_INT_REGS+16) /* S16 */ -# define REG_S17 (SW_INT_REGS+17) /* S17 */ -# define REG_D9 (SW_INT_REGS+18) /* D9 */ -# define REG_S18 (SW_INT_REGS+18) /* S18 */ -# define REG_S19 (SW_INT_REGS+19) /* S19 */ -# define REG_D10 (SW_INT_REGS+20) /* D10 */ -# define REG_S20 (SW_INT_REGS+20) /* S20 */ -# define REG_S21 (SW_INT_REGS+21) /* S21 */ -# define REG_D11 (SW_INT_REGS+22) /* D11 */ -# define REG_S22 (SW_INT_REGS+22) /* S22 */ -# define REG_S23 (SW_INT_REGS+23) /* S23 */ -# define REG_D12 (SW_INT_REGS+24) /* D12 */ -# define REG_S24 (SW_INT_REGS+24) /* S24 */ -# define REG_S25 (SW_INT_REGS+25) /* S25 */ -# define REG_D13 (SW_INT_REGS+26) /* D13 */ -# define REG_S26 (SW_INT_REGS+26) /* S26 */ -# define REG_S27 (SW_INT_REGS+27) /* S27 */ -# define REG_D14 (SW_INT_REGS+28) /* D14 */ -# define REG_S28 (SW_INT_REGS+28) /* S28 */ -# define REG_S29 (SW_INT_REGS+29) /* S29 */ -# define REG_D15 (SW_INT_REGS+30) /* D15 */ -# define REG_S30 (SW_INT_REGS+30) /* S30 */ -# define REG_S31 (SW_INT_REGS+31) /* S31 */ -# define REG_FPSCR (SW_INT_REGS+32) /* Floating point status and control */ -# define SW_FPU_REGS (33) -#else -# define SW_FPU_REGS (0) -#endif - -/* The total number of registers saved by software */ - -#define SW_XCPT_REGS (SW_INT_REGS + SW_FPU_REGS) -#define SW_XCPT_SIZE (4 * SW_XCPT_REGS) - -/* On entry into an IRQ, the hardware automatically saves the following - * registers on the stack in this (address) order: - */ - -#define REG_R0 (SW_XCPT_REGS+0) /* R0 */ -#define REG_R1 (SW_XCPT_REGS+1) /* R1 */ -#define REG_R2 (SW_XCPT_REGS+2) /* R2 */ -#define REG_R3 (SW_XCPT_REGS+3) /* R3 */ -#define REG_R12 (SW_XCPT_REGS+4) /* R12 */ -#define REG_R14 (SW_XCPT_REGS+5) /* R14 = LR */ -#define REG_R15 (SW_XCPT_REGS+6) /* R15 = PC */ -#define REG_XPSR (SW_XCPT_REGS+7) /* xPSR */ - -#define HW_XCPT_REGS (8) -#define HW_XCPT_SIZE (4 * HW_XCPT_REGS) - -#define XCPTCONTEXT_REGS (HW_XCPT_REGS + SW_XCPT_REGS) -#define XCPTCONTEXT_SIZE (HW_XCPT_SIZE + SW_XCPT_SIZE) - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_LAZYFPU_H */ - diff --git a/nuttx/arch/arm/include/armv7-m/syscall.h b/nuttx/arch/arm/include/armv7-m/syscall.h deleted file mode 100644 index 4278c3a36..000000000 --- a/nuttx/arch/arm/include/armv7-m/syscall.h +++ /dev/null @@ -1,243 +0,0 @@ -/**************************************************************************** - * arch/arm/include/armv7-m/syscall.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through include/syscall.h or include/sys/sycall.h - */ - -#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_SYSCALL_H -#define __ARCH_ARM_INCLUDE_ARMV7_M_SYSCALL_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#ifndef __ASSEMBLY__ -# include <stdint.h> -#endif - -/**************************************************************************** - * Pro-processor Definitions - ****************************************************************************/ - -#define SYS_syscall 0x00 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* SVC call with SYS_ call number and no parameters */ - -static inline uintptr_t sys_call0(unsigned int nbr) -{ - register long reg0 __asm__("r0") = (long)(nbr); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and one parameter */ - -static inline uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and two parameters */ - -static inline uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and three parameters */ - -static inline uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), "r"(reg3) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and four parameters */ - -static inline uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and five parameters */ - -static inline uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4, uintptr_t parm5) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg5 __asm__("r5") = (long)(parm5); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4), "r"(reg5) - : "memory" - ); - - return reg0; -} - -/* SVC call with SYS_ call number and six parameters */ - -static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3, - uintptr_t parm4, uintptr_t parm5, - uintptr_t parm6) -{ - register long reg0 __asm__("r0") = (long)(nbr); - register long reg6 __asm__("r6") = (long)(parm6); - register long reg5 __asm__("r5") = (long)(parm5); - register long reg4 __asm__("r4") = (long)(parm4); - register long reg3 __asm__("r3") = (long)(parm3); - register long reg2 __asm__("r2") = (long)(parm2); - register long reg1 __asm__("r1") = (long)(parm1); - - __asm__ __volatile__ - ( - "svc %1" - : "=r"(reg0) - : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), - "r"(reg3), "r"(reg4), "r"(reg5), "r"(reg6) - : "memory" - ); - - return reg0; -} - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_SYSCALL_H */ - diff --git a/nuttx/arch/arm/include/elf.h b/nuttx/arch/arm/include/elf.h deleted file mode 100644 index 21b2c1c2c..000000000 --- a/nuttx/arch/arm/include/elf.h +++ /dev/null @@ -1,243 +0,0 @@ -/**************************************************************************** - * arch/arm/include/syscall.h - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Reference: "ELF for the ARM® Architecture," ARM IHI 0044D, current through - * ABI release 2.08, October 28, 2009, ARM Limited. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_ELF_H -#define __ARCH_ARM_INCLUDE_ELF_H - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* 4.3.1 ELF Identification. Should have: - * - * e_machine = EM_ARM - * e_ident[EI_CLASS] = ELFCLASS32 - * e_ident[EI_DATA] = ELFDATA2LSB (little endian) or ELFDATA2MSB (big endian) - */ - -#if 0 /* Defined in include/elf32.h */ -#define EM_ARM 40 -#endif - -/* Table 4-2, ARM-specific e_flags */ - -#define EF_ARM_EABI_MASK 0xff000000 -#define EF_ARM_EABI_UNKNOWN 0x00000000 -#define EF_ARM_EABI_VER1 0x01000000 -#define EF_ARM_EABI_VER2 0x02000000 -#define EF_ARM_EABI_VER3 0x03000000 -#define EF_ARM_EABI_VER4 0x04000000 -#define EF_ARM_EABI_VER5 0x05000000 - -#define EF_ARM_BE8 0x00800000 - -/* Table 4-4, Processor specific section types */ - -#define SHT_ARM_EXIDX 0x70000001 /* Exception Index table */ -#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking pre-emption map */ -#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility attributes */ -#define SHT_ARM_DEBUGOVERLAY 0x70000004 -#define SHT_ARM_OVERLAYSECTION 0x70000005 - -/* 4.7.1 Relocation codes - * - * S (when used on its own) is the address of the symbol. - * A is the addend for the relocation. - * P is the address of the place being relocated (derived from r_offset). - * Pa is the adjusted address of the place being relocated, defined as (P & 0xFFFFFFFC). - * T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction; - * it is 0 otherwise. - * B(S) is the addressing origin of the output segment defining the symbol S. - * GOT_ORG is the addressing origin of the Global Offset Table - * GOT(S) is the address of the GOT entry for the symbol S. - */ - -#define R_ARM_NONE 0 /* No relocation */ -#define R_ARM_PC24 1 /* ARM ((S + A) | T) - P */ -#define R_ARM_ABS32 2 /* Data (S + A) | T */ -#define R_ARM_REL32 3 /* Data ((S + A) | T) - P */ -#define R_ARM_LDR_PC_G0 4 /* ARM S + A - P */ -#define R_ARM_ABS16 5 /* Data S + A */ -#define R_ARM_ABS12 6 /* ARM S + A */ -#define R_ARM_THM_ABS5 7 /* Thumb16 S + A */ -#define R_ARM_ABS8 8 /* Data S + A */ -#define R_ARM_SBREL32 9 /* Data ((S + A) | T) - B(S) */ -#define R_ARM_THM_CALL 10 /* Thumb32 ((S + A) | T) - P */ -#define R_ARM_THM_PC8 11 /* Thumb16 S + A - Pa */ -#define R_ARM_BREL_ADJ 12 /* Data ?B(S) + A */ -#define R_ARM_TLS_DESC 13 /* Data */ -#define R_ARM_THM_SWI8 14 /* Obsolete */ -#define R_ARM_XPC25 15 /* Obsolete */ -#define R_ARM_THM_XPC22 16 /* Obsolete */ -#define R_ARM_TLS_DTPMOD32 17 /* Data Module[S] */ -#define R_ARM_TLS_DTPOFF32 18 /* Data S + A - TLS */ -#define R_ARM_TLS_TPOFF32 19 /* Data S + A - tp */ -#define R_ARM_COPY 20 /* Miscellaneous */ -#define R_ARM_GLOB_DAT 21 /* Data (S + A) | T */ -#define R_ARM_JUMP_SLOT 22 /* Data (S + A) | T */ -#define R_ARM_RELATIVE 23 /* Data B(S) + A */ -#define R_ARM_GOTOFF32 24 /* Data ((S + A) | T) - GOT_ORG */ -#define R_ARM_BASE_PREL 25 /* Data B(S) + A - P */ -#define R_ARM_GOT_BREL 26 /* Data GOT(S) + A - GOT_ORG */ -#define R_ARM_PLT32 27 /* ARM ((S + A) | T) - P */ -#define R_ARM_CALL 28 /* ARM ((S + A) | T) - P */ -#define R_ARM_JUMP24 29 /* ARM ((S + A) | T) - P */ -#define R_ARM_THM_JUMP24 30 /* Thumb32 ((S + A) | T) - P */ -#define R_ARM_BASE_ABS 31 /* Data B(S) + A */ -#define R_ARM_ALU_PCREL_7_0 32 /* Obsolete */ -#define R_ARM_ALU_PCREL_15_8 33 /* Obsolete */ -#define R_ARM_ALU_PCREL_23_15 34 /* Obsolete */ -#define R_ARM_LDR_SBREL_11_0_NC 35 /* ARM S + A - B(S) */ -#define R_ARM_ALU_SBREL_19_12_NC 36 /* ARM S + A - B(S) */ -#define R_ARM_ALU_SBREL_27_20_CK 37 /* ARM S + A - B(S) */ -#define R_ARM_TARGET1 38 /* Miscellaneous (S + A) | T or ((S + A) | T) - P */ -#define R_ARM_SBREL31 39 /* Data ((S + A) | T) - B(S) */ -#define R_ARM_V4BX 40 /* Miscellaneous */ -#define R_ARM_TARGET2 41 /* Miscellaneous */ -#define R_ARM_PREL31 42 /* Data ((S + A) | T) - P */ -#define R_ARM_MOVW_ABS_NC 43 /* ARM (S + A) | T */ -#define R_ARM_MOVT_ABS 44 /* ARM S + A */ -#define R_ARM_MOVW_PREL_NC 45 /* ARM ((S + A) | T) - P */ -#define R_ARM_MOVT_PREL 46 /* ARM S + A - P */ -#define R_ARM_THM_MOVW_ABS_NC 47 /* Thumb32 (S + A) | T */ -#define R_ARM_THM_MOVT_ABS 48 /* Thumb32 S + A */ -#define R_ARM_THM_MOVW_PREL_NC 49 /* Thumb32 ((S + A) | T) - P */ -#define R_ARM_THM_MOVT_PREL 50 /* Thumb32 S + A - P */ -#define R_ARM_THM_JUMP19 51 /* Thumb32 ((S + A) | T) - P */ -#define R_ARM_THM_JUMP6 52 /* Thumb16 S + A - P */ -#define R_ARM_THM_ALU_PREL_11_0 53 /* Thumb32 ((S + A) | T) - Pa */ -#define R_ARM_THM_PC12 54 /* Thumb32 S + A - Pa */ -#define R_ARM_ABS32_NOI 55 /* Data S + A */ -#define R_ARM_REL32_NOI 56 /* Data S + A - P */ -#define R_ARM_ALU_PC_G0_NC 57 /* ARM ((S + A) | T) - P */ -#define R_ARM_ALU_PC_G0 58 /* ARM ((S + A) | T) - P */ -#define R_ARM_ALU_PC_G1_NC 59 /* ARM ((S + A) | T) - P */ -#define R_ARM_ALU_PC_G1 60 /* ARM ((S + A) | T) - P */ -#define R_ARM_ALU_PC_G2 61 /* ARM ((S + A) | T) - P */ -#define R_ARM_LDR_PC_G1 62 /* ARM S + A - P */ -#define R_ARM_LDR_PC_G2 63 /* ARM S + A - P */ -#define R_ARM_LDRS_PC_G0 64 /* ARM S + A - P */ -#define R_ARM_LDRS_PC_G1 65 /* ARM S + A - P */ -#define R_ARM_LDRS_PC_G2 66 /* ARM S + A - P */ -#define R_ARM_LDC_PC_G0 67 /* ARM S + A - P */ -#define R_ARM_LDC_PC_G1 68 /* ARM S + A - P */ -#define R_ARM_LDC_PC_G2 69 /* ARM S + A - P */ -#define R_ARM_ALU_SB_G0_NC 70 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_ALU_SB_G0 71 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_ALU_SB_G1_NC 72 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_ALU_SB_G1 73 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_ALU_SB_G2 74 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_LDR_SB_G0 75 /* ARM S + A - B(S) */ -#define R_ARM_LDR_SB_G1 76 /* ARM S + A - B(S) */ -#define R_ARM_LDR_SB_G2 77 /* ARM S + A - B(S) */ -#define R_ARM_LDRS_SB_G0 78 /* ARM S + A - B(S) */ -#define R_ARM_LDRS_SB_G1 79 /* ARM S + A - B(S) */ -#define R_ARM_LDRS_SB_G2 80 /* ARM S + A - B(S) */ -#define R_ARM_LDC_SB_G0 81 /* ARM S + A - B(S) */ -#define R_ARM_LDC_SB_G1 82 /* ARM S + A - B(S) */ -#define R_ARM_LDC_SB_G2 83 /* ARM S + A - B(S) */ -#define R_ARM_MOVW_BREL_NC 84 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_MOVT_BREL 85 /* ARM S + A - B(S) */ -#define R_ARM_MOVW_BREL 86 /* ARM ((S + A) | T) - B(S) */ -#define R_ARM_THM_MOVW_BREL_NC 87 /* Thumb32 ((S + A) | T) - B(S) */ -#define R_ARM_THM_MOVT_BREL 88 /* Thumb32 S + A - B(S) */ -#define R_ARM_THM_MOVW_BREL 89 /* Thumb32 ((S + A) | T) - B(S) */ -#define R_ARM_TLS_GOTDESC 90 /* Data */ -#define R_ARM_TLS_CALL 91 /* ARM */ -#define R_ARM_TLS_DESCSEQ 92 /* ARM TLS relaxation */ -#define R_ARM_THM_TLS_CALL 93 /* Thumb32 */ -#define R_ARM_PLT32_ABS 94 /* Data PLT(S) + A */ -#define R_ARM_GOT_ABS 95 /* Data GOT(S) + A */ -#define R_ARM_GOT_PREL 96 /* Data GOT(S) + A - P */ -#define R_ARM_GOT_BREL12 97 /* ARM GOT(S) + A - GOT_ORG */ -#define R_ARM_GOTOFF12 98 /* ARM S + A - GOT_ORG */ -#define R_ARM_GOTRELAX 99 /* Miscellaneous */ -#define R_ARM_GNU_VTENTRY 100 /* Data */ -#define R_ARM_GNU_VTINHERIT 101 /* Data */ -#define R_ARM_THM_JUMP11 102 /* Thumb16 S + A - P */ -#define R_ARM_THM_JUMP8 103 /* Thumb16 S + A - P */ -#define R_ARM_TLS_GD32 104 /* Data GOT(S) + A - P */ -#define R_ARM_TLS_LDM32 105 /* Data GOT(S) + A - P */ -#define R_ARM_TLS_LDO32 106 /* Data S + A - TLS */ -#define R_ARM_TLS_IE32 107 /* Data GOT(S) + A - P */ -#define R_ARM_TLS_LE32 108 /* Data S + A - tp */ -#define R_ARM_TLS_LDO12 109 /* ARM S + A - TLS */ -#define R_ARM_TLS_LE12 110 /* ARM S + A - tp */ -#define R_ARM_TLS_IE12GP 111 /* ARM GOT(S) + A - GOT_ORG */ -#define R_ARM_ME_TOO 128 /* Obsolete */ -#define R_ARM_THM_TLS_DESCSEQ16 129 /* Thumb16 */ -#define R_ARM_THM_TLS_DESCSEQ32 130 /* Thumb32 */ - -/* 5.2.1 Platform architecture compatibility data */ - -#define PT_ARM_ARCHEXT_FMTMSK 0xff000000 -#define PT_ARM_ARCHEXT_PROFMSK 0x00ff0000 -#define PT_ARM_ARCHEXT_ARCHMSK 0x000000ff - -#define PT_ARM_ARCHEXT_FMT_OS 0x00000000 -#define PT_ARM_ARCHEXT_FMT_ABI 0x01000000 - -#define PT_ARM_ARCHEXT_PROF_NONE 0x00000000 -#define PT_ARM_ARCHEXT_PROF_ARM 0x00410000 -#define PT_ARM_ARCHEXT_PROF_RT 0x00520000 -#define PT_ARM_ARCHEXT_PROF_MC 0x004d0000 -#define PT_ARM_ARCHEXT_PROF_CLASSIC 0x00530000 - -#define PT_ARM_ARCHEXT_ARCH_UNKNOWN 0x00 -#define PT_ARM_ARCHEXT_ARCHv4 0x01 -#define PT_ARM_ARCHEXT_ARCHv4T 0x02 -#define PT_ARM_ARCHEXT_ARCHv5T 0x03 -#define PT_ARM_ARCHEXT_ARCHv5TE 0x04 -#define PT_ARM_ARCHEXT_ARCHv5TEJ 0x05 -#define PT_ARM_ARCHEXT_ARCHv6 0x06 -#define PT_ARM_ARCHEXT_ARCHv6KZ 0x07 -#define PT_ARM_ARCHEXT_ARCHv6T2 0x08 -#define PT_ARM_ARCHEXT_ARCHv6K 0x09 -#define PT_ARM_ARCHEXT_ARCHv7 0x0a -#define PT_ARM_ARCHEXT_ARCHv6M 0x0b -#define PT_ARM_ARCHEXT_ARCHv6SM 0x0c -#define PT_ARM_ARCHEXT_ARCHv7EM 0x0d - -/* Table 5-6, ARM-specific dynamic array tags */ - -#define DT_ARM_RESERVED1 0x70000000 -#define DT_ARM_SYMTABSZ 0x70000001 -#define DT_ARM_PREEMPTMAP 0x70000002 -#define DT_ARM_RESERVED2 0x70000003 - -#endif /* __ARCH_ARM_INCLUDE_ELF_H */ diff --git a/nuttx/arch/arm/include/irq.h b/nuttx/arch/arm/include/irq.h deleted file mode 100644 index bde751b99..000000000 --- a/nuttx/arch/arm/include/irq.h +++ /dev/null @@ -1,100 +0,0 @@ -/**************************************************************************** - * arch/arm/include/irq.h - * - * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_IRQ_H -#define __ARCH_ARM_INCLUDE_IRQ_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/* Include NuttX-specific IRQ definitions */ - -#include <nuttx/irq.h> - -/* Include chip-specific IRQ definitions (including IRQ numbers) */ - -#include <arch/chip/irq.h> - -/* Include ARM architecture-specific IRQ definitions (including register - * save structure and irqsave()/irqrestore() macros) - */ - -#if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) -# include <arch/armv7-m/irq.h> -#else -# include <arch/arm/irq.h> -#endif - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_IRQ_H */ - diff --git a/nuttx/arch/arm/include/limits.h b/nuttx/arch/arm/include/limits.h deleted file mode 100644 index a218d53bf..000000000 --- a/nuttx/arch/arm/include/limits.h +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************** - * arch/arm/include/limits.h - * - * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_LIMITS_H -#define __ARCH_ARM_INCLUDE_LIMITS_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -#define CHAR_BIT 8 -#define SCHAR_MIN (-128) -#define SCHAR_MAX 127 -#define UCHAR_MAX 0xff - -/* These could be different on machines where char is unsigned */ - -#define CHAR_MIN SCHAR_MIN -#define CHAR_MAX SCHAR_MAX - -#define SHRT_MIN 0x8000 -#define SHRT_MAX 0x7fff -#define USHRT_MAX 0xffff - -#define INT_MIN 0x80000000 -#define INT_MAX 0x7fffffff -#define UINT_MAX 0xffffffff - -/* These change on 32-bit and 64-bit platforms */ - -#define LONG_MAX 0x80000000 -#define LONG_MIN 0x7fffffff -#define ULONG_MAX 0xffffffff - -#define LLONG_MAX 0x8000000000000000 -#define LLONG_MIN 0x7fffffffffffffff -#define ULLONG_MAX 0xffffffffffffffff - -/* A pointer is 4 bytes */ - -#define PTR_MIN 0x80000000 -#define PTR_MAX 0x7fffffff -#define UPTR_MAX 0xffffffff - -#endif /* __ARCH_ARM_INCLUDE_LIMITS_H */ diff --git a/nuttx/arch/arm/include/math.h b/nuttx/arch/arm/include/math.h deleted file mode 100644 index 9de10c58b..000000000 --- a/nuttx/arch/arm/include/math.h +++ /dev/null @@ -1,612 +0,0 @@ -#ifndef _MATH_H_ - -#define _MATH_H_ - -//#include <sys/reent.h> -#include <machine/ieeefp.h> -#include "_ansi.h" - -//#define _PARAMS(_x) _x - -_BEGIN_STD_C - -#if 0 -/* __dmath, __fmath, and __ldmath are only here for backwards compatibility - * in case any code used them. They are no longer used by Newlib, itself, - * other than legacy. */ -union __dmath -{ - double d; - __ULong i[2]; -}; - -union __fmath -{ - float f; - __ULong i[1]; -}; - -#if defined(_HAVE_LONG_DOUBLE) -union __ldmath -{ - long double ld; - __ULong i[4]; -}; -#endif -#endif - -/* Natural log of 2 */ -#define _M_LN2 0.693147180559945309417 - -#if defined(__GNUC__) && \ - ( (__GNUC__ >= 4) || \ - ( (__GNUC__ >= 3) && defined(__GNUC_MINOR__) && (__GNUC_MINOR__ >= 3) ) ) - - /* gcc >= 3.3 implicitly defines builtins for HUGE_VALx values. */ - -# ifndef HUGE_VAL -# define HUGE_VAL (__builtin_huge_val()) -# endif - -# ifndef HUGE_VALF -# define HUGE_VALF (__builtin_huge_valf()) -# endif - -# ifndef HUGE_VALL -# define HUGE_VALL (__builtin_huge_vall()) -# endif - -# ifndef INFINITY -# define INFINITY (__builtin_inff()) -# endif - -# ifndef NAN -# define NAN (__builtin_nanf("")) -# endif - -#else /* !gcc >= 3.3 */ - - /* No builtins. Use fixed defines instead. (All 3 HUGE plus the INFINITY - * and NAN macros are required to be constant expressions. Using a variable-- - * even a static const--does not meet this requirement, as it cannot be - * evaluated at translation time.) - * The infinities are done using numbers that are far in excess of - * something that would be expected to be encountered in a floating-point - * implementation. (A more certain way uses values from float.h, but that is - * avoided because system includes are not supposed to include each other.) - * This method might produce warnings from some compilers. (It does in - * newer GCCs, but not for ones that would hit this #else.) If this happens, - * please report details to the Newlib mailing list. */ - - #ifndef HUGE_VAL - #define HUGE_VAL (1.0e999999999) - #endif - - #ifndef HUGE_VALF - #define HUGE_VALF (1.0e999999999F) - #endif - - #if !defined(HUGE_VALL) && defined(_HAVE_LONG_DOUBLE) - #define HUGE_VALL (1.0e999999999L) - #endif - - #if !defined(INFINITY) - #define INFINITY (HUGE_VALF) - #endif - - #if !defined(NAN) - #if defined(__GNUC__) && defined(__cplusplus) - /* Exception: older g++ versions warn about the divide by 0 used in the - * normal case (even though older gccs do not). This trick suppresses the - * warning, but causes errors for plain gcc, so is only used in the one - * special case. */ - static const union { __ULong __i[1]; float __d; } __Nanf = {0x7FC00000}; - #define NAN (__Nanf.__d) - #else - #define NAN (0.0F/0.0F) - #endif - #endif - -#endif /* !gcc >= 3.3 */ - -/* Reentrant ANSI C functions. */ - -#ifndef __math_68881 -extern double atan _PARAMS((double)); -extern double cos _PARAMS((double)); -extern double sin _PARAMS((double)); -extern double tan _PARAMS((double)); -extern double tanh _PARAMS((double)); -extern double frexp _PARAMS((double, int *)); -extern double modf _PARAMS((double, double *)); -extern double ceil _PARAMS((double)); -extern double fabs _PARAMS((double)); -extern double floor _PARAMS((double)); -#endif /* ! defined (__math_68881) */ - -/* Non reentrant ANSI C functions. */ - -#ifndef _REENT_ONLY -#ifndef __math_68881 -extern double acos _PARAMS((double)); -extern double asin _PARAMS((double)); -extern double atan2 _PARAMS((double, double)); -extern double cosh _PARAMS((double)); -extern double sinh _PARAMS((double)); -extern double exp _PARAMS((double)); -extern double ldexp _PARAMS((double, int)); -extern double log _PARAMS((double)); -extern double log10 _PARAMS((double)); -extern double pow _PARAMS((double, double)); -extern double sqrt _PARAMS((double)); -extern double fmod _PARAMS((double, double)); -#endif /* ! defined (__math_68881) */ -#endif /* ! defined (_REENT_ONLY) */ - -#if !defined(__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L - -/* ISO C99 types and macros. */ - -#ifndef FLT_EVAL_METHOD -#define FLT_EVAL_METHOD 0 -typedef float float_t; -typedef double double_t; -#endif /* FLT_EVAL_METHOD */ - -#define FP_NAN 0 -#define FP_INFINITE 1 -#define FP_ZERO 2 -#define FP_SUBNORMAL 3 -#define FP_NORMAL 4 - -#ifndef FP_ILOGB0 -# define FP_ILOGB0 (-INT_MAX) -#endif -#ifndef FP_ILOGBNAN -# define FP_ILOGBNAN INT_MAX -#endif - -#ifndef MATH_ERRNO -# define MATH_ERRNO 1 -#endif -#ifndef MATH_ERREXCEPT -# define MATH_ERREXCEPT 2 -#endif -#ifndef math_errhandling -# define math_errhandling MATH_ERRNO -#endif - -extern int __isinff (float x); -extern int __isinfd (double x); -extern int __isnanf (float x); -extern int __isnand (double x); -extern int __fpclassifyf (float x); -extern int __fpclassifyd (double x); -extern int __signbitf (float x); -extern int __signbitd (double x); - -#define fpclassify(__x) \ - ((sizeof(__x) == sizeof(float)) ? __fpclassifyf(__x) : \ - __fpclassifyd(__x)) - -#ifndef isfinite - #define isfinite(__y) \ - (__extension__ ({int __cy = fpclassify(__y); \ - __cy != FP_INFINITE && __cy != FP_NAN;})) -#endif - -/* Note: isinf and isnan were once functions in newlib that took double - * arguments. C99 specifies that these names are reserved for macros - * supporting multiple floating point types. Thus, they are - * now defined as macros. Implementations of the old functions - * taking double arguments still exist for compatibility purposes - * (prototypes for them are in <ieeefp.h>). */ -#ifndef isinf - #define isinf(y) (fpclassify(y) == FP_INFINITE) -#endif - -#ifndef isnan - #define isnan(y) (fpclassify(y) == FP_NAN) -#endif - -#define isnormal(y) (fpclassify(y) == FP_NORMAL) -#define signbit(__x) \ - ((sizeof(__x) == sizeof(float)) ? __signbitf(__x) : \ - __signbitd(__x)) - -#define isgreater(x,y) \ - (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \ - !isunordered(__x,__y) && (__x > __y);})) -#define isgreaterequal(x,y) \ - (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \ - !isunordered(__x,__y) && (__x >= __y);})) -#define isless(x,y) \ - (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \ - !isunordered(__x,__y) && (__x < __y);})) -#define islessequal(x,y) \ - (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \ - !isunordered(__x,__y) && (__x <= __y);})) -#define islessgreater(x,y) \ - (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \ - !isunordered(__x,__y) && (__x < __y || __x > __y);})) - -#define isunordered(a,b) \ - (__extension__ ({__typeof__(a) __a = (a); __typeof__(b) __b = (b); \ - fpclassify(__a) == FP_NAN || fpclassify(__b) == FP_NAN;})) - -/* Non ANSI double precision functions. */ - -extern double infinity _PARAMS((void)); -extern double nan _PARAMS((const char *)); -extern int finite _PARAMS((double)); -extern double copysign _PARAMS((double, double)); -extern double logb _PARAMS((double)); -extern int ilogb _PARAMS((double)); - -extern double asinh _PARAMS((double)); -extern double cbrt _PARAMS((double)); -extern double nextafter _PARAMS((double, double)); -extern double rint _PARAMS((double)); -extern double scalbn _PARAMS((double, int)); - -extern double exp2 _PARAMS((double)); -extern double scalbln _PARAMS((double, long int)); -extern double tgamma _PARAMS((double)); -extern double nearbyint _PARAMS((double)); -extern long int lrint _PARAMS((double)); -extern _LONG_LONG_TYPE int llrint _PARAMS((double)); -extern double round _PARAMS((double)); -extern long int lround _PARAMS((double)); -extern long long int llround _PARAMS((double)); -extern double trunc _PARAMS((double)); -extern double remquo _PARAMS((double, double, int *)); -extern double fdim _PARAMS((double, double)); -extern double fmax _PARAMS((double, double)); -extern double fmin _PARAMS((double, double)); -extern double fma _PARAMS((double, double, double)); - -#ifndef __math_68881 -extern double log1p _PARAMS((double)); -extern double expm1 _PARAMS((double)); -#endif /* ! defined (__math_68881) */ - -#ifndef _REENT_ONLY -extern double acosh _PARAMS((double)); -extern double atanh _PARAMS((double)); -extern double remainder _PARAMS((double, double)); -extern double gamma _PARAMS((double)); -extern double lgamma _PARAMS((double)); -extern double erf _PARAMS((double)); -extern double erfc _PARAMS((double)); -extern double log2 _PARAMS((double)); -#if !defined(__cplusplus) -#define log2(x) (log (x) / _M_LN2) -#endif - -#ifndef __math_68881 -extern double hypot _PARAMS((double, double)); -#endif - -#endif /* ! defined (_REENT_ONLY) */ - -/* Single precision versions of ANSI functions. */ - -extern float atanf _PARAMS((float)); -extern float cosf _PARAMS((float)); -extern float sinf _PARAMS((float)); -extern float tanf _PARAMS((float)); -extern float tanhf _PARAMS((float)); -extern float frexpf _PARAMS((float, int *)); -extern float modff _PARAMS((float, float *)); -extern float ceilf _PARAMS((float)); -extern float fabsf _PARAMS((float)); -extern float floorf _PARAMS((float)); - -#ifndef _REENT_ONLY -extern float acosf _PARAMS((float)); -extern float asinf _PARAMS((float)); -extern float atan2f _PARAMS((float, float)); -extern float coshf _PARAMS((float)); -extern float sinhf _PARAMS((float)); -extern float expf _PARAMS((float)); -extern float ldexpf _PARAMS((float, int)); -extern float logf _PARAMS((float)); -extern float log10f _PARAMS((float)); -extern float powf _PARAMS((float, float)); -extern float sqrtf _PARAMS((float)); -extern float fmodf _PARAMS((float, float)); -#endif /* ! defined (_REENT_ONLY) */ - -/* Other single precision functions. */ - -extern float exp2f _PARAMS((float)); -extern float scalblnf _PARAMS((float, long int)); -extern float tgammaf _PARAMS((float)); -extern float nearbyintf _PARAMS((float)); -extern long int lrintf _PARAMS((float)); -extern _LONG_LONG_TYPE llrintf _PARAMS((float)); -extern float roundf _PARAMS((float)); -extern long int lroundf _PARAMS((float)); -extern long long int llroundf _PARAMS((float)); -extern float truncf _PARAMS((float)); -extern float remquof _PARAMS((float, float, int *)); -extern float fdimf _PARAMS((float, float)); -extern float fmaxf _PARAMS((float, float)); -extern float fminf _PARAMS((float, float)); -extern float fmaf _PARAMS((float, float, float)); - -extern float infinityf _PARAMS((void)); -extern float nanf _PARAMS((const char *)); -extern int finitef _PARAMS((float)); -extern float copysignf _PARAMS((float, float)); -extern float logbf _PARAMS((float)); -extern int ilogbf _PARAMS((float)); - -extern float asinhf _PARAMS((float)); -extern float cbrtf _PARAMS((float)); -extern float nextafterf _PARAMS((float, float)); -extern float rintf _PARAMS((float)); -extern float scalbnf _PARAMS((float, int)); -extern float log1pf _PARAMS((float)); -extern float expm1f _PARAMS((float)); - -#ifndef _REENT_ONLY -extern float acoshf _PARAMS((float)); -extern float atanhf _PARAMS((float)); -extern float remainderf _PARAMS((float, float)); -extern float gammaf _PARAMS((float)); -extern float lgammaf _PARAMS((float)); -extern float erff _PARAMS((float)); -extern float erfcf _PARAMS((float)); -extern float log2f _PARAMS((float)); -#if !defined(__cplusplus) -#define log2f(x) (logf (x) / (float_t) _M_LN2) -#endif -extern float hypotf _PARAMS((float, float)); -#endif /* ! defined (_REENT_ONLY) */ - -/* On platforms where long double equals double. */ -#ifdef _LDBL_EQ_DBL -/* Reentrant ANSI C functions. */ -#ifndef __math_68881 -extern long double atanl _PARAMS((long double)); -extern long double cosl _PARAMS((long double)); -extern long double sinl _PARAMS((long double)); -extern long double tanl _PARAMS((long double)); -extern long double tanhl _PARAMS((long double)); -extern long double frexpl _PARAMS((long double value, int *)); -extern long double modfl _PARAMS((long double, long double *)); -extern long double ceill _PARAMS((long double)); -extern long double fabsl _PARAMS((long double)); -extern long double floorl _PARAMS((long double)); -extern long double log1pl _PARAMS((long double)); -extern long double expm1l _PARAMS((long double)); -#endif /* ! defined (__math_68881) */ -/* Non reentrant ANSI C functions. */ -#ifndef _REENT_ONLY -#ifndef __math_68881 -extern long double acosl _PARAMS((long double)); -extern long double asinl _PARAMS((long double)); -extern long double atan2l _PARAMS((long double, long double)); -extern long double coshl _PARAMS((long double)); -extern long double sinhl _PARAMS((long double)); -extern long double expl _PARAMS((long double)); -extern long double ldexpl _PARAMS((long double, int)); -extern long double logl _PARAMS((long double)); -extern long double log10l _PARAMS((long double)); -extern long double powl _PARAMS((long double, long double)); -extern long double sqrtl _PARAMS((long double)); -extern long double fmodl _PARAMS((long double, long double)); -extern long double hypotl _PARAMS((long double, long double)); -#endif /* ! defined (__math_68881) */ -#endif /* ! defined (_REENT_ONLY) */ -extern long double copysignl _PARAMS((long double, long double)); -extern long double nanl _PARAMS((const char *)); -extern int ilogbl _PARAMS((long double)); -extern long double asinhl _PARAMS((long double)); -extern long double cbrtl _PARAMS((long double)); -extern long double nextafterl _PARAMS((long double, long double)); -extern long double rintl _PARAMS((long double)); -extern long double scalbnl _PARAMS((long double, int)); -extern long double exp2l _PARAMS((long double)); -extern long double scalblnl _PARAMS((long double, long)); -extern long double tgammal _PARAMS((long double)); -extern long double nearbyintl _PARAMS((long double)); -extern long int lrintl _PARAMS((long double)); -extern long long int llrintl _PARAMS((long double)); -extern long double roundl _PARAMS((long double)); -extern long lroundl _PARAMS((long double)); -extern _LONG_LONG_TYPE int llroundl _PARAMS((long double)); -extern long double truncl _PARAMS((long double)); -extern long double remquol _PARAMS((long double, long double, int *)); -extern long double fdiml _PARAMS((long double, long double)); -extern long double fmaxl _PARAMS((long double, long double)); -extern long double fminl _PARAMS((long double, long double)); -extern long double fmal _PARAMS((long double, long double, long double)); -#ifndef _REENT_ONLY -extern long double acoshl _PARAMS((long double)); -extern long double atanhl _PARAMS((long double)); -extern long double remainderl _PARAMS((long double, long double)); -extern long double lgammal _PARAMS((long double)); -extern long double erfl _PARAMS((long double)); -extern long double erfcl _PARAMS((long double)); -#endif /* ! defined (_REENT_ONLY) */ -#else /* !_LDBL_EQ_DBL */ -#ifdef __i386__ -/* Other long double precision functions. */ -extern _LONG_DOUBLE rintl _PARAMS((_LONG_DOUBLE)); -extern long int lrintl _PARAMS((_LONG_DOUBLE)); -extern _LONG_LONG_TYPE llrintl _PARAMS((_LONG_DOUBLE)); -#endif /* __i386__ */ -#endif /* !_LDBL_EQ_DBL */ - -#endif /* !defined (__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L */ - -#if !defined (__STRICT_ANSI__) || defined(__cplusplus) - -extern double drem _PARAMS((double, double)); -extern void sincos _PARAMS((double, double *, double *)); -extern double gamma_r _PARAMS((double, int *)); -extern double lgamma_r _PARAMS((double, int *)); - -extern double y0 _PARAMS((double)); -extern double y1 _PARAMS((double)); -extern double yn _PARAMS((int, double)); -extern double j0 _PARAMS((double)); -extern double j1 _PARAMS((double)); -extern double jn _PARAMS((int, double)); - -extern float dremf _PARAMS((float, float)); -extern void sincosf _PARAMS((float, float *, float *)); -extern float gammaf_r _PARAMS((float, int *)); -extern float lgammaf_r _PARAMS((float, int *)); - -extern float y0f _PARAMS((float)); -extern float y1f _PARAMS((float)); -extern float ynf _PARAMS((int, float)); -extern float j0f _PARAMS((float)); -extern float j1f _PARAMS((float)); -extern float jnf _PARAMS((int, float)); - -/* GNU extensions */ -# ifndef exp10 -extern double exp10 _PARAMS((double)); -# endif -# ifndef pow10 -extern double pow10 _PARAMS((double)); -# endif -# ifndef exp10f -extern float exp10f _PARAMS((float)); -# endif -# ifndef pow10f -extern float pow10f _PARAMS((float)); -# endif - -#endif /* !defined (__STRICT_ANSI__) || defined(__cplusplus) */ - -#ifndef __STRICT_ANSI__ - -/* The gamma functions use a global variable, signgam. */ -#ifndef _REENT_ONLY -#define signgam (*__signgam()) -extern int *__signgam _PARAMS((void)); -#endif /* ! defined (_REENT_ONLY) */ - -#define __signgam_r(ptr) _REENT_SIGNGAM(ptr) - -/* The exception structure passed to the matherr routine. */ -/* We have a problem when using C++ since `exception' is a reserved - name in C++. */ -#ifdef __cplusplus -struct __exception -#else -struct exception -#endif -{ - int type; - char *name; - double arg1; - double arg2; - double retval; - int err; -}; - -#ifdef __cplusplus -extern int matherr _PARAMS((struct __exception *e)); -#else -extern int matherr _PARAMS((struct exception *e)); -#endif - -/* Values for the type field of struct exception. */ - -#define DOMAIN 1 -#define SING 2 -#define OVERFLOW 3 -#define UNDERFLOW 4 -#define TLOSS 5 -#define PLOSS 6 - -/* Useful constants. */ - -#define MAXFLOAT 3.40282347e+38F - -#define M_E 2.7182818284590452354 -#define M_LOG2E 1.4426950408889634074 -#define M_LOG10E 0.43429448190325182765 -#define M_LN2 _M_LN2 -#define M_LN10 2.30258509299404568402 -#define M_PI 3.14159265358979323846 -#define M_TWOPI (M_PI * 2.0) -#define M_PI_2 1.57079632679489661923 -#define M_PI_4 0.78539816339744830962 -#define M_3PI_4 2.3561944901923448370E0 -#define M_SQRTPI 1.77245385090551602792981 -#define M_1_PI 0.31830988618379067154 -#define M_2_PI 0.63661977236758134308 -#define M_2_SQRTPI 1.12837916709551257390 -#define M_DEG_TO_RAD 0.01745329251994 -#define M_RAD_TO_DEG 57.2957795130823 -#define M_SQRT2 1.41421356237309504880 -#define M_SQRT1_2 0.70710678118654752440 -#define M_LN2LO 1.9082149292705877000E-10 -#define M_LN2HI 6.9314718036912381649E-1 -#define M_SQRT3 1.73205080756887719000 -#define M_IVLN10 0.43429448190325182765 /* 1 / log(10) */ -#define M_LOG2_E _M_LN2 -#define M_INVLN2 1.4426950408889633870E0 /* 1 / log(2) */ - - -#define M_E_F 2.7182818284590452354f -#define M_LOG2E_F 1.4426950408889634074f -#define M_LOG10E_F 0.43429448190325182765f -#define M_LN2_F _M_LN2_F -#define M_LN10_F 2.30258509299404568402f -#define M_PI_F 3.14159265358979323846f -#define M_TWOPI_F (M_PI_F * 2.0f) -#define M_PI_2_F 1.57079632679489661923f -#define M_PI_4_F 0.78539816339744830962f -#define M_3PI_4_F 2.3561944901923448370E0f -#define M_SQRTPI_F 1.77245385090551602792981f -#define M_1_PI_F 0.31830988618379067154f -#define M_2_PI_F 0.63661977236758134308f -#define M_2_SQRTPI_F 1.12837916709551257390f -#define M_DEG_TO_RAD_F 0.01745329251994f -#define M_RAD_TO_DEG_F 57.2957795130823f -#define M_SQRT2_F 1.41421356237309504880f -#define M_SQRT1_2_F 0.70710678118654752440f -#define M_LN2LO_F 1.9082149292705877000E-10f -#define M_LN2HI_F 6.9314718036912381649E-1f -#define M_SQRT3_F 1.73205080756887719000f -#define M_IVLN10_F 0.43429448190325182765f /* 1 / log(10) */ -#define M_LOG2_E_F _M_LN2_F -#define M_INVLN2_F 1.4426950408889633870E0f /* 1 / log(2) */ - -/* Global control over fdlibm error handling. */ - -enum __fdlibm_version -{ - __fdlibm_ieee = -1, - __fdlibm_svid, - __fdlibm_xopen, - __fdlibm_posix -}; - -#define _LIB_VERSION_TYPE enum __fdlibm_version -#define _LIB_VERSION __fdlib_version - -extern __IMPORT _LIB_VERSION_TYPE _LIB_VERSION; - -#define _IEEE_ __fdlibm_ieee -#define _SVID_ __fdlibm_svid -#define _XOPEN_ __fdlibm_xopen -#define _POSIX_ __fdlibm_posix - -#endif /* ! defined (__STRICT_ANSI__) */ - -_END_STD_C - -#ifdef __FAST_MATH__ -#include <machine/fastmath.h> -#endif - -#endif /* _MATH_H_ */ diff --git a/nuttx/arch/arm/include/serial.h b/nuttx/arch/arm/include/serial.h deleted file mode 100644 index 844f78a2b..000000000 --- a/nuttx/arch/arm/include/serial.h +++ /dev/null @@ -1,58 +0,0 @@ -/**************************************************************************** - * arch/arm/include/serial.h - * - * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_SERIAL_H -#define __ARCH_ARM_INCLUDE_SERIAL_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <sys/types.h> -#include <nuttx/fs/ioctl.h> - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_SERIAL_H */ diff --git a/nuttx/arch/arm/include/stdarg.h b/nuttx/arch/arm/include/stdarg.h deleted file mode 100644 index 653d34a6f..000000000 --- a/nuttx/arch/arm/include/stdarg.h +++ /dev/null @@ -1,59 +0,0 @@ -/**************************************************************************** - * arch/arm/include/stdarg.h - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_STDARG_H -#define __ARCH_ARM_INCLUDE_STDARG_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* This should work with any modern gcc (newer than 3.4 or so) */ - -#define va_start(v,l) __builtin_va_start(v,l) -#define va_end(v) __builtin_va_end(v) -#define va_arg(v,l) __builtin_va_arg(v,l) -#define va_copy(d,s) __builtin_va_copy(d,s) - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -typedef __builtin_va_list va_list; - -#endif /* __ARCH_ARM_INCLUDE_STDARG_H */ diff --git a/nuttx/arch/arm/include/stm32/chip.h b/nuttx/arch/arm/include/stm32/chip.h deleted file mode 100644 index 14d92ea3d..000000000 --- a/nuttx/arch/arm/include/stm32/chip.h +++ /dev/null @@ -1,706 +0,0 @@ -/************************************************************************************ - * arch/arm/include/stm32/chip.h - * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_STM32_CHIP_H -#define __ARCH_ARM_INCLUDE_STM32_CHIP_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Get customizations for each supported chip and provide alternate function pin-mapping - * - * NOTE: Each GPIO pin may serve either for general purpose I/O or for a special - * alternate function (such as USART, CAN, USB, SDIO, etc.). That particular - * pin-mapping will depend on the package and STM32 family. If you are incorporating - * a new STM32 chip into NuttX, you will need to add the pin-mapping to a header file - * and to include that header file below. The chip-specific pin-mapping is defined in - * the chip datasheet. - */ - -/* STM32 F100 Value Line ************************************************************/ - -#if defined(CONFIG_ARCH_CHIP_STM32F100C8) || defined(CONFIG_ARCH_CHIP_STM32F100CB) \ - || defined(CONFIG_ARCH_CHIP_STM32F100R8) || defined(CONFIG_ARCH_CHIP_STM32F100RB) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 0 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 3 /* 16-bit general timers TIM2,3,4 with DMA */ -# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */ -// TODO: there are also 3 additional timers (15-17) that don't fit any existing category -# define STM32_NDMA 1 /* DMA1 */ -# define STM32_NSPI 2 /* SPI1-2 */ -# define STM32_NI2S 0 /* No I2S */ -# define STM32_NUSART 3 /* USART1-3 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 0 /* No CAN */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 64 /* GPIOA-D */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 2 /* DAC 1-2 */ -# define STM32_NCRC 1 /* CRC1 */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F100V8) || defined(CONFIG_ARCH_CHIP_STM32F100VB) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 0 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 3 /* 16-bit general timers TIM2,3,4 with DMA */ -# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */ -// TODO: there are also 3 additional timers (15-17) that don't fit any existing category -# define STM32_NDMA 1 /* DMA1 */ -# define STM32_NSPI 2 /* SPI1-2 */ -# define STM32_NI2S 0 /* No I2S */ -# define STM32_NUSART 3 /* USART1-3 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 0 /* No CAN */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 80 /* GPIOA-E */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 2 /* DAC 1-2 */ -# define STM32_NCRC 1 /* CRC1 */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32 F100 High-density value Line ************************************************************/ - -#elif defined(CONFIG_ARCH_CHIP_STM32F100RC) || defined(CONFIG_ARCH_CHIP_STM32F100RD) \ - || defined(CONFIG_ARCH_CHIP_STM32F100RE) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 0 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */ -// TODO: there are also 6 additional timers (12-17) that don't fit any existing category -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 0 /* No I2S */ -# define STM32_NUSART 5 /* USART1-5 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 0 /* No CAN */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 64 /* GPIOA-D */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 2 /* DAC 1-2 */ -# define STM32_NCRC 1 /* CRC1 */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F100VC) || defined(CONFIG_ARCH_CHIP_STM32F100VD) \ - || defined(CONFIG_ARCH_CHIP_STM32F100VE) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */ -// TODO: there are also 6 additional timers (12-17) that don't fit any existing category -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 0 /* No I2S */ -# define STM32_NUSART 5 /* USART1-5 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 0 /* No CAN */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 80 /* GPIOA-E */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 2 /* DAC 1-2 */ -# define STM32_NCRC 1 /* CRC1 */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32 F103 Medium Density Family *************************************************/ -/* STM32F103RB is in the Medium-density performance line and is provided in 64 pin - * packages with 128K Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces - */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F103RBT6) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 0 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 3 /* General timers TIM2,3,4 */ -# define STM32_NBTIM 0 /* Two basic timers TIM6 and TIM7 */ -# define STM32_NDMA 1 /* DMA1 */ -# define STM32_NSPI 2 /* SPI1-2 */ -# define STM32_NI2S 0 /* No I2S (?) */ -# define STM32_NUSART 3 /* USART1-3 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 1 /* bxCAN1 */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 51 /* GPIOA-E */ -# define STM32_NADC 2 /* ADC1-2 */ -# define STM32_NDAC 0 /* No DAC */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NTHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32 F103 High Density Family ***************************************************/ -/* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and - * differ only in the available FLASH and SRAM. - */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F103RET6) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and TIM8 */ -# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 2 /* Two basic timers TIM6 and TIM7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 0 /* No I2S (?) */ -# define STM32_NUSART 5 /* USART1-5 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 1 /* CAN1 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 51 /* GPIOA-D */ -# define STM32_NADC 2 /* ADC1-2 */ -# define STM32_NDAC 2 /* DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32F103VC, STM32F103VD, and STM32F103VE are all provided in 100 pin packages and differ - * only in the available FLASH and SRAM. - */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and TIM8 */ -# define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */ -# define STM32_NBTIM 2 /* Two basic timers TIM6 and TIM7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 0 /* No I2S (?) */ -# define STM32_NUSART 5 /* USART1-5 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 1 /* bxCAN1 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 80 /* GPIOA-E */ -# define STM32_NADC 3 /* ADC1-3 */ -# define STM32_NDAC 2 /* DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NTHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32F103ZC, STM32F103ZD, and STM32F103ZE are all provided in 144 pin packages and differ - * only in the available FLASH and SRAM. - */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 0 /* No basic timers */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 2 /* SPI1-2 */ -# define STM32_NI2S 0 /* No I2S (?) */ -# define STM32_NUSART 3 /* USART1-3 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 1 /* CAN1 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 112 /* GPIOA-G */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 0 /* No DAC */ -# define STM32_NCRC 0 /* No CRC */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32 F105/F107 Connectivity Line *******************************************************/ -#elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timers TIM1 */ -# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 5 /* USART1-3, UART 4-5 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 80 /* GPIOA-E */ -# define STM32_NADC 2 /* ADC1-2*/ -# define STM32_NDAC 2 /* DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 0 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F107VC) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timers TIM1 */ -# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 5 /* USART1-3, UART 4-5 */ -# define STM32_NI2C 1 /* I2C1 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 0 /* No SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 80 /* GPIOA-E */ -# define STM32_NADC 2 /* ADC1-2*/ -# define STM32_NDAC 2 /* DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -/* STM32 F2 Family ******************************************************************/ -#elif defined(CONFIG_ARCH_CHIP_STM32F207IG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# define CONFIG_STM32_STM32F20XX 1 /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 140 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -/* STM23 F4 Family ******************************************************************/ -#elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 0 /* No FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 16 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 0 /* No Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F405VG) /* LQFP 100 14x14x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 16 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 0 /* No Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F405ZG) /* LQFP 144 20x20x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 0 /* No Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407VE) /* LQFP-100 512Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 16 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407VG) /* LQFP-100 14x14x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 16 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407ZE) /* LQFP-144 512Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407ZG) /* LQFP 144 20x20x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407IE) /* LQFP 176 24x24x1.4 512Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 (?) */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F407IG) /* BGA 176; LQFP 176 24x24x1.4 1024Kb FLASH 192Kb SRAM */ -# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# define CONFIG_STM32_STM32F40XX 1 /* STM32F405xx and STM32407xx */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */ -# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA - * 32-bit general timers TIM2 and 5 with DMA */ -# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ -# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 3 /* SPI1-3 */ -# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ -# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */ -# define STM32_NI2C 3 /* I2C1-3 */ -# define STM32_NCAN 2 /* CAN1-2 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ -# define STM32_NGPIO 139 /* GPIOA-I */ -# define STM32_NADC 3 /* 12-bit ADC1-3, 24 channels */ -# define STM32_NDAC 2 /* 12-bit DAC1-2 */ -# define STM32_NCRC 1 /* CRC */ -# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ -# define STM32_NRNG 1 /* Random number generator (RNG) */ -# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ - -#else -# error "Unsupported STM32 chip" -#endif - -/* NVIC priority levels *************************************************************/ - -#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */ -#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ -#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ -#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */ - -#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP) -#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX - -#endif /* __ARCH_ARM_INCLUDE_STM32_CHIP_H */ - diff --git a/nuttx/arch/arm/include/stm32/irq.h b/nuttx/arch/arm/include/stm32/irq.h deleted file mode 100644 index 842183420..000000000 --- a/nuttx/arch/arm/include/stm32/irq.h +++ /dev/null @@ -1,117 +0,0 @@ -/************************************************************************************ - * arch/arm/include/stm32s/irq.h - * - * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/* This file should never be included directed but, rather, - * only indirectly through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_STM32_IRQ_H -#define __ARCH_ARM_INCLUDE_STM32_IRQ_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> -#include <nuttx/irq.h> -#include <arch/stm32/chip.h> - -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to - * bits in the NVIC. This does, however, waste several words of memory in the IRQ - * to handle mapping tables. - */ - -/* Processor Exceptions (vectors 0-15) */ - -#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */ - /* Vector 0: Reset stack pointer value */ - /* Vector 1: Reset (not handler as an IRQ) */ -#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ -#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ -#define STM32_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */ -#define STM32_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */ -#define STM32_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */ -#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */ -#define STM32_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */ - /* Vector 13: Reserved */ -#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ -#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */ - -/* External interrupts (vectors >= 16). These definitions are chip-specific */ - -#define STM32_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */ - -#if defined(CONFIG_STM32_STM32F10XX) -# include <arch/stm32/stm32f10xxx_irq.h> -#elif defined(CONFIG_STM32_STM32F20XX) -# include <arch/stm32/stm32f20xxx_irq.h> -#elif defined(CONFIG_STM32_STM32F40XX) -# include <arch/stm32/stm32f40xxx_irq.h> -#else -# error "Unsupported STM32 chip" -#endif - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_STM32_IRQ_H */ - diff --git a/nuttx/arch/arm/include/stm32/stm32f10xxx_irq.h b/nuttx/arch/arm/include/stm32/stm32f10xxx_irq.h deleted file mode 100644 index 7c3f7cf95..000000000 --- a/nuttx/arch/arm/include/stm32/stm32f10xxx_irq.h +++ /dev/null @@ -1,299 +0,0 @@ -/************************************************************************************ - * arch/arm/include/stm32s/stm32f10xxx_irq.h - * - * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/* This file should never be included directed but, rather, - * only indirectly through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_STM32F10XXX_IRQ_H -#define __ARCH_ARM_INCLUDE_STM32F10XXX_IRQ_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> -#include <nuttx/irq.h> - -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to - * bits in the NVIC. This does, however, waste several words of memory in the IRQ - * to handle mapping tables. - * - * Processor Exceptions (vectors 0-15). These common definitions can be found - * in nuttx/arch/arm/include/stm32/irq.h - * - * External interrupts (vectors >= 16) - */ - - /* Value line devices */ - -#if defined(CONFIG_STM32_VALUELINE) -# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */ -# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */ -# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */ -# define STM32_IRQ_RTC (19) /* 3: RTC Wakeup through EXTI line interrupt */ -# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */ -# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */ -# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */ -# define STM32_IRQ_EXTI1 (23) /* 7: EXTI Line 1 interrupt */ -# define STM32_IRQ_EXTI2 (24) /* 8: EXTI Line 2 interrupt */ -# define STM32_IRQ_EXTI3 (25) /* 9: EXTI Line 3 interrupt */ -# define STM32_IRQ_EXTI4 (26) /* 10: EXTI Line 4 interrupt */ -# define STM32_IRQ_DMA1CH1 (27) /* 11: DMA1 Channel 1 global interrupt */ -# define STM32_IRQ_DMA1CH2 (28) /* 12: DMA1 Channel 2 global interrupt */ -# define STM32_IRQ_DMA1CH3 (29) /* 13: DMA1 Channel 3 global interrupt */ -# define STM32_IRQ_DMA1CH4 (30) /* 14: DMA1 Channel 4 global interrupt */ -# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */ -# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 6 global interrupt */ -# define STM32_IRQ_DMA1CH7 (33) /* 17: DMA1 Channel 7 global interrupt */ -# define STM32_IRQ_ADC1 (34) /* 18: ADC1 global interrupt */ -# define STM32_IRQ_RESERVED0 (35) /* 19: Reserved 0 */ -# define STM32_IRQ_RESERVED1 (36) /* 20: Reserved 1 */ -# define STM32_IRQ_RESERVED2 (37) /* 21: Reserved 2 */ -# define STM32_IRQ_RESERVED3 (38) /* 22: Reserved 3 */ -# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */ -# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */ -# define STM32_IRQ_TIM15 (40) /* TIM15 global interrupt */ -# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */ -# define STM32_IRQ_TIM16 (41) /* TIM16 global interrupt */ -# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */ -# define STM32_IRQ_TIM17 (42) /* TIM17 global interrupt */ -# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */ -# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */ -# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */ -# define STM32_IRQ_TIM4 (46) /* 30: TIM4 global interrupt */ -# define STM32_IRQ_I2C1EV (47) /* 31: I2C1 event interrupt */ -# define STM32_IRQ_I2C1ER (48) /* 32: I2C1 error interrupt */ -# define STM32_IRQ_I2C2EV (49) /* 33: I2C2 event interrupt */ -# define STM32_IRQ_I2C2ER (50) /* 34: I2C2 error interrupt */ -# define STM32_IRQ_SPI1 (51) /* 35: SPI1 global interrupt */ -# define STM32_IRQ_SPI2 (52) /* 36: SPI2 global interrupt */ -# define STM32_IRQ_USART1 (53) /* 37: USART1 global interrupt */ -# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */ -# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */ -# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */ -# define STM32_IRQ_RTCALR (57) /* 41: RTC alarms (A and B) through EXTI line interrupt */ -# define STM32_IRQ_CEC (58) /* 42: CEC global interrupt */ -# define STM32_IRQ_TIM12 (59) /* 43: TIM12 global interrupt */ -# define STM32_IRQ_TIM13 (60) /* 44: TIM13 global interrupt */ -# define STM32_IRQ_TIM14 (61) /* 45: TIM14 global interrupt */ -# define STM32_IRQ_RESERVED4 (62) /* 46: Reserved 4 */ -# define STM32_IRQ_RESERVED5 (63) /* 47: Reserved 5 */ -# define STM32_IRQ_FSMC (64) /* 48: FSMC global interrupt */ -# define STM32_IRQ_RESERVED6 (65) /* 49: Reserved 6 */ -# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */ -# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */ -# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */ -# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */ -# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */ -# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */ -# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */ -# define STM32_IRQ_DMA2CH2 (73) /* 57: DMA2 Channel 2 global interrupt */ -# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */ -# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4 and 5 global interrupt */ -# define STM32_IRQ_DMA2CH5 (76) /* 60: DMA2 Channel 5 global interrupt */ -# define NR_IRQS (77) - -/* Connectivity Line Devices */ - -#elif defined(CONFIG_STM32_CONNECTIVITYLINE) -# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */ -# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */ -# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */ -# define STM32_IRQ_RTC (19) /* 3: RTC global interrupt */ -# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */ -# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */ -# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */ -# define STM32_IRQ_EXTI1 (23) /* 7: EXTI Line 1 interrupt */ -# define STM32_IRQ_EXTI2 (24) /* 8: EXTI Line 2 interrupt */ -# define STM32_IRQ_EXTI3 (25) /* 9: EXTI Line 3 interrupt */ -# define STM32_IRQ_EXTI4 (26) /* 10: EXTI Line 4 interrupt */ -# define STM32_IRQ_DMA1CH1 (27) /* 11: DMA1 Channel 1 global interrupt */ -# define STM32_IRQ_DMA1CH2 (28) /* 12: DMA1 Channel 2 global interrupt */ -# define STM32_IRQ_DMA1CH3 (29) /* 13: DMA1 Channel 3 global interrupt */ -# define STM32_IRQ_DMA1CH4 (30) /* 14: DMA1 Channel 4 global interrupt */ -# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */ -# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 6 global interrupt */ -# define STM32_IRQ_DMA1CH7 (33) /* 17: DMA1 Channel 7 global interrupt */ -# define STM32_IRQ_ADC12 (34) /* 18: ADC1 and ADC2 global interrupt */ -# define STM32_IRQ_CAN1TX (35) /* 19: CAN1 TX interrupts */ -# define STM32_IRQ_CAN1RX0 (36) /* 20: CAN1 RX0 interrupts */ -# define STM32_IRQ_CAN1RX1 (37) /* 21: CAN1 RX1 interrupt */ -# define STM32_IRQ_CAN1SCE (38) /* 22: CAN1 SCE interrupt */ -# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */ -# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */ -# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */ -# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */ -# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */ -# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */ -# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */ -# define STM32_IRQ_TIM4 (46) /* 30: TIM4 global interrupt */ -# define STM32_IRQ_I2C1EV (47) /* 31: I2C1 event interrupt */ -# define STM32_IRQ_I2C1ER (48) /* 32: I2C1 error interrupt */ -# define STM32_IRQ_I2C2EV (49) /* 33: I2C2 event interrupt */ -# define STM32_IRQ_I2C2ER (50) /* 34: I2C2 error interrupt */ -# define STM32_IRQ_SPI1 (51) /* 35: SPI1 global interrupt */ -# define STM32_IRQ_SPI2 (52) /* 36: SPI2 global interrupt */ -# define STM32_IRQ_USART1 (53) /* 37: USART1 global interrupt */ -# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */ -# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */ -# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */ -# define STM32_IRQ_RTCALRM (57) /* 41: RTC alarm through EXTI line interrupt */ -# define STM32_IRQ_OTGFSWKUP (58) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */ -# define STM32_IRQ_RESERVED0 (59) /* 43: Reserved 0 */ -# define STM32_IRQ_RESERVED1 (60) /* 44: Reserved 1 */ -# define STM32_IRQ_RESERVED2 (61) /* 45: Reserved 2 */ -# define STM32_IRQ_RESERVED3 (62) /* 46: Reserved 3 */ -# define STM32_IRQ_RESERVED4 (63) /* 47: Reserved 4 */ -# define STM32_IRQ_RESERVED5 (64) /* 48: Reserved 5 */ -# define STM32_IRQ_RESERVED6 (65) /* 49: Reserved 6 */ -# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */ -# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */ -# define STM32_IRQ_UART4 (68) /* 52: UART4 global interrupt */ -# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */ -# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */ -# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */ -# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */ -# define STM32_IRQ_DMA2CH2 (73) /* 57: DMA2 Channel 2 global interrupt */ -# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */ -# define STM32_IRQ_DMA2CH4 (75) /* 59: DMA2 Channel 4 global interrupt */ -# define STM32_IRQ_DMA2CH5 (76) /* 60: DMA2 Channel 5 global interrupt */ -# define STM32_IRQ_ETH (77) /* 61: Ethernet global interrupt */ -# define STM32_IRQ_ETHWKUP (78) /* 62: Ethernet Wakeup through EXTI line interrupt */ -# define STM32_IRQ_CAN2TX (79) /* 63: CAN2 TX interrupts */ -# define STM32_IRQ_CAN2RX0 (70) /* 64: CAN2 RX0 interrupts */ -# define STM32_IRQ_CAN2RX1 (81) /* 65: CAN2 RX1 interrupt */ -# define STM32_IRQ_CAN2SCE (82) /* 66: CAN2 SCE interrupt */ -# define STM32_IRQ_OTGFS (83) /* 67: USB On The Go FS global interrupt */ -# define NR_IRQS (84) - -/* Medium and High Density Devices */ - -#else -# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */ -# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */ -# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */ -# define STM32_IRQ_RTC (19) /* 3: RTC global interrupt */ -# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */ -# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */ -# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */ -# define STM32_IRQ_EXTI1 (23) /* 7: EXTI Line 1 interrupt */ -# define STM32_IRQ_EXTI2 (24) /* 8: EXTI Line 2 interrupt */ -# define STM32_IRQ_EXTI3 (25) /* 9: EXTI Line 3 interrupt */ -# define STM32_IRQ_EXTI4 (26) /* 10: EXTI Line 4 interrupt */ -# define STM32_IRQ_DMA1CH1 (27) /* 11: DMA1 Channel 1 global interrupt */ -# define STM32_IRQ_DMA1CH2 (28) /* 12: DMA1 Channel 2 global interrupt */ -# define STM32_IRQ_DMA1CH3 (29) /* 13: DMA1 Channel 3 global interrupt */ -# define STM32_IRQ_DMA1CH4 (30) /* 14: DMA1 Channel 4 global interrupt */ -# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */ -# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 6 global interrupt */ -# define STM32_IRQ_DMA1CH7 (33) /* 17: DMA1 Channel 7 global interrupt */ -# define STM32_IRQ_ADC12 (34) /* 18: ADC1 and ADC2 global interrupt */ -# define STM32_IRQ_USBHPCANTX (35) /* 19: USB High Priority or CAN TX interrupts*/ -# define STM32_IRQ_USBLPCANRX0 (36) /* 20: USB Low Priority or CAN RX0 interrupts*/ -# define STM32_IRQ_CAN1RX1 (37) /* 21: CAN1 RX1 interrupt */ -# define STM32_IRQ_CAN1SCE (38) /* 22: CAN1 SCE interrupt */ -# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */ -# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */ -# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */ -# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */ -# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */ -# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */ -# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */ -# define STM32_IRQ_TIM4 (46) /* 30: TIM4 global interrupt */ -# define STM32_IRQ_I2C1EV (47) /* 31: I2C1 event interrupt */ -# define STM32_IRQ_I2C1ER (48) /* 32: I2C1 error interrupt */ -# define STM32_IRQ_I2C2EV (49) /* 33: I2C2 event interrupt */ -# define STM32_IRQ_I2C2ER (50) /* 34: I2C2 error interrupt */ -# define STM32_IRQ_SPI1 (51) /* 35: SPI1 global interrupt */ -# define STM32_IRQ_SPI2 (52) /* 36: SPI2 global interrupt */ -# define STM32_IRQ_USART1 (53) /* 37: USART1 global interrupt */ -# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */ -# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */ -# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */ -# define STM32_IRQ_RTCALRM (57) /* 41: RTC alarm through EXTI line interrupt */ -# define STM32_IRQ_USBWKUP (58) /* 42: USB wakeup from suspend through EXTI line interrupt*/ -# define STM32_IRQ_TIM8BRK (59) /* 43: TIM8 Break interrupt */ -# define STM32_IRQ_TIM8UP (60) /* 44: TIM8 Update interrupt */ -# define STM32_IRQ_TIM8TRGCOM (61) /* 45: TIM8 Trigger and Commutation interrupts */ -# define STM32_IRQ_TIM8CC (62) /* 46: TIM8 Capture Compare interrupt */ -# define STM32_IRQ_ADC3 (63) /* 47: ADC3 global interrupt */ -# define STM32_IRQ_FSMC (64) /* 48: FSMC global interrupt */ -# define STM32_IRQ_SDIO (65) /* 49: SDIO global interrupt */ -# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */ -# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */ -# define STM32_IRQ_UART4 (68) /* 52: UART4 global interrupt */ -# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */ -# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */ -# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */ -# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */ -# define STM32_IRQ_DMA2CH2 (73) /* 57: DMA2 Channel 2 global interrupt */ -# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */ -# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4&5 global interrupt */ -# define NR_IRQS (76) -#endif - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_STM32F10XXX_IRQ_H */ - diff --git a/nuttx/arch/arm/include/stm32/stm32f20xxx_irq.h b/nuttx/arch/arm/include/stm32/stm32f20xxx_irq.h deleted file mode 100644 index d88c5d070..000000000 --- a/nuttx/arch/arm/include/stm32/stm32f20xxx_irq.h +++ /dev/null @@ -1,182 +0,0 @@ -/**************************************************************************************************** - * arch/arm/include/stm32s/stm32f20xxx_irq.h - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly through nuttx/irq.h */ - -#ifndef __ARCH_ARM_INCLUDE_STM32F20XXX_IRQ_H -#define __ARCH_ARM_INCLUDE_STM32F20XXX_IRQ_H - -/**************************************************************************************************** - * Included Files - ****************************************************************************************************/ - -#include <nuttx/config.h> -#include <nuttx/irq.h> - -/**************************************************************************************************** - * Definitions - ****************************************************************************************************/ - -/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to - * bits in the NVIC. This does, however, waste several words of memory in the IRQ - * to handle mapping tables. - * - * Processor Exceptions (vectors 0-15). These common definitions can be found - * in nuttx/arch/arm/include/stm32/irq.h - * - * External interrupts (vectors >= 16) - */ - -#define STM32_IRQ_WWDG (STM32_IRQ_INTERRUPTS+0) /* 0: Window Watchdog interrupt */ -#define STM32_IRQ_PVD (STM32_IRQ_INTERRUPTS+1) /* 1: PVD through EXTI Line detection interrupt */ -#define STM32_IRQ_TAMPER (STM32_IRQ_INTERRUPTS+2) /* 2: Tamper and time stamp interrupts */ -#define STM32_IRQ_TIMESTAMP (STM32_IRQ_INTERRUPTS+2) /* 2: Tamper and time stamp interrupts */ -#define STM32_IRQ_RTC_WKUP (STM32_IRQ_INTERRUPTS+3) /* 3: RTC global interrupt */ -#define STM32_IRQ_FLASH (STM32_IRQ_INTERRUPTS+4) /* 4: Flash global interrupt */ -#define STM32_IRQ_RCC (STM32_IRQ_INTERRUPTS+5) /* 5: RCC global interrupt */ -#define STM32_IRQ_EXTI0 (STM32_IRQ_INTERRUPTS+6) /* 6: EXTI Line 0 interrupt */ -#define STM32_IRQ_EXTI1 (STM32_IRQ_INTERRUPTS+7) /* 7: EXTI Line 1 interrupt */ -#define STM32_IRQ_EXTI2 (STM32_IRQ_INTERRUPTS+8) /* 8: EXTI Line 2 interrupt */ -#define STM32_IRQ_EXTI3 (STM32_IRQ_INTERRUPTS+9) /* 9: EXTI Line 3 interrupt */ -#define STM32_IRQ_EXTI4 (STM32_IRQ_INTERRUPTS+10) /* 10: EXTI Line 4 interrupt */ -#define STM32_IRQ_DMA1S0 (STM32_IRQ_INTERRUPTS+11) /* 11: DMA1 Stream 0 global interrupt */ -#define STM32_IRQ_DMA1S1 (STM32_IRQ_INTERRUPTS+12) /* 12: DMA1 Stream 1 global interrupt */ -#define STM32_IRQ_DMA1S2 (STM32_IRQ_INTERRUPTS+13) /* 13: DMA1 Stream 2 global interrupt */ -#define STM32_IRQ_DMA1S3 (STM32_IRQ_INTERRUPTS+14) /* 14: DMA1 Stream 3 global interrupt */ -#define STM32_IRQ_DMA1S4 (STM32_IRQ_INTERRUPTS+15) /* 15: DMA1 Stream 4 global interrupt */ -#define STM32_IRQ_DMA1S5 (STM32_IRQ_INTERRUPTS+16) /* 16: DMA1 Stream 5 global interrupt */ -#define STM32_IRQ_DMA1S6 (STM32_IRQ_INTERRUPTS+17) /* 17: DMA1 Stream 6 global interrupt */ -#define STM32_IRQ_ADC (STM32_IRQ_INTERRUPTS+18) /* 18: ADC1, ADC2, and ADC3 global interrupt */ -#define STM32_IRQ_CAN1TX (STM32_IRQ_INTERRUPTS+19) /* 19: CAN1 TX interrupts */ -#define STM32_IRQ_CAN1RX0 (STM32_IRQ_INTERRUPTS+20) /* 20: CAN1 RX0 interrupts */ -#define STM32_IRQ_CAN1RX1 (STM32_IRQ_INTERRUPTS+21) /* 21: CAN1 RX1 interrupt */ -#define STM32_IRQ_CAN1SCE (STM32_IRQ_INTERRUPTS+22) /* 22: CAN1 SCE interrupt */ -#define STM32_IRQ_EXTI95 (STM32_IRQ_INTERRUPTS+23) /* 23: EXTI Line[9:5] interrupts */ -#define STM32_IRQ_TIM1BRK (STM32_IRQ_INTERRUPTS+24) /* 24: TIM1 Break interrupt */ -#define STM32_IRQ_TIM9 (STM32_IRQ_INTERRUPTS+24) /* 24: TIM9 global interrupt */ -#define STM32_IRQ_TIM1UP (STM32_IRQ_INTERRUPTS+25) /* 25: TIM1 Update interrupt */ -#define STM32_IRQ_TIM10 (STM32_IRQ_INTERRUPTS+25) /* 25: TIM10 global interrupt */ -#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_INTERRUPTS+26) /* 26: TIM1 Trigger and Commutation interrupts */ -#define STM32_IRQ_TIM11 (STM32_IRQ_INTERRUPTS+26) /* 26: TIM11 global interrupt */ -#define STM32_IRQ_TIM1CC (STM32_IRQ_INTERRUPTS+27) /* 27: TIM1 Capture Compare interrupt */ -#define STM32_IRQ_TIM2 (STM32_IRQ_INTERRUPTS+28) /* 28: TIM2 global interrupt */ -#define STM32_IRQ_TIM3 (STM32_IRQ_INTERRUPTS+29) /* 29: TIM3 global interrupt */ -#define STM32_IRQ_TIM4 (STM32_IRQ_INTERRUPTS+30) /* 30: TIM4 global interrupt */ -#define STM32_IRQ_I2C1EV (STM32_IRQ_INTERRUPTS+31) /* 31: I2C1 event interrupt */ -#define STM32_IRQ_I2C1ER (STM32_IRQ_INTERRUPTS+32) /* 32: I2C1 error interrupt */ -#define STM32_IRQ_I2C2EV (STM32_IRQ_INTERRUPTS+33) /* 33: I2C2 event interrupt */ -#define STM32_IRQ_I2C2ER (STM32_IRQ_INTERRUPTS+34) /* 34: I2C2 error interrupt */ -#define STM32_IRQ_SPI1 (STM32_IRQ_INTERRUPTS+35) /* 35: SPI1 global interrupt */ -#define STM32_IRQ_SPI2 (STM32_IRQ_INTERRUPTS+36) /* 36: SPI2 global interrupt */ -#define STM32_IRQ_USART1 (STM32_IRQ_INTERRUPTS+37) /* 37: USART1 global interrupt */ -#define STM32_IRQ_USART2 (STM32_IRQ_INTERRUPTS+38) /* 38: USART2 global interrupt */ -#define STM32_IRQ_USART3 (STM32_IRQ_INTERRUPTS+39) /* 39: USART3 global interrupt */ -#define STM32_IRQ_EXTI1510 (STM32_IRQ_INTERRUPTS+40) /* 40: EXTI Line[15:10] interrupts */ -#define STM32_IRQ_RTCALRM (STM32_IRQ_INTERRUPTS+41) /* 41: RTC alarm through EXTI line interrupt */ -#define STM32_IRQ_OTGFSWKUP (STM32_IRQ_INTERRUPTS+42) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */ -#define STM32_IRQ_TIM8BRK (STM32_IRQ_INTERRUPTS+43) /* 43: TIM8 Break interrupt */ -#define STM32_IRQ_TIM12 (STM32_IRQ_INTERRUPTS+43) /* 43: TIM12 global interrupt */ -#define STM32_IRQ_TIM8UP (STM32_IRQ_INTERRUPTS+44) /* 44: TIM8 Update interrupt */ -#define STM32_IRQ_TIM13 (STM32_IRQ_INTERRUPTS+44) /* 44: TIM13 global interrupt */ -#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_INTERRUPTS+45) /* 45: TIM8 Trigger and Commutation interrupts */ -#define STM32_IRQ_TIM14 (STM32_IRQ_INTERRUPTS+45) /* 45: TIM14 global interrupt */ -#define STM32_IRQ_TIM8CC (STM32_IRQ_INTERRUPTS+46) /* 46: TIM8 Capture Compare interrupt */ -#define STM32_IRQ_DMA1S7 (STM32_IRQ_INTERRUPTS+47) /* 47: DMA1 Stream 7 global interrupt */ -#define STM32_IRQ_FSMC (STM32_IRQ_INTERRUPTS+48) /* 48: FSMC global interrupt */ -#define STM32_IRQ_SDIO (STM32_IRQ_INTERRUPTS+49) /* 49: SDIO global interrupt */ -#define STM32_IRQ_TIM5 (STM32_IRQ_INTERRUPTS+50) /* 50: TIM5 global interrupt */ -#define STM32_IRQ_SPI3 (STM32_IRQ_INTERRUPTS+51) /* 51: SPI3 global interrupt */ -#define STM32_IRQ_UART4 (STM32_IRQ_INTERRUPTS+52) /* 52: UART4 global interrupt */ -#define STM32_IRQ_UART5 (STM32_IRQ_INTERRUPTS+53) /* 53: UART5 global interrupt */ -#define STM32_IRQ_TIM6 (STM32_IRQ_INTERRUPTS+54) /* 54: TIM6 global interrupt */ -#define STM32_IRQ_DAC (STM32_IRQ_INTERRUPTS+54) /* 54: DAC1 and DAC2 underrun error interrupts */ -#define STM32_IRQ_TIM7 (STM32_IRQ_INTERRUPTS+55) /* 55: TIM7 global interrupt */ -#define STM32_IRQ_DMA2S0 (STM32_IRQ_INTERRUPTS+56) /* 56: DMA2 Stream 0 global interrupt */ -#define STM32_IRQ_DMA2S1 (STM32_IRQ_INTERRUPTS+57) /* 57: DMA2 Stream 1 global interrupt */ -#define STM32_IRQ_DMA2S2 (STM32_IRQ_INTERRUPTS+58) /* 58: DMA2 Stream 2 global interrupt */ -#define STM32_IRQ_DMA2S3 (STM32_IRQ_INTERRUPTS+59) /* 59: DMA2 Stream 3 global interrupt */ -#define STM32_IRQ_DMA2S4 (STM32_IRQ_INTERRUPTS+60) /* 60: DMA2 Stream 4 global interrupt */ -#define STM32_IRQ_ETH (STM32_IRQ_INTERRUPTS+61) /* 61: Ethernet global interrupt */ -#define STM32_IRQ_ETHWKUP (STM32_IRQ_INTERRUPTS+62) /* 62: Ethernet Wakeup through EXTI line interrupt */ -#define STM32_IRQ_CAN2TX (STM32_IRQ_INTERRUPTS+63) /* 63: CAN2 TX interrupts */ -#define STM32_IRQ_CAN2RX0 (STM32_IRQ_INTERRUPTS+64) /* 64: CAN2 RX0 interrupts */ -#define STM32_IRQ_CAN2RX1 (STM32_IRQ_INTERRUPTS+65) /* 65: CAN2 RX1 interrupt */ -#define STM32_IRQ_CAN2SCE (STM32_IRQ_INTERRUPTS+66) /* 66: CAN2 SCE interrupt */ -#define STM32_IRQ_OTGFS (STM32_IRQ_INTERRUPTS+67) /* 67: USB On The Go FS global interrupt */ -#define STM32_IRQ_DMA2S5 (STM32_IRQ_INTERRUPTS+68) /* 68: DMA2 Stream 5 global interrupt */ -#define STM32_IRQ_DMA2S6 (STM32_IRQ_INTERRUPTS+69) /* 69: DMA2 Stream 6 global interrupt */ -#define STM32_IRQ_DMA2S7 (STM32_IRQ_INTERRUPTS+70) /* 70: DMA2 Stream 7 global interrupt */ -#define STM32_IRQ_USART6 (STM32_IRQ_INTERRUPTS+71) /* 71: USART6 global interrupt */ -#define STM32_IRQ_I2C3EV (STM32_IRQ_INTERRUPTS+72) /* 72: I2C3 event interrupt */ -#define STM32_IRQ_I2C3ER (STM32_IRQ_INTERRUPTS+73) /* 73: I2C3 error interrupt */ -#define STM32_IRQ_OTGHSEP1OUT (STM32_IRQ_INTERRUPTS+74) /* 74: USB On The Go HS End Point 1 Out global interrupt */ -#define STM32_IRQ_OTGHSEP1IN (STM32_IRQ_INTERRUPTS+75) /* 75: USB On The Go HS End Point 1 In global interrupt */ -#define STM32_IRQ_OTGHSWKUP (STM32_IRQ_INTERRUPTS+76) /* 76: USB On The Go HS Wakeup through EXTI interrupt */ -#define STM32_IRQ_OTGHS (STM32_IRQ_INTERRUPTS+77) /* 77: USB On The Go HS global interrupt */ -#define STM32_IRQ_DCMI (STM32_IRQ_INTERRUPTS+78) /* 78: DCMI global interrupt */ -#define STM32_IRQ_CRYP (STM32_IRQ_INTERRUPTS+79) /* 79: CRYP crypto global interrupt */ -#define STM32_IRQ_HASH (STM32_IRQ_INTERRUPTS+80) /* 80: Hash and Rng global interrupt */ -#define STM32_IRQ_RNG (STM32_IRQ_INTERRUPTS+80) /* 80: Hash and Rng global interrupt */ - -#define NR_IRQS (STM32_IRQ_INTERRUPTS+81) - -/**************************************************************************************************** - * Public Types - ****************************************************************************************************/ - -/**************************************************************************************************** - * Public Data -****************************************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/**************************************************************************************************** - * Public Functions - ****************************************************************************************************/ - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_STM32F40XXX_IRQ_H */ - diff --git a/nuttx/arch/arm/include/stm32/stm32f40xxx_irq.h b/nuttx/arch/arm/include/stm32/stm32f40xxx_irq.h deleted file mode 100644 index cd97b9c9d..000000000 --- a/nuttx/arch/arm/include/stm32/stm32f40xxx_irq.h +++ /dev/null @@ -1,185 +0,0 @@ -/**************************************************************************************************** - * arch/arm/include/stm32s/stm32f40xxx_irq.h - * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************************************/ - -/* This file should never be included directed but, rather, - * only indirectly through nuttx/irq.h - */ - -#ifndef __ARCH_ARM_INCLUDE_STM32F40XXX_IRQ_H -#define __ARCH_ARM_INCLUDE_STM32F40XXX_IRQ_H - -/**************************************************************************************************** - * Included Files - ****************************************************************************************************/ - -#include <nuttx/config.h> -#include <nuttx/irq.h> - -/**************************************************************************************************** - * Definitions - ****************************************************************************************************/ - -/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to - * bits in the NVIC. This does, however, waste several words of memory in the IRQ - * to handle mapping tables. - * - * Processor Exceptions (vectors 0-15). These common definitions can be found - * in nuttx/arch/arm/include/stm32/irq.h - * - * External interrupts (vectors >= 16) - */ - -#define STM32_IRQ_WWDG (STM32_IRQ_INTERRUPTS+0) /* 0: Window Watchdog interrupt */ -#define STM32_IRQ_PVD (STM32_IRQ_INTERRUPTS+1) /* 1: PVD through EXTI Line detection interrupt */ -#define STM32_IRQ_TAMPER (STM32_IRQ_INTERRUPTS+2) /* 2: Tamper and time stamp interrupts */ -#define STM32_IRQ_TIMESTAMP (STM32_IRQ_INTERRUPTS+2) /* 2: Tamper and time stamp interrupts */ -#define STM32_IRQ_RTC_WKUP (STM32_IRQ_INTERRUPTS+3) /* 3: RTC global interrupt */ -#define STM32_IRQ_FLASH (STM32_IRQ_INTERRUPTS+4) /* 4: Flash global interrupt */ -#define STM32_IRQ_RCC (STM32_IRQ_INTERRUPTS+5) /* 5: RCC global interrupt */ -#define STM32_IRQ_EXTI0 (STM32_IRQ_INTERRUPTS+6) /* 6: EXTI Line 0 interrupt */ -#define STM32_IRQ_EXTI1 (STM32_IRQ_INTERRUPTS+7) /* 7: EXTI Line 1 interrupt */ -#define STM32_IRQ_EXTI2 (STM32_IRQ_INTERRUPTS+8) /* 8: EXTI Line 2 interrupt */ -#define STM32_IRQ_EXTI3 (STM32_IRQ_INTERRUPTS+9) /* 9: EXTI Line 3 interrupt */ -#define STM32_IRQ_EXTI4 (STM32_IRQ_INTERRUPTS+10) /* 10: EXTI Line 4 interrupt */ -#define STM32_IRQ_DMA1S0 (STM32_IRQ_INTERRUPTS+11) /* 11: DMA1 Stream 0 global interrupt */ -#define STM32_IRQ_DMA1S1 (STM32_IRQ_INTERRUPTS+12) /* 12: DMA1 Stream 1 global interrupt */ -#define STM32_IRQ_DMA1S2 (STM32_IRQ_INTERRUPTS+13) /* 13: DMA1 Stream 2 global interrupt */ -#define STM32_IRQ_DMA1S3 (STM32_IRQ_INTERRUPTS+14) /* 14: DMA1 Stream 3 global interrupt */ -#define STM32_IRQ_DMA1S4 (STM32_IRQ_INTERRUPTS+15) /* 15: DMA1 Stream 4 global interrupt */ -#define STM32_IRQ_DMA1S5 (STM32_IRQ_INTERRUPTS+16) /* 16: DMA1 Stream 5 global interrupt */ -#define STM32_IRQ_DMA1S6 (STM32_IRQ_INTERRUPTS+17) /* 17: DMA1 Stream 6 global interrupt */ -#define STM32_IRQ_ADC (STM32_IRQ_INTERRUPTS+18) /* 18: ADC1, ADC2, and ADC3 global interrupt */ -#define STM32_IRQ_CAN1TX (STM32_IRQ_INTERRUPTS+19) /* 19: CAN1 TX interrupts */ -#define STM32_IRQ_CAN1RX0 (STM32_IRQ_INTERRUPTS+20) /* 20: CAN1 RX0 interrupts */ -#define STM32_IRQ_CAN1RX1 (STM32_IRQ_INTERRUPTS+21) /* 21: CAN1 RX1 interrupt */ -#define STM32_IRQ_CAN1SCE (STM32_IRQ_INTERRUPTS+22) /* 22: CAN1 SCE interrupt */ -#define STM32_IRQ_EXTI95 (STM32_IRQ_INTERRUPTS+23) /* 23: EXTI Line[9:5] interrupts */ -#define STM32_IRQ_TIM1BRK (STM32_IRQ_INTERRUPTS+24) /* 24: TIM1 Break interrupt */ -#define STM32_IRQ_TIM9 (STM32_IRQ_INTERRUPTS+24) /* 24: TIM9 global interrupt */ -#define STM32_IRQ_TIM1UP (STM32_IRQ_INTERRUPTS+25) /* 25: TIM1 Update interrupt */ -#define STM32_IRQ_TIM10 (STM32_IRQ_INTERRUPTS+25) /* 25: TIM10 global interrupt */ -#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_INTERRUPTS+26) /* 26: TIM1 Trigger and Commutation interrupts */ -#define STM32_IRQ_TIM11 (STM32_IRQ_INTERRUPTS+26) /* 26: TIM11 global interrupt */ -#define STM32_IRQ_TIM1CC (STM32_IRQ_INTERRUPTS+27) /* 27: TIM1 Capture Compare interrupt */ -#define STM32_IRQ_TIM2 (STM32_IRQ_INTERRUPTS+28) /* 28: TIM2 global interrupt */ -#define STM32_IRQ_TIM3 (STM32_IRQ_INTERRUPTS+29) /* 29: TIM3 global interrupt */ -#define STM32_IRQ_TIM4 (STM32_IRQ_INTERRUPTS+30) /* 30: TIM4 global interrupt */ -#define STM32_IRQ_I2C1EV (STM32_IRQ_INTERRUPTS+31) /* 31: I2C1 event interrupt */ -#define STM32_IRQ_I2C1ER (STM32_IRQ_INTERRUPTS+32) /* 32: I2C1 error interrupt */ -#define STM32_IRQ_I2C2EV (STM32_IRQ_INTERRUPTS+33) /* 33: I2C2 event interrupt */ -#define STM32_IRQ_I2C2ER (STM32_IRQ_INTERRUPTS+34) /* 34: I2C2 error interrupt */ -#define STM32_IRQ_SPI1 (STM32_IRQ_INTERRUPTS+35) /* 35: SPI1 global interrupt */ -#define STM32_IRQ_SPI2 (STM32_IRQ_INTERRUPTS+36) /* 36: SPI2 global interrupt */ -#define STM32_IRQ_USART1 (STM32_IRQ_INTERRUPTS+37) /* 37: USART1 global interrupt */ -#define STM32_IRQ_USART2 (STM32_IRQ_INTERRUPTS+38) /* 38: USART2 global interrupt */ -#define STM32_IRQ_USART3 (STM32_IRQ_INTERRUPTS+39) /* 39: USART3 global interrupt */ -#define STM32_IRQ_EXTI1510 (STM32_IRQ_INTERRUPTS+40) /* 40: EXTI Line[15:10] interrupts */ -#define STM32_IRQ_RTCALRM (STM32_IRQ_INTERRUPTS+41) /* 41: RTC alarm through EXTI line interrupt */ -#define STM32_IRQ_OTGFSWKUP (STM32_IRQ_INTERRUPTS+42) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */ -#define STM32_IRQ_TIM8BRK (STM32_IRQ_INTERRUPTS+43) /* 43: TIM8 Break interrupt */ -#define STM32_IRQ_TIM12 (STM32_IRQ_INTERRUPTS+43) /* 43: TIM12 global interrupt */ -#define STM32_IRQ_TIM8UP (STM32_IRQ_INTERRUPTS+44) /* 44: TIM8 Update interrupt */ -#define STM32_IRQ_TIM13 (STM32_IRQ_INTERRUPTS+44) /* 44: TIM13 global interrupt */ -#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_INTERRUPTS+45) /* 45: TIM8 Trigger and Commutation interrupts */ -#define STM32_IRQ_TIM14 (STM32_IRQ_INTERRUPTS+45) /* 45: TIM14 global interrupt */ -#define STM32_IRQ_TIM8CC (STM32_IRQ_INTERRUPTS+46) /* 46: TIM8 Capture Compare interrupt */ -#define STM32_IRQ_DMA1S7 (STM32_IRQ_INTERRUPTS+47) /* 47: DMA1 Stream 7 global interrupt */ -#define STM32_IRQ_FSMC (STM32_IRQ_INTERRUPTS+48) /* 48: FSMC global interrupt */ -#define STM32_IRQ_SDIO (STM32_IRQ_INTERRUPTS+49) /* 49: SDIO global interrupt */ -#define STM32_IRQ_TIM5 (STM32_IRQ_INTERRUPTS+50) /* 50: TIM5 global interrupt */ -#define STM32_IRQ_SPI3 (STM32_IRQ_INTERRUPTS+51) /* 51: SPI3 global interrupt */ -#define STM32_IRQ_UART4 (STM32_IRQ_INTERRUPTS+52) /* 52: UART4 global interrupt */ -#define STM32_IRQ_UART5 (STM32_IRQ_INTERRUPTS+53) /* 53: UART5 global interrupt */ -#define STM32_IRQ_TIM6 (STM32_IRQ_INTERRUPTS+54) /* 54: TIM6 global interrupt */ -#define STM32_IRQ_DAC (STM32_IRQ_INTERRUPTS+54) /* 54: DAC1 and DAC2 underrun error interrupts */ -#define STM32_IRQ_TIM7 (STM32_IRQ_INTERRUPTS+55) /* 55: TIM7 global interrupt */ -#define STM32_IRQ_DMA2S0 (STM32_IRQ_INTERRUPTS+56) /* 56: DMA2 Stream 0 global interrupt */ -#define STM32_IRQ_DMA2S1 (STM32_IRQ_INTERRUPTS+57) /* 57: DMA2 Stream 1 global interrupt */ -#define STM32_IRQ_DMA2S2 (STM32_IRQ_INTERRUPTS+58) /* 58: DMA2 Stream 2 global interrupt */ -#define STM32_IRQ_DMA2S3 (STM32_IRQ_INTERRUPTS+59) /* 59: DMA2 Stream 3 global interrupt */ -#define STM32_IRQ_DMA2S4 (STM32_IRQ_INTERRUPTS+60) /* 60: DMA2 Stream 4 global interrupt */ -#define STM32_IRQ_ETH (STM32_IRQ_INTERRUPTS+61) /* 61: Ethernet global interrupt */ -#define STM32_IRQ_ETHWKUP (STM32_IRQ_INTERRUPTS+62) /* 62: Ethernet Wakeup through EXTI line interrupt */ -#define STM32_IRQ_CAN2TX (STM32_IRQ_INTERRUPTS+63) /* 63: CAN2 TX interrupts */ -#define STM32_IRQ_CAN2RX0 (STM32_IRQ_INTERRUPTS+64) /* 64: CAN2 RX0 interrupts */ -#define STM32_IRQ_CAN2RX1 (STM32_IRQ_INTERRUPTS+65) /* 65: CAN2 RX1 interrupt */ -#define STM32_IRQ_CAN2SCE (STM32_IRQ_INTERRUPTS+66) /* 66: CAN2 SCE interrupt */ -#define STM32_IRQ_OTGFS (STM32_IRQ_INTERRUPTS+67) /* 67: USB On The Go FS global interrupt */ -#define STM32_IRQ_DMA2S5 (STM32_IRQ_INTERRUPTS+68) /* 68: DMA2 Stream 5 global interrupt */ -#define STM32_IRQ_DMA2S6 (STM32_IRQ_INTERRUPTS+69) /* 69: DMA2 Stream 6 global interrupt */ -#define STM32_IRQ_DMA2S7 (STM32_IRQ_INTERRUPTS+70) /* 70: DMA2 Stream 7 global interrupt */ -#define STM32_IRQ_USART6 (STM32_IRQ_INTERRUPTS+71) /* 71: USART6 global interrupt */ -#define STM32_IRQ_I2C3EV (STM32_IRQ_INTERRUPTS+72) /* 72: I2C3 event interrupt */ -#define STM32_IRQ_I2C3ER (STM32_IRQ_INTERRUPTS+73) /* 73: I2C3 error interrupt */ -#define STM32_IRQ_OTGHSEP1OUT (STM32_IRQ_INTERRUPTS+74) /* 74: USB On The Go HS End Point 1 Out global interrupt */ -#define STM32_IRQ_OTGHSEP1IN (STM32_IRQ_INTERRUPTS+75) /* 75: USB On The Go HS End Point 1 In global interrupt */ -#define STM32_IRQ_OTGHSWKUP (STM32_IRQ_INTERRUPTS+76) /* 76: USB On The Go HS Wakeup through EXTI interrupt */ -#define STM32_IRQ_OTGHS (STM32_IRQ_INTERRUPTS+77) /* 77: USB On The Go HS global interrupt */ -#define STM32_IRQ_DCMI (STM32_IRQ_INTERRUPTS+78) /* 78: DCMI global interrupt */ -#define STM32_IRQ_CRYP (STM32_IRQ_INTERRUPTS+79) /* 79: CRYP crypto global interrupt */ -#define STM32_IRQ_HASH (STM32_IRQ_INTERRUPTS+80) /* 80: Hash and Rng global interrupt */ -#define STM32_IRQ_RNG (STM32_IRQ_INTERRUPTS+80) /* 80: Hash and Rng global interrupt */ -#define STM32_IRQ_FPU (STM32_IRQ_INTERRUPTS+81) /* 81: FPU global interrupt */ - -#define NR_IRQS (STM32_IRQ_INTERRUPTS+82) - -/**************************************************************************************************** - * Public Types - ****************************************************************************************************/ - -/**************************************************************************************************** - * Public Data - ****************************************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/**************************************************************************************************** - * Public Functions - ****************************************************************************************************/ - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_STM32F40XXX_IRQ_H */ - diff --git a/nuttx/arch/arm/include/syscall.h b/nuttx/arch/arm/include/syscall.h deleted file mode 100644 index 8b438200a..000000000 --- a/nuttx/arch/arm/include/syscall.h +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************** - * arch/arm/include/syscall.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through include/syscall.h or include/sys/sycall.h - */ - -#ifndef __ARCH_ARM_INCLUDE_SYSCALL_H -#define __ARCH_ARM_INCLUDE_SYSCALL_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -/* Include ARM architecture-specific syscall macros */ - -#if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) -# include <arch/armv7-m/syscall.h> -#else -# include <arch/arm/syscall.h> -#endif - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Inline functions - ****************************************************************************/ - -/**************************************************************************** - * Public Variables - ****************************************************************************/ - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -#ifndef __ASSEMBLY__ -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -#undef EXTERN -#ifdef __cplusplus -} -#endif -#endif - -#endif /* __ARCH_ARM_INCLUDE_SYSCALL_H */ - diff --git a/nuttx/arch/arm/include/types.h b/nuttx/arch/arm/include/types.h deleted file mode 100644 index 1d2ea4cfe..000000000 --- a/nuttx/arch/arm/include/types.h +++ /dev/null @@ -1,107 +0,0 @@ -/**************************************************************************** - * arch/arm/include/types.h - * - * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* This file should never be included directed but, rather, only indirectly - * through sys/types.h - */ - -#ifndef __ARCH_ARM_INCLUDE_TYPES_H -#define __ARCH_ARM_INCLUDE_TYPES_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/**************************************************************************** - * Type Declarations - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* These are the sizes of the standard integer types. NOTE that these type - * names have a leading underscore character. This file will be included - * (indirectly) by include/stdint.h and typedef'ed to the final name without - * the underscore character. This roundabout way of doings things allows - * the stdint.h to be removed from the include/ directory in the event that - * the user prefers to use the definitions provided by their toolchain header - * files - */ - -typedef signed char _int8_t; -typedef unsigned char _uint8_t; - -typedef signed short _int16_t; -typedef unsigned short _uint16_t; - -typedef signed int _int32_t; -typedef unsigned int _uint32_t; - -typedef signed long long _int64_t; -typedef unsigned long long _uint64_t; -#define __INT64_DEFINED - -/* A pointer is 4 bytes */ - -typedef signed int _intptr_t; -typedef unsigned int _uintptr_t; - -/* This is the size of the interrupt state save returned by irqsave(). For - * ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the 16-bit - * primask register value is returned, - */ - -#ifdef __thumb2__ -#ifdef CONFIG_ARMV7M_USEBASEPRI -typedef unsigned char irqstate_t; -#else -typedef unsigned short irqstate_t; -#endif -#else /* __thumb2__ */ -typedef unsigned int irqstate_t; -#endif /* __thumb2__ */ - -#endif /* __ASSEMBLY__ */ - -/**************************************************************************** - * Global Function Prototypes - ****************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_TYPES_H */ diff --git a/nuttx/arch/arm/include/watchdog.h b/nuttx/arch/arm/include/watchdog.h deleted file mode 100644 index 43fbac2be..000000000 --- a/nuttx/arch/arm/include/watchdog.h +++ /dev/null @@ -1,61 +0,0 @@ -/**************************************************************************** - * arch/arm/include/watchdog.h - * - * Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_INCLUDE_WATCHDOG_H -#define __ARCH_ARM_INCLUDE_WATCHDOG_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/fs/ioctl.h> - -/**************************************************************************** - * Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -#endif /* __ARCH_ARM_INCLUDE_WATCHDOG_H */ |