diff options
Diffstat (limited to 'nuttx/arch/arm/src/armv7-m')
32 files changed, 0 insertions, 6298 deletions
diff --git a/nuttx/arch/arm/src/armv7-m/Kconfig b/nuttx/arch/arm/src/armv7-m/Kconfig deleted file mode 100644 index a154a4c5c..000000000 --- a/nuttx/arch/arm/src/armv7-m/Kconfig +++ /dev/null @@ -1,59 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see misc/tools/kconfig-language.txt. -# - -comment "ARMV7M Configuration Options" - -choice - prompt "Toolchain Selection" - default ARMV7M_TOOLCHAIN_CODESOURCERYW if HOST_WINDOWS - default ARMV7M_TOOLCHAIN_GNU_EABI if !HOST_WINDOWS - -config ARMV7M_TOOLCHAIN_ATOLLIC - bool "Atollic Lite/Pro for Windows" - depends on HOST_WINDOWS - -config ARMV7M_TOOLCHAIN_BUILDROOT - bool "Buildroot (Cygwin or Linux)" - depends on !WINDOWS_NATIVE - -config ARMV7M_TOOLCHAIN_CODEREDL - bool "CodeRed for Linux" - depends on HOST_LINUX - -config ARMV7M_TOOLCHAIN_CODEREDW - bool "CodeRed for Windows" - depends on HOST_WINDOWS - -config ARMV7M_TOOLCHAIN_CODESOURCERYL - bool "CodeSourcery GNU toolchain under Linux" - depends on HOST_LINUX - -config ARMV7M_TOOLCHAIN_CODESOURCERYW - bool "CodeSourcery GNU toolchain under Windows" - depends on HOST_WINDOWS - -config ARMV7M_TOOLCHAIN_DEVKITARM - bool "devkitARM GNU toolchain" - depends on HOST_WINDOWS - -config ARMV7M_TOOLCHAIN_GNU_EABI - bool "Generic GNU EABI toolchain" - ---help--- - This option should work for any modern GNU toolchain (GCC 4.5 or newer) - configured for arm-none-eabi. - -config ARMV7M_TOOLCHAIN_RAISONANCE - bool "STMicro Raisonance for Windows" - depends on HOST_WINDOWS - -endchoice - -config ARMV7M_OABI_TOOLCHAIN - bool "OABI (vs EABI)" - default y - depends on ARMV7M_TOOLCHAIN_BUILDROOT - ---help--- - Most of the older buildroot toolchains are OABI and are named arm-nuttx-elf- vs. arm-nuttx-eabi- - diff --git a/nuttx/arch/arm/src/armv7-m/Toolchain.defs b/nuttx/arch/arm/src/armv7-m/Toolchain.defs deleted file mode 100644 index 4de5b49f4..000000000 --- a/nuttx/arch/arm/src/armv7-m/Toolchain.defs +++ /dev/null @@ -1,267 +0,0 @@ -############################################################################ -# arch/arm/src/armv7-m/Toolchain.defs -# -# Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <gnutt@nuttx.org> -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -############################################################################ - -# Setup for the selected toolchain - -# -# Handle old-style chip-specific toolchain names in the absence of -# a new-style toolchain specification, force the selection of a single -# toolchain and allow the selected toolchain to be overridden by a -# command-line selection. -# - -ifeq ($(filter y, \ - $(CONFIG_LPC43_ATOLLIC_LITE) \ - $(CONFIG_STM32_ATOLLIC_LITE) \ - $(CONFIG_LPC43_ATOLLIC_PRO) \ - $(CONFIG_STM32_ATOLLIC_PRO) \ - $(CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= ATOLLIC -endif -ifeq ($(filter y, \ - $(CONFIG_KINETIS_BUILDROOT) \ - $(CONFIG_LM_BUILDROOT) \ - $(CONFIG_LPC17_BUILDROOT) \ - $(CONFIG_LPC43_BUILDROOT) \ - $(CONFIG_SAM3U_BUILDROOT) \ - $(CONFIG_STM32_BUILDROOT) \ - $(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= BUILDROOT -endif -ifeq ($(filter y, \ - $(CONFIG_LPC17_CODEREDL) \ - $(CONFIG_ARMV7M_TOOLCHAIN_CODEREDL) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= CODEREDL -endif -ifeq ($(filter y, \ - $(CONFIG_LPC17_CODEREDW) \ - $(CONFIG_LPC43_CODEREDW) \ - $(CONFIG_ARMV7M_TOOLCHAIN_CODEREDW) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= CODEREDW -endif -ifeq ($(filter y, \ - $(CONFIG_KINETIS_CODESOURCERYL) \ - $(CONFIG_LM_CODESOURCERYL) \ - $(CONFIG_LPC17_CODESOURCERYL) \ - $(CONFIG_LPC43_CODESOURCERYL) \ - $(CONFIG_SAM3U_CODESOURCERYL) \ - $(CONFIG_STM32_CODESOURCERYL) \ - $(CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= CODESOURCERYL -endif -ifeq ($(filter y, \ - $(CONFIG_KINETIS_CODESOURCERYW) \ - $(CONFIG_LM_CODESOURCERYW) \ - $(CONFIG_LPC17_CODESOURCERYW) \ - $(CONFIG_LPC43_CODESOURCERYW) \ - $(CONFIG_SAM3U_CODESOURCERYW) \ - $(CONFIG_STM32_CODESOURCERYW) \ - $(CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= CODESOURCERYW -endif -ifeq ($(filter y, \ - $(CONFIG_KINETIS_DEVKITARM) \ - $(CONFIG_LM_DEVKITARM) \ - $(CONFIG_LPC17_DEVKITARM) \ - $(CONFIG_LPC43_DEVKITARM) \ - $(CONFIG_SAM3U_DEVKITARM) \ - $(CONFIG_STM32_DEVKITARM) \ - $(CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= DEVKITARM -endif -ifeq ($(filter y, \ - $(CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= GNU_EABI -endif -ifeq ($(filter y, \ - $(CONFIG_STM32_RAISONANCE) \ - $(CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE) \ - ),y) - CONFIG_ARMV7M_TOOLCHAIN ?= RAISONANCE -endif - -# -# Supported toolchains -# -# TODO - It's likely that all of these toolchains now support the -# CortexM4. Since they are all GCC-based, we could almost -# certainly simplify this further. -# -# Each toolchain definition should set: -# -# CROSSDEV The GNU toolchain triple (command prefix) -# ARCROSSDEV If required, an alternative prefix used when -# invoking ar and nm. -# ARCHCPUFLAGS CPU-specific flags selecting the instruction set -# FPU options, etc. -# MAXOPTIMIZATION The maximum optimization level that results in -# reliable code generation. -# - -# Atollic toolchain under Windows - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),ATOLLIC) - CROSSDEV ?= arm-atollic-eabi- - ARCROSSDEV ?= arm-atollic-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ifeq ($(CONFIG_ARCH_CORTEXM4),y) - ifeq ($(CONFIG_ARCH_FPU),y) - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard - else - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfloat-abi=soft - endif - else ifeq ($(CONFIG_ARCH_CORTEXM3),y) - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft - endif -endif - -# NuttX buildroot under Linux or Cygwin - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),BUILDROOT) -ifeq ($(CONFIG_ARMV7M_OABI_TOOLCHAIN),y) - CROSSDEV ?= arm-nuttx-elf- - ARCROSSDEV ?= arm-nuttx-elf- - ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft -else - CROSSDEV ?= arm-nuttx-eabi- - ARCROSSDEV ?= arm-nuttx-eabi- - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -endif - MAXOPTIMIZATION = -Os -endif - -# Code Red RedSuite under Linux - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),CODEREDL) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ifeq ($(CONFIG_ARCH_CORTEXM4),y) - ifeq ($(CONFIG_ARCH_FPU),y) - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard - else - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfloat-abi=soft - endif - else ifeq ($(CONFIG_ARCH_CORTEXM3),y) - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft - endif -endif - -# Code Red RedSuite under Windows - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),CODEREDW) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ifeq ($(CONFIG_ARCH_CORTEXM4),y) - ifeq ($(CONFIG_ARCH_FPU),y) - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard - else - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfloat-abi=soft - endif - else ifeq ($(CONFIG_ARCH_CORTEXM3),y) - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft - endif -endif - -# CodeSourcery under Linux - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),CODESOURCERYL) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft - MAXOPTIMIZATION = -O2 -endif - -# CodeSourcery under Windows - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),CODESOURCERYW) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -endif - -# devkitARM under Windows - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),DEVKITARM) - CROSSDEV ?= arm-eabi- - ARCROSSDEV ?= arm-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -endif - -# Generic GNU EABI toolchain on OS X, Linux or any typical Posix system - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),GNU_EABI) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - MAXOPTIMIZATION = -O3 - ifeq ($(CONFIG_ARCH_CORTEXM4),y) - ifeq ($(CONFIG_ARCH_FPU),y) - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard - else - ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfloat-abi=soft - endif - else ifeq ($(CONFIG_ARCH_CORTEXM3),y) - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft - endif -endif - -# Raisonance RIDE7 under Windows - -ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),RAISONANCE) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -endif diff --git a/nuttx/arch/arm/src/armv7-m/exc_return.h b/nuttx/arch/arm/src/armv7-m/exc_return.h deleted file mode 100644 index cffbd3e2e..000000000 --- a/nuttx/arch/arm/src/armv7-m/exc_return.h +++ /dev/null @@ -1,117 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/exc_return.h - * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H -#define __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* The processor saves an EXC_RETURN value to the LR on exception entry. The - * exception mechanism relies on this value to detect when the processor has - * completed an exception handler. - * - * Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a - * value matching this pattern to the PC it detects that the operation is a not - * a normal branch operation and instead, that the exception is complete. - * Therefore, it starts the exception return sequence. - * - * Bits[4:0] of the EXC_RETURN value indicate the required return stack and eventual - * processor mode. The remaining bits of the EXC_RETURN value should be set to 1. - */ - -/* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */ - -#define EXC_RETURN_BASE 0xffffffe1 - -/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware - * context using the process stack pointer (if not set, the context was saved - * using the main stack pointer) - */ - -#define EXC_RETURN_PROCESS_STACK (1 << 2) - -/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set, - * return stays in handler mode) - */ - -#define EXC_RETURN_THREAD_MODE (1 << 3) - -/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the - * volatile FP registers and FPSCR. If this bit is clear, the state does include - * these registers. - */ - -#define EXC_RETURN_STD_CONTEXT (1 << 4) - -/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from - * the main stack. Execution uses MSP after return. - */ - -#define EXC_RETURN_HANDLER 0xfffffff1 - -/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets - * state from the main stack. Execution uses MSP after return. - */ - -#define EXC_RETURN_PRIVTHR 0xfffffff9 - -/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets - * state from the process stack. Execution uses PSP after return. - */ - -#define EXC_RETURN_UNPRIVTHR 0xfffffffd - -/* In the kernel build is not selected, then all threads run in privileged thread - * mode. - */ - -#ifdef CONFIG_NUTTX_KERNEL -# define EXC_RETURN 0xfffffff9 -#endif - -/************************Th************************************************************ - * Inline Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H */ - diff --git a/nuttx/arch/arm/src/armv7-m/mpu.h b/nuttx/arch/arm/src/armv7-m/mpu.h deleted file mode 100644 index 8d4cd1829..000000000 --- a/nuttx/arch/arm/src/armv7-m/mpu.h +++ /dev/null @@ -1,509 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/mpu.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_CORTEXM_MPU_H -#define __ARCH_ARM_SRC_COMMON_CORTEXM_MPU_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -#ifndef __ASSEMBLY__ -# include <sys/types.h> -# include <stdint.h> -# include <stdbool.h> -# include <debug.h> - -# include "up_arch.h" -#endif - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* MPU Register Addresses */ - -#define MPU_TYPE 0xe000ed90 /* MPU Type Register */ -#define MPU_CTRL 0xe000ed94 /* MPU Control Register */ -#define MPU_RNR 0xe000ed98 /* MPU Region Number Register */ -#define MPU_RBAR 0xe000ed9c /* MPU Region Base Address Register */ -#define MPU_RASR 0xe000eda0 /* MPU Region Attribute and Size Register */ - -/* MPU Type Register Bit Definitions */ - -#define MPU_TYPE_SEPARATE (1 << 0) /* Bit 0: 0:unified or 1:separate memory maps */ -#define MPU_TYPE_DREGION_SHIFT (8) /* Bits 8-15: Number MPU data regsion */ -#define MPU_TYPE_DREGION_MASK (0xff << MPU_TYPE_DREGION_SHIFT) -#define MPU_TYPE_IREGION_SHIFT (16) /* Bits 16-23: Number MPU instruction regions */ -#define MPU_TYPE_IREGION_MASK (0xff << MPU_TYPE_IREGION_SHIFT) - -/* MPU Control Register Bit Definitions */ - -#define MPU_CTRL_ENABLE (1 << 0) /* Bit 0: Enable the MPU */ -#define MPU_CTRL_HFNMIENA (1 << 1) /* Bit 1: Enable MPU during hard fault, NMI, and FAULTMAS */ -#define MPU_CTRL_PRIVDEFENA (1 << 2) /* Bit 2: Enable privileged access to default memory map */ - -/* MPU Region Number Register Bit Definitions */ - -#define MPU_RNR_MASK (0xff) - -/* MPU Region Base Address Register Bit Definitions */ - -#define MPU_RBAR_REGION_SHIFT (0) /* Bits 0-3: MPU region */ -#define MPU_RBAR_REGION_MASK (15 << MPU_RBAR_REGION_SHIFT) -#define MPU_RBAR_VALID (1 << 4) /* Bit 4: MPU Region Number valid */ -#define MPU_RBAR_ADDR_MASK 0xffffffe0 /* Bits N-31: Region base addrese */ - -/* MPU Region Attributes and Size Register Bit Definitions */ - -#define MPU_RASR_ENABLE (1 << 0) /* Bit 0: Region enable */ -#define MPU_RASR_SIZE_SHIFT (1) /* Bits 1-5: Size of the MPU protection region */ -#define MPU_RASR_SIZE_MASK (31 << MPU_RASR_SIZE_SHIFT) -# define MPU_RASR_SIZE_LOG2(n) ((n-1) << MPU_RASR_SIZE_SHIFT) -#define MPU_RASR_SRD_SHIFT (8) /* Bits 8-15: Subregion disable */ -#define MPU_RASR_SRD_MASK (0xff << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_0 (0x01 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_1 (0x02 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_2 (0x04 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_3 (0x08 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_4 (0x10 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_5 (0x20 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_6 (0x40 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_7 (0x80 << MPU_RASR_SRD_SHIFT) -#define MPU_RASR_ATTR_SHIFT (21) /* Bits 19-21: TEX Address Permisson */ -#define MPU_RASR_ATTR__MASK (7 << MPU_RASR_ATTR_SHIFT) -#define MPU_RASR_S (1 << 18) /* Bit 18: Shareable */ -#define MPU_RASR_C (1 << 17) /* Bit 17: Cacheable */ -#define MPU_RASR_B (1 << 16) /* Bit 16: Bufferable */ -#define MPU_RASR_AP_SHIFT (24) /* Bits 24-26: Access permission */ -#define MPU_RASR_AP_MASK (7 << MPU_RASR_AP_SHIFT) -# define MPU_RASR_AP_NONO (0 << MPU_RASR_AP_SHIFT) /* P:None U:None */ -# define MPU_RASR_AP_RWNO (1 << MPU_RASR_AP_SHIFT) /* P:RW U:None */ -# define MPU_RASR_AP_RWRO (2 << MPU_RASR_AP_SHIFT) /* P:RW U:RO */ -# define MPU_RASR_AP_RWRW (3 << MPU_RASR_AP_SHIFT) /* P:RW U:RW */ -# define MPU_RASR_AP_RONO (5 << MPU_RASR_AP_SHIFT) /* P:RO U:None */ -# define MPU_RASR_AP_RORO (6 << MPU_RASR_AP_SHIFT) /* P:RO U:RO */ -#define MPU_RASR_XN (1 << 28) /* Bit 28: Instruction access disable */ - -/************************************************************************************ - * Global Function Prototypes - ************************************************************************************/ - -#ifndef __ASSEMBLY__ -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Name: mpu_allocregion - * - * Description: - * Allocate the next region - * - ****************************************************************************/ - -EXTERN unsigned int mpu_allocregion(void); - -/**************************************************************************** - * Name: mpu_log2regionsize - * - * Description: - * Determine the smallest value of l2size (log base 2 size) such that the - * following is true: - * - * size <= (1 << l2size) - * - ****************************************************************************/ - -EXTERN uint8_t mpu_log2regionsize(size_t size); - -/**************************************************************************** - * Name: mpu_subregion - * - * Description: - * Given the size of the (1) memory to be mapped and (2) the log2 size - * of the mapping to use, determine the minimal sub-region set to span - * that memory region. - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionsize() - * - ****************************************************************************/ - -EXTERN uint32_t mpu_subregion(size_t size, uint8_t l2size); - -/************************************************************************************ - * Inline Functions - ************************************************************************************/ - -/**************************************************************************** - * Name: mpu_showtype - * - * Description: - * Show the characteristics of the MPU - * - ****************************************************************************/ - -static inline void mpu_showtype(void) -{ -#ifdef CONFIG_DEBUG - uint32_t regval = getreg32(MPU_TYPE); - dbg("%s MPU Regions: data=%d instr=%d\n", - (regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", - (regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, - (regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); -#endif -} - -/**************************************************************************** - * Name: mpu_control - * - * Description: - * Configure and enable (or disable) the MPU - * - ****************************************************************************/ - -static inline void mpu_control(bool enable, bool hfnmiena, bool privdefena) -{ - uint32_t regval = 0; - - if (enable) - { - regval |= MPU_CTRL_ENABLE; /* Enable the MPU */ - - if (hfnmiena) - { - regval |= MPU_CTRL_HFNMIENA; /* Enable MPU during hard fault, NMI, and FAULTMAS */ - } - - if (privdefena) - { - regval |= MPU_CTRL_PRIVDEFENA; /* Enable privileged access to default memory map */ - } - } - - putreg32(regval, MPU_CTRL); -} - -/**************************************************************************** - * Name: mpu_userflash - * - * Description: - * Configure a region for user program flash - * - ****************************************************************************/ - -static inline void mpu_userflash(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_AP_RORO; /* P:RO U:RO */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_privflash - * - * Description: - * Configure a region for privileged program flash - * - ****************************************************************************/ - -static inline void mpu_privflash(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(mpu_allocregion(), MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_AP_RONO; /* P:RO U:None */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_userintsram - * - * Description: - * Configure a region as user internal SRAM - * - ****************************************************************************/ - -static inline void mpu_userintsram(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_S | /* Shareable */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_AP_RWRW; /* P:RW U:RW */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_privintsram - * - * Description: - * Configure a region as privileged internal SRAM - * - ****************************************************************************/ - -static inline void mpu_privintsram(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_S | /* Shareable */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_AP_RWNO; /* P:RW U:None */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_userextsram - * - * Description: - * Configure a region as user external SRAM - * - ****************************************************************************/ - -static inline void mpu_userextsram(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_S | /* Shareable */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_B | /* Bufferable */ - MPU_RASR_AP_RWRW; /* P:RW U:RW */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_privextsram - * - * Description: - * Configure a region as privileged external SRAM - * - ****************************************************************************/ - -static inline void mpu_privextsram(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_S | /* Shareable */ - MPU_RASR_C | /* Cacheable */ - MPU_RASR_B | /* Bufferable */ - MPU_RASR_AP_RWNO; /* P:RW U:None */ - putreg32(regval, MPU_RASR); -} - -/**************************************************************************** - * Name: mpu_peripheral - * - * Description: - * Configure a region as privileged periperal address space - * - ****************************************************************************/ - -static inline void mpu_peripheral(uintptr_t base, size_t size) -{ - unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - - /* Select the region */ - - putreg32(region, MPU_RNR); - - /* Select the region base address */ - - putreg32((base & MPU_RBAR_ADDR_MASK) | region, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - l2size = mpu_log2regionsize(size); - subregions = mpu_subregion(size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - MPU_RASR_S | /* Shareable */ - MPU_RASR_B | /* Bufferable */ - MPU_RASR_AP_RWNO | /* P:RW U:None */ - MPU_RASR_XN | /* Instruction access disable */ - - putreg32(regval, MPU_RASR); -} - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_COMMON_CORTEXM_MPU_H */ - diff --git a/nuttx/arch/arm/src/armv7-m/nvic.h b/nuttx/arch/arm/src/armv7-m/nvic.h deleted file mode 100644 index 6bd842a76..000000000 --- a/nuttx/arch/arm/src/armv7-m/nvic.h +++ /dev/null @@ -1,545 +0,0 @@ -/******************************************************************************************** - * arch/arm/src/armv7-m/nvic.h - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ********************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H -#define __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H - -/******************************************************************************************** - * Included Files - ********************************************************************************************/ - -#include <nuttx/config.h> - -/******************************************************************************************** - * Pre-processor Definitions - ********************************************************************************************/ - -/* NVIC base address ************************************************************************/ - -#define ARMV7M_NVIC_BASE 0xe000e000 - -/* NVIC register offsets ********************************************************************/ - -#define NVIC_ICTR_OFFSET 0x0004 /* Interrupt controller type register */ -#define NVIC_SYSTICK_CTRL_OFFSET 0x0010 /* SysTick control and status register */ -#define NVIC_SYSTICK_RELOAD_OFFSET 0x0014 /* SysTick reload value register */ -#define NVIC_SYSTICK_CURRENT_OFFSET 0x0018 /* SysTick current value register */ -#define NVIC_SYSTICK_CALIB_OFFSET 0x001c /* SysTick calibration value register */ - -#define NVIC_IRQ_ENABLE_OFFSET(n) (0x0100 + 4*((n) >> 5)) -#define NVIC_IRQ0_31_ENABLE_OFFSET 0x0100 /* IRQ 0-31 set enable register */ -#define NVIC_IRQ32_63_ENABLE_OFFSET 0x0104 /* IRQ 32-63 set enable register */ -#define NVIC_IRQ64_95_ENABLE_OFFSET 0x0108 /* IRQ 64-95 set enable register */ -#define NVIC_IRQ96_127_ENABLE_OFFSET 0x010c /* IRQ 96-127 set enable register */ -#define NVIC_IRQ128_159_ENABLE_OFFSET 0x0110 /* IRQ 128-159 set enable register */ -#define NVIC_IRQ160_191_ENABLE_OFFSET 0x0114 /* IRQ 160-191 set enable register */ -#define NVIC_IRQ192_223_ENABLE_OFFSET 0x0118 /* IRQ 192-223 set enable register */ -#define NVIC_IRQ224_239_ENABLE_OFFSET 0x011c /* IRQ 224-239 set enable register */ - -#define NVIC_IRQ_CLEAR_OFFSET(n) (0x0180 + 4*((n) >> 5)) -#define NVIC_IRQ0_31_CLEAR_OFFSET 0x0180 /* IRQ 0-31 clear enable register */ -#define NVIC_IRQ32_63_CLEAR_OFFSET 0x0184 /* IRQ 32-63 clear enable register */ -#define NVIC_IRQ64_95_CLEAR_OFFSET 0x0188 /* IRQ 64-95 clear enable register */ -#define NVIC_IRQ96_127_CLEAR_OFFSET 0x018c /* IRQ 96-127 clear enable register */ -#define NVIC_IRQ128_159_CLEAR_OFFSET 0x0190 /* IRQ 128-159 clear enable register */ -#define NVIC_IRQ160_191_CLEAR_OFFSET 0x0194 /* IRQ 160-191 clear enable register */ -#define NVIC_IRQ192_223_CLEAR_OFFSET 0x0198 /* IRQ 192-223 clear enable register */ -#define NVIC_IRQ224_239_CLEAR_OFFSET 0x019c /* IRQ 224-2391 clear enable register */ - -#define NVIC_IRQ_PEND_OFFSET(n) (0x0200 + 4*((n) >> 5)) -#define NVIC_IRQ0_31_PEND_OFFSET 0x0200 /* IRQ 0-31 set pending register */ -#define NVIC_IRQ32_63_PEND_OFFSET 0x0204 /* IRQ 32-63 set pending register */ -#define NVIC_IRQ64_95_PEND_OFFSET 0x0208 /* IRQ 64-95 set pending register */ -#define NVIC_IRQ96_127_PEND_OFFSET 0x020c /* IRQ 96-127 set pending register */ -#define NVIC_IRQ128_159_PEND_OFFSET 0x0210 /* IRQ 128-159 set pending register */ -#define NVIC_IRQ160_191_PEND_OFFSET 0x0214 /* IRQ 160-191 set pending register */ -#define NVIC_IRQ192_223_PEND_OFFSET 0x0218 /* IRQ 192-2231 set pending register */ -#define NVIC_IRQ224_239_PEND_OFFSET 0x021c /* IRQ 224-2391 set pending register */ - -#define NVIC_IRQ_CLRPEND_OFFSET(n) (0x0280 + 4*((n) >> 5)) -#define NVIC_IRQ0_31_CLRPEND_OFFSET 0x0280 /* IRQ 0-31 clear pending register */ -#define NVIC_IRQ32_63_CLRPEND_OFFSET 0x0284 /* IRQ 32-63 clear pending register */ -#define NVIC_IRQ64_95_CLRPEND_OFFSET 0x0288 /* IRQ 64-95 clear pending register */ -#define NVIC_IRQ96_127_CLRPEND_OFFSET 0x028c /* IRQ 96-127 clear pending register */ -#define NVIC_IRQ128_159_CLRPEND_OFFSET 0x0290 /* IRQ 128-159 clear pending register */ -#define NVIC_IRQ160_191_CLRPEND_OFFSET 0x0294 /* IRQ 160-191 clear pending register */ -#define NVIC_IRQ192_223_CLRPEND_OFFSET 0x0298 /* IRQ 192-223 clear pending register */ -#define NVIC_IRQ224_239_CLRPEND_OFFSET 0x029c /* IRQ 224-239 clear pending register */ - -#define NVIC_IRQ_ACTIVE_OFFSET(n) (0x0300 + 4*((n) >> 5)) -#define NVIC_IRQ0_31_ACTIVE_OFFSET 0x0300 /* IRQ 0-31 active bit register */ -#define NVIC_IRQ32_63_ACTIVE_OFFSET 0x0304 /* IRQ 32-63 active bit register */ -#define NVIC_IRQ64_95_ACTIVE_OFFSET 0x0308 /* IRQ 64-95 active bit register */ -#define NVIC_IRQ96_127_ACTIVE_OFFSET 0x030c /* IRQ 96-127 active bit register */ -#define NVIC_IRQ128_159_ACTIVE_OFFSET 0x0310 /* IRQ 128-159 active bit register */ -#define NVIC_IRQ160_191_ACTIVE_OFFSET 0x0314 /* IRQ 160-191 active bit register */ -#define NVIC_IRQ192_223_ACTIVE_OFFSET 0x0318 /* IRQ 192-223 active bit register */ -#define NVIC_IRQ224_239_ACTIVE_OFFSET 0x031c /* IRQ 224-239 active bit register */ - -#define NVIC_IRQ_PRIORITY_OFFSET(n) (0x0400 + 4*((n) >> 2)) -#define NVIC_IRQ0_3_PRIORITY_OFFSET 0x0400 /* IRQ 0-3 priority register */ -#define NVIC_IRQ4_7_PRIORITY_OFFSET 0x0404 /* IRQ 4-7 priority register */ -#define NVIC_IRQ8_11_PRIORITY_OFFSET 0x0408 /* IRQ 8-11 priority register */ -#define NVIC_IRQ12_15_PRIORITY_OFFSET 0x040c /* IRQ 12-15 priority register */ -#define NVIC_IRQ16_19_PRIORITY_OFFSET 0x0410 /* IRQ 16-19 priority register */ -#define NVIC_IRQ20_23_PRIORITY_OFFSET 0x0414 /* IRQ 20-23 priority register */ -#define NVIC_IRQ24_27_PRIORITY_OFFSET 0x0418 /* IRQ 24-29 priority register */ -#define NVIC_IRQ28_31_PRIORITY_OFFSET 0x041c /* IRQ 28-31 priority register */ -#define NVIC_IRQ32_35_PRIORITY_OFFSET 0x0420 /* IRQ 32-35 priority register */ -#define NVIC_IRQ36_39_PRIORITY_OFFSET 0x0424 /* IRQ 36-39 priority register */ -#define NVIC_IRQ40_43_PRIORITY_OFFSET 0x0428 /* IRQ 40-43 priority register */ -#define NVIC_IRQ44_47_PRIORITY_OFFSET 0x042c /* IRQ 44-47 priority register */ -#define NVIC_IRQ48_51_PRIORITY_OFFSET 0x0430 /* IRQ 48-51 priority register */ -#define NVIC_IRQ52_55_PRIORITY_OFFSET 0x0434 /* IRQ 52-55 priority register */ -#define NVIC_IRQ56_59_PRIORITY_OFFSET 0x0438 /* IRQ 56-59 priority register */ -#define NVIC_IRQ60_63_PRIORITY_OFFSET 0x043c /* IRQ 60-63 priority register */ -#define NVIC_IRQ64_67_PRIORITY_OFFSET 0x0440 /* IRQ 64-67 priority register */ -#define NVIC_IRQ68_71_PRIORITY_OFFSET 0x0444 /* IRQ 68-71 priority register */ -#define NVIC_IRQ72_75_PRIORITY_OFFSET 0x0448 /* IRQ 72-75 priority register */ -#define NVIC_IRQ76_79_PRIORITY_OFFSET 0x044c /* IRQ 76-79 priority register */ -#define NVIC_IRQ80_83_PRIORITY_OFFSET 0x0450 /* IRQ 80-83 priority register */ -#define NVIC_IRQ84_87_PRIORITY_OFFSET 0x0454 /* IRQ 84-87 priority register */ -#define NVIC_IRQ88_91_PRIORITY_OFFSET 0x0458 /* IRQ 88-91 priority register */ -#define NVIC_IRQ92_95_PRIORITY_OFFSET 0x045c /* IRQ 92-95 priority register */ -#define NVIC_IRQ96_99_PRIORITY_OFFSET 0x0460 /* IRQ 96-99 priority register */ -#define NVIC_IRQ100_103_PRIORITY_OFFSET 0x0464 /* IRQ 100-103 priority register */ -#define NVIC_IRQ104_107_PRIORITY_OFFSET 0x0468 /* IRQ 104-107 priority register */ -#define NVIC_IRQ108_111_PRIORITY_OFFSET 0x046c /* IRQ 108-111 priority register */ -#define NVIC_IRQ112_115_PRIORITY_OFFSET 0x0470 /* IRQ 112-115 priority register */ -#define NVIC_IRQ116_119_PRIORITY_OFFSET 0x0474 /* IRQ 116-119 priority register */ -#define NVIC_IRQ120_123_PRIORITY_OFFSET 0x0478 /* IRQ 120-123 priority register */ -#define NVIC_IRQ124_127_PRIORITY_OFFSET 0x047c /* IRQ 124-127 priority register */ -#define NVIC_IRQ128_131_PRIORITY_OFFSET 0x0480 /* IRQ 128-131 priority register */ -#define NVIC_IRQ132_135_PRIORITY_OFFSET 0x0484 /* IRQ 132-135 priority register */ -#define NVIC_IRQ136_139_PRIORITY_OFFSET 0x0488 /* IRQ 136-139 priority register */ -#define NVIC_IRQ140_143_PRIORITY_OFFSET 0x048c /* IRQ 140-143 priority register */ -#define NVIC_IRQ144_147_PRIORITY_OFFSET 0x0490 /* IRQ 144-147 priority register */ -#define NVIC_IRQ148_151_PRIORITY_OFFSET 0x0494 /* IRQ 148-151 priority register */ -#define NVIC_IRQ152_155_PRIORITY_OFFSET 0x0498 /* IRQ 152-155 priority register */ -#define NVIC_IRQ156_159_PRIORITY_OFFSET 0x049c /* IRQ 156-159 priority register */ -#define NVIC_IRQ160_163_PRIORITY_OFFSET 0x04a0 /* IRQ 160-163 priority register */ -#define NVIC_IRQ164_167_PRIORITY_OFFSET 0x04a4 /* IRQ 164-167 priority register */ -#define NVIC_IRQ168_171_PRIORITY_OFFSET 0x04a8 /* IRQ 168-171 priority register */ -#define NVIC_IRQ172_175_PRIORITY_OFFSET 0x04ac /* IRQ 172-175 priority register */ -#define NVIC_IRQ176_179_PRIORITY_OFFSET 0x04b0 /* IRQ 176-179 priority register */ -#define NVIC_IRQ180_183_PRIORITY_OFFSET 0x04b4 /* IRQ 180-183 priority register */ -#define NVIC_IRQ184_187_PRIORITY_OFFSET 0x04b8 /* IRQ 184-187 priority register */ -#define NVIC_IRQ188_191_PRIORITY_OFFSET 0x04bc /* IRQ 188-191 priority register */ -#define NVIC_IRQ192_195_PRIORITY_OFFSET 0x04c0 /* IRQ 192-195 priority register */ -#define NVIC_IRQ196_199_PRIORITY_OFFSET 0x04c4 /* IRQ 196-199 priority register */ -#define NVIC_IRQ200_203_PRIORITY_OFFSET 0x04c8 /* IRQ 200-203 priority register */ -#define NVIC_IRQ204_207_PRIORITY_OFFSET 0x04cc /* IRQ 204-207 priority register */ -#define NVIC_IRQ208_211_PRIORITY_OFFSET 0x04d0 /* IRQ 208-211 priority register */ -#define NVIC_IRQ212_215_PRIORITY_OFFSET 0x04d4 /* IRQ 212-215 priority register */ -#define NVIC_IRQ216_219_PRIORITY_OFFSET 0x04d8 /* IRQ 216-219 priority register */ -#define NVIC_IRQ220_223_PRIORITY_OFFSET 0x04dc /* IRQ 220-223 priority register */ -#define NVIC_IRQ224_227_PRIORITY_OFFSET 0x04e0 /* IRQ 224-227 priority register */ -#define NVIC_IRQ228_231_PRIORITY_OFFSET 0x04e4 /* IRQ 228-231 priority register */ -#define NVIC_IRQ232_235_PRIORITY_OFFSET 0x04e8 /* IRQ 232-235 priority register */ -#define NVIC_IRQ236_239_PRIORITY_OFFSET 0x04ec /* IRQ 236-239 priority register */ - -/* System Control Block (SCB) */ - -#define NVIC_CPUID_BASE_OFFSET 0x0d00 /* CPUID base register */ -#define NVIC_INTCTRL_OFFSET 0x0d04 /* Interrupt control state register */ -#define NVIC_VECTAB_OFFSET 0x0d08 /* Vector table offset register */ -#define NVIC_AIRCR_OFFSET 0x0d0c /* Application interrupt/reset contol registr */ -#define NVIC_SYSCON_OFFSET 0x0d10 /* System control register */ -#define NVIC_CFGCON_OFFSET 0x0d14 /* Configuration control register */ -#define NVIC_SYSH_PRIORITY_OFFSET(n) (0x0d14 + 4*((n) >> 2)) -#define NVIC_SYSH4_7_PRIORITY_OFFSET 0x0d18 /* System handlers 4-7 priority register */ -#define NVIC_SYSH8_11_PRIORITY_OFFSET 0x0d1c /* System handler 8-11 priority register */ -#define NVIC_SYSH12_15_PRIORITY_OFFSET 0x0d20 /* System handler 12-15 priority register */ -#define NVIC_SYSHCON_OFFSET 0x0d24 /* System handler control and state register */ -#define NVIC_CFAULTS_OFFSET 0x0d28 /* Configurable fault status register */ -#define NVIC_HFAULTS_OFFSET 0x0d2c /* Hard fault status register */ -#define NVIC_DFAULTS_OFFSET 0x0d30 /* Debug fault status register */ -#define NVIC_MEMMANAGE_ADDR_OFFSET 0x0d34 /* Mem manage address register */ -#define NVIC_BFAULT_ADDR_OFFSET 0x0d38 /* Bus fault address register */ -#define NVIC_AFAULTS_OFFSET 0x0d3c /* Auxiliary fault status register */ -#define NVIC_PFR0_OFFSET 0x0d40 /* Processor feature register 0 */ -#define NVIC_PFR1_OFFSET 0x0d44 /* Processor feature register 1 */ -#define NVIC_DFR0_OFFSET 0x0d48 /* Debug feature register 0 */ -#define NVIC_AFR0_OFFSET 0x0d4c /* Auxiliary feature register 0 */ -#define NVIC_MMFR0_OFFSET 0x0d50 /* Memory model feature register 0 */ -#define NVIC_MMFR1_OFFSET 0x0d54 /* Memory model feature register 1 */ -#define NVIC_MMFR2_OFFSET 0x0d58 /* Memory model feature register 2 */ -#define NVIC_MMFR3_OFFSET 0x0d5c /* Memory model feature register 3 */ -#define NVIC_ISAR0_OFFSET 0x0d60 /* ISA feature register 0 */ -#define NVIC_ISAR1_OFFSET 0x0d64 /* ISA feature register 1 */ -#define NVIC_ISAR2_OFFSET 0x0d68 /* ISA feature register 2 */ -#define NVIC_ISAR3_OFFSET 0x0d6c /* ISA feature register 3 */ -#define NVIC_ISAR4_OFFSET 0x0d70 /* ISA feature register 4 */ -#define NVIC_CPACR_OFFSET 0x0d88 /* Coprocessor Access Control Register */ -#define NVIC_DHCSR_OFFSET 0x0df0 /* Debug Halting Control and Status Register */ -#define NVIC_DCRSR_OFFSET 0x0df4 /* Debug Core Register Selector Register */ -#define NVIC_DCRDR_OFFSET 0x0df8 /* Debug Core Register Data Register */ -#define NVIC_DEMCR_OFFSET 0x0dfc /* Debug Exception and Monitor Control Register */ -#define NVIC_STIR_OFFSET 0x0f00 /* Software trigger interrupt register */ -#define NVIC_FPCCR_OFFSET 0x0f34 /* Floating-point Context Control Register */ -#define NVIC_FPCAR_OFFSET 0x0f38 /* Floating-point Context Address Register */ -#define NVIC_FPDSCR_OFFSET 0x0f3c /* Floating-point Default Status Control Register */ -#define NVIC_MVFR0_OFFSET 0x0f40 /* Media and VFP Feature Register 0 */ -#define NVIC_MVFR1_OFFSET 0x0f44 /* Media and VFP Feature Register 1 */ -#define NVIC_PID4_OFFSET 0x0fd0 /* Peripheral identification register (PID4) */ -#define NVIC_PID5_OFFSET 0x0fd4 /* Peripheral identification register (PID5) */ -#define NVIC_PID6_OFFSET 0x0fd8 /* Peripheral identification register (PID6) */ -#define NVIC_PID7_OFFSET 0x0fdc /* Peripheral identification register (PID7) */ -#define NVIC_PID0_OFFSET 0x0fe0 /* Peripheral identification register bits 7:0 (PID0) */ -#define NVIC_PID1_OFFSET 0x0fe4 /* Peripheral identification register bits 15:8 (PID1) */ -#define NVIC_PID2_OFFSET 0x0fe8 /* Peripheral identification register bits 23:16 (PID2) */ -#define NVIC_PID3_OFFSET 0x0fec /* Peripheral identification register bits 23:16 (PID3) */ -#define NVIC_CID0_OFFSET 0x0ff0 /* Component identification register bits 7:0 (CID0) */ -#define NVIC_CID1_OFFSET 0x0ff4 /* Component identification register bits 15:8 (CID0) */ -#define NVIC_CID2_OFFSET 0x0ff8 /* Component identification register bits 23:16 (CID0) */ -#define NVIC_CID3_OFFSET 0x0ffc /* Component identification register bits 23:16 (CID0) */ - -/* NVIC register addresses ******************************************************************/ - -#define NVIC_ICTR (ARMV7M_NVIC_BASE + NVIC_ICTR_OFFSET) -#define NVIC_SYSTICK_CTRL (ARMV7M_NVIC_BASE + NVIC_SYSTICK_CTRL_OFFSET) -#define NVIC_SYSTICK_RELOAD (ARMV7M_NVIC_BASE + NVIC_SYSTICK_RELOAD_OFFSET) -#define NVIC_SYSTICK_CURRENT (ARMV7M_NVIC_BASE + NVIC_SYSTICK_CURRENT_OFFSET) -#define NVIC_SYSTICK_CALIB (ARMV7M_NVIC_BASE + NVIC_SYSTICK_CALIB_OFFSET) - -#define NVIC_IRQ_ENABLE(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_ENABLE_OFFSET(n)) -#define NVIC_IRQ0_31_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ0_31_ENABLE_OFFSET) -#define NVIC_IRQ32_63_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ32_63_ENABLE_OFFSET) -#define NVIC_IRQ64_95_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ64_95_ENABLE_OFFSET) -#define NVIC_IRQ96_127_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ96_127_ENABLE_OFFSET) -#define NVIC_IRQ128_159_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ128_159_ENABLE_OFFSET) -#define NVIC_IRQ160_191_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ160_191_ENABLE_OFFSET) -#define NVIC_IRQ192_223_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ192_223_ENABLE_OFFSET) -#define NVIC_IRQ224_239_ENABLE (ARMV7M_NVIC_BASE + NVIC_IRQ224_239_ENABLE_OFFSET) - -#define NVIC_IRQ_CLEAR(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_CLEAR_OFFSET(n)) -#define NVIC_IRQ0_31_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ0_31_CLEAR_OFFSET) -#define NVIC_IRQ32_63_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ32_63_CLEAR_OFFSET) -#define NVIC_IRQ64_95_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ64_95_CLEAR_OFFSET) -#define NVIC_IRQ96_127_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ96_127_CLEAR_OFFSET) -#define NVIC_IRQ128_159_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ128_159_CLEAR_OFFSET) -#define NVIC_IRQ160_191_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ160_191_CLEAR_OFFSET) -#define NVIC_IRQ192_223_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ192_223_CLEAR_OFFSET) -#define NVIC_IRQ224_239_CLEAR (ARMV7M_NVIC_BASE + NVIC_IRQ224_239_CLEAR_OFFSET) - -#define NVIC_IRQ_PEND(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_PEND_OFFSET(n)) -#define NVIC_IRQ0_31_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ0_31_PEND_OFFSET) -#define NVIC_IRQ32_63_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ32_63_PEND_OFFSET) -#define NVIC_IRQ64_95_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ64_95_PEND_OFFSET) -#define NVIC_IRQ96_127_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ96_127_PEND_OFFSET) -#define NVIC_IRQ128_159_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ128_159_PEND_OFFSET) -#define NVIC_IRQ160_191_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ160_191_PEND_OFFSET) -#define NVIC_IRQ192_223_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ192_223_PEND_OFFSET) -#define NVIC_IRQ224_239_PEND (ARMV7M_NVIC_BASE + NVIC_IRQ224_239_PEND_OFFSET) - -#define NVIC_IRQ_CLRPEND(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_CLRPEND_OFFSET(n)) -#define NVIC_IRQ0_31_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ0_31_CLRPEND_OFFSET) -#define NVIC_IRQ32_63_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ32_63_CLRPEND_OFFSET) -#define NVIC_IRQ64_95_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ64_95_CLRPEND_OFFSET) -#define NVIC_IRQ96_127_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ96_127_CLRPEND_OFFSET) -#define NVIC_IRQ128_159_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ128_159_CLRPEND_OFFSET) -#define NVIC_IRQ160_191_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ160_191_CLRPEND_OFFSET) -#define NVIC_IRQ192_223_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ192_223_CLRPEND_OFFSET) -#define NVIC_IRQ224_239_CLRPEND (ARMV7M_NVIC_BASE + NVIC_IRQ224_239_CLRPEND_OFFSET) - -#define NVIC_IRQ_ACTIVE(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_ACTIVE_OFFSET(n)) -#define NVIC_IRQ0_31_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ0_31_ACTIVE_OFFSET) -#define NVIC_IRQ32_63_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ32_63_ACTIVE_OFFSET) -#define NVIC_IRQ64_95_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ64_95_ACTIVE_OFFSET) -#define NVIC_IRQ96_127_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ96_127_ACTIVE_OFFSET) -#define NVIC_IRQ128_159_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ128_159_ACTIVE_OFFSET) -#define NVIC_IRQ160_191_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ160_191_ACTIVE_OFFSET) -#define NVIC_IRQ192_223_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ192_223_ACTIVE_OFFSET) -#define NVIC_IRQ224_239_ACTIVE (ARMV7M_NVIC_BASE + NVIC_IRQ224_239_ACTIVE_OFFSET) - -#define NVIC_IRQ_PRIORITY(n) (ARMV7M_NVIC_BASE + NVIC_IRQ_PRIORITY_OFFSET(n)) -#define NVIC_IRQ0_3_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ0_3_PRIORITY_OFFSET) -#define NVIC_IRQ4_7_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ4_7_PRIORITY_OFFSET) -#define NVIC_IRQ8_11_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ8_11_PRIORITY_OFFSET) -#define NVIC_IRQ12_15_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ12_15_PRIORITY_OFFSET) -#define NVIC_IRQ16_19_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ16_19_PRIORITY_OFFSET) -#define NVIC_IRQ20_23_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ20_23_PRIORITY_OFFSET) -#define NVIC_IRQ24_27_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ24_27_PRIORITY_OFFSET) -#define NVIC_IRQ28_31_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ28_31_PRIORITY_OFFSET) -#define NVIC_IRQ32_35_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ32_35_PRIORITY_OFFSET) -#define NVIC_IRQ36_39_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ36_39_PRIORITY_OFFSET) -#define NVIC_IRQ40_43_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ40_43_PRIORITY_OFFSET) -#define NVIC_IRQ44_47_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ44_47_PRIORITY_OFFSET) -#define NVIC_IRQ48_51_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ48_51_PRIORITY_OFFSET) -#define NVIC_IRQ52_55_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ52_55_PRIORITY_OFFSET) -#define NVIC_IRQ56_59_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ56_59_PRIORITY_OFFSET) -#define NVIC_IRQ60_63_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ60_63_PRIORITY_OFFSET) -#define NVIC_IRQ64_67_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ64_67_PRIORITY_OFFSET) -#define NVIC_IRQ68_71_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ68_71_PRIORITY_OFFSET) -#define NVIC_IRQ72_75_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ72_75_PRIORITY_OFFSET) -#define NVIC_IRQ76_79_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ76_79_PRIORITY_OFFSET) -#define NVIC_IRQ80_83_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ80_83_PRIORITY_OFFSET) -#define NVIC_IRQ84_87_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ84_87_PRIORITY_OFFSET) -#define NVIC_IRQ88_91_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ88_91_PRIORITY_OFFSET) -#define NVIC_IRQ92_95_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ92_95_PRIORITY_OFFSET) -#define NVIC_IRQ96_99_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ96_99_PRIORITY_OFFSET) -#define NVIC_IRQ100_103_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ100_103_PRIORITY_OFFSET) -#define NVIC_IRQ104_107_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ104_107_PRIORITY_OFFSET) -#define NVIC_IRQ108_111_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ108_111_PRIORITY_OFFSET) -#define NVIC_IRQ112_115_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ112_115_PRIORITY_OFFSET) -#define NVIC_IRQ116_119_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ116_119_PRIORITY_OFFSET) -#define NVIC_IRQ120_123_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ120_123_PRIORITY_OFFSET) -#define NVIC_IRQ124_127_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ124_127_PRIORITY_OFFSET) -#define NVIC_IRQ128_131_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ128_131_PRIORITY_OFFSET) -#define NVIC_IRQ132_135_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ132_135_PRIORITY_OFFSET) -#define NVIC_IRQ136_139_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ136_139_PRIORITY_OFFSET) -#define NVIC_IRQ140_143_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ140_143_PRIORITY_OFFSET) -#define NVIC_IRQ144_147_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ144_147_PRIORITY_OFFSET) -#define NVIC_IRQ148_151_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ148_151_PRIORITY_OFFSET) -#define NVIC_IRQ152_155_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ152_155_PRIORITY_OFFSET) -#define NVIC_IRQ156_159_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ156_159_PRIORITY_OFFSET) -#define NVIC_IRQ160_163_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ160_163_PRIORITY_OFFSET) -#define NVIC_IRQ164_167_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ164_167_PRIORITY_OFFSET) -#define NVIC_IRQ168_171_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ168_171_PRIORITY_OFFSET) -#define NVIC_IRQ172_175_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ172_175_PRIORITY_OFFSET) -#define NVIC_IRQ176_179_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ176_179_PRIORITY_OFFSET) -#define NVIC_IRQ180_183_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ180_183_PRIORITY_OFFSET) -#define NVIC_IRQ184_187_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ184_187_PRIORITY_OFFSET) -#define NVIC_IRQ188_191_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ188_191_PRIORITY_OFFSET) -#define NVIC_IRQ192_195_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ192_195_PRIORITY_OFFSET) -#define NVIC_IRQ196_199_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ196_199_PRIORITY_OFFSET) -#define NVIC_IRQ200_203_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ200_203_PRIORITY_OFFSET) -#define NVIC_IRQ204_207_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ204_207_PRIORITY_OFFSET) -#define NVIC_IRQ208_211_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ208_211_PRIORITY_OFFSET) -#define NVIC_IRQ212_215_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ212_215_PRIORITY_OFFSET) -#define NVIC_IRQ216_219_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ216_219_PRIORITY_OFFSET) -#define NVIC_IRQ220_223_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ220_223_PRIORITY_OFFSET) -#define NVIC_IRQ224_227_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ224_227_PRIORITY_OFFSET) -#define NVIC_IRQ228_231_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ228_231_PRIORITY_OFFSET) -#define NVIC_IRQ232_235_PRIORITY (ARMV7M_NVIC_BASE + NVIC_IRQ232_235_PRIORITY_OFFSET) - -#define NVIC_CPUID_BASE (ARMV7M_NVIC_BASE + NVIC_CPUID_BASE_OFFSET) -#define NVIC_INTCTRL (ARMV7M_NVIC_BASE + NVIC_INTCTRL_OFFSET) -#define NVIC_VECTAB (ARMV7M_NVIC_BASE + NVIC_VECTAB_OFFSET) -#define NVIC_AIRCR (ARMV7M_NVIC_BASE + NVIC_AIRCR_OFFSET) -#define NVIC_SYSCON (ARMV7M_NVIC_BASE + NVIC_SYSCON_OFFSET) -#define NVIC_CFGCON (ARMV7M_NVIC_BASE + NVIC_CFGCON_OFFSET) -#define NVIC_SYSH_PRIORITY(n) (ARMV7M_NVIC_BASE + NVIC_SYSH_PRIORITY_OFFSET(n)) -#define NVIC_SYSH4_7_PRIORITY (ARMV7M_NVIC_BASE + NVIC_SYSH4_7_PRIORITY_OFFSET) -#define NVIC_SYSH8_11_PRIORITY (ARMV7M_NVIC_BASE + NVIC_SYSH8_11_PRIORITY_OFFSET) -#define NVIC_SYSH12_15_PRIORITY (ARMV7M_NVIC_BASE + NVIC_SYSH12_15_PRIORITY_OFFSET) -#define NVIC_SYSHCON (ARMV7M_NVIC_BASE + NVIC_SYSHCON_OFFSET) -#define NVIC_CFAULTS (ARMV7M_NVIC_BASE + NVIC_CFAULTS_OFFSET) -#define NVIC_HFAULTS (ARMV7M_NVIC_BASE + NVIC_HFAULTS_OFFSET) -#define NVIC_DFAULTS (ARMV7M_NVIC_BASE + NVIC_DFAULTS_OFFSET) -#define NVIC_MEMMANAGE_ADDR (ARMV7M_NVIC_BASE + NVIC_MEMMANAGE_ADDR_OFFSET) -#define NVIC_BFAULT_ADDR (ARMV7M_NVIC_BASE + NVIC_BFAULT_ADDR_OFFSET) -#define NVIC_AFAULTS (ARMV7M_NVIC_BASE + NVIC_AFAULTS_OFFSET) -#define NVIC_PFR0 (ARMV7M_NVIC_BASE + NVIC_PFR0_OFFSET) -#define NVIC_PFR1 (ARMV7M_NVIC_BASE + NVIC_PFR1_OFFSET) -#define NVIC_DFR0 (ARMV7M_NVIC_BASE + NVIC_DFR0_OFFSET) -#define NVIC_AFR0 (ARMV7M_NVIC_BASE + NVIC_AFR0_OFFSET) -#define NVIC_MMFR0 (ARMV7M_NVIC_BASE + NVIC_MMFR0_OFFSET) -#define NVIC_MMFR1 (ARMV7M_NVIC_BASE + NVIC_MMFR1_OFFSET) -#define NVIC_MMFR2 (ARMV7M_NVIC_BASE + NVIC_MMFR2_OFFSET) -#define NVIC_MMFR3 (ARMV7M_NVIC_BASE + NVIC_MMFR3_OFFSET) -#define NVIC_ISAR0 (ARMV7M_NVIC_BASE + NVIC_ISAR0_OFFSET) -#define NVIC_ISAR1 (ARMV7M_NVIC_BASE + NVIC_ISAR1_OFFSET) -#define NVIC_ISAR2 (ARMV7M_NVIC_BASE + NVIC_ISAR2_OFFSET) -#define NVIC_ISAR3 (ARMV7M_NVIC_BASE + NVIC_ISAR3_OFFSET) -#define NVIC_ISAR4 (ARMV7M_NVIC_BASE + NVIC_ISAR4_OFFSET) -#define NVIC_CPACR (ARMV7M_NVIC_BASE + NVIC_CPACR_OFFSET) -#define NVIC_DHCSR (ARMV7M_NVIC_BASE + NVIC_DHCSR_OFFSET) -#define NVIC_DCRSR (ARMV7M_NVIC_BASE + NVIC_DCRSR_OFFSET) -#define NVIC_DCRDR (ARMV7M_NVIC_BASE + NVIC_DCRDR_OFFSET) -#define NVIC_DEMCR (ARMV7M_NVIC_BASE + NVIC_DEMCR_OFFSET) -#define NVIC_STIR (ARMV7M_NVIC_BASE + NVIC_STIR_OFFSET) -#define NVIC_FPCCR (ARMV7M_NVIC_BASE + NVIC_FPCCR_OFFSET) -#define NVIC_PID4 (ARMV7M_NVIC_BASE + NVIC_PID4_OFFSET) -#define NVIC_PID5 (ARMV7M_NVIC_BASE + NVIC_PID5_OFFSET) -#define NVIC_PID6 (ARMV7M_NVIC_BASE + NVIC_PID6_OFFSET) -#define NVIC_PID7 (ARMV7M_NVIC_BASE + NVIC_PID7_OFFSET) -#define NVIC_PID0 (ARMV7M_NVIC_BASE + NVIC_PID0_OFFSET) -#define NVIC_PID1 (ARMV7M_NVIC_BASE + NVIC_PID1_OFFSET) -#define NVIC_PID2 (ARMV7M_NVIC_BASE + NVIC_PID2_OFFSET) -#define NVIC_PID3 (ARMV7M_NVIC_BASE + NVIC_PID3_OFFSET) -#define NVIC_CID0 (ARMV7M_NVIC_BASE + NVIC_CID0_OFFSET) -#define NVIC_CID1 (ARMV7M_NVIC_BASE + NVIC_CID1_OFFSET) -#define NVIC_CID2 (ARMV7M_NVIC_BASE + NVIC_CID2_OFFSET) -#define NVIC_CID3 (ARMV7M_NVIC_BASE + NVIC_CID3_OFFSET) - -/* NVIC register bit definitions ************************************************************/ - -/* Interrrupt controller type (INCTCTL_TYPE) */ - -#define NVIC_ICTR_INTLINESNUM_SHIFT 0 /* Bits 4-0: Number of interrupt intputs / 32 */ -#define NVIC_ICTR_INTLINESNUM_MASK (0x1f << NVIC_ICTR_INTLINESNUM_SHIFT) - -/* SysTick control and status register (SYSTICK_CTRL) */ - -#define NVIC_SYSTICK_CTRL_ENABLE (1 << 0) /* Bit 0: Enable */ -#define NVIC_SYSTICK_CTRL_TICKINT (1 << 1) /* Bit 1: Tick interrupt */ -#define NVIC_SYSTICK_CTRL_CLKSOURCE (1 << 2) /* Bit 2: Clock source */ -#define NVIC_SYSTICK_CTRL_COUNTFLAG (1 << 16) /* Bit 16: Count Flag */ - -/* SysTick reload value register (SYSTICK_RELOAD) */ - -#define NVIC_SYSTICK_RELOAD_SHIFT 0 /* Bits 23-0: Timer reload value */ -#define NVIC_SYSTICK_RELOAD_MASK (0x00ffffff << NVIC_SYSTICK_RELOAD_SHIFT) - -/* SysTick current value register (SYSTICK_CURRENT) */ - -#define NVIC_SYSTICK_CURRENT_SHIFT 0 /* Bits 23-0: Timer current value */ -#define NVIC_SYSTICK_CURRENT_MASK (0x00ffffff << NVIC_SYSTICK_RELOAD_SHIFT) - -/* SysTick calibration value register (SYSTICK_CALIB) */ - -#define NVIC_SYSTICK_CALIB_TENMS_SHIFT 0 /* Bits 23-0: Calibration value */ -#define NVIC_SYSTICK_CALIB_TENMS_MASK (0x00ffffff << NVIC_SYSTICK_CALIB_TENMS_SHIFT) -#define NVIC_SYSTICK_CALIB_SKEW (1 << 30) /* Bit 30: Calibration value inexact */ -#define NVIC_SYSTICK_CALIB_NOREF (1 << 31) /* Bit 31: No external reference clock */ - -/* Interrupt control state register (INTCTRL) */ - -#define NVIC_INTCTRL_NMIPENDSET (1 << 31) /* Bit 31: Set pending NMI bit */ -#define NVIC_INTCTRL_PENDSVSET (1 << 28) /* Bit 28: Set pending PendSV bit */ -#define NVIC_INTCTRL_PENDSVCLR (1 << 27) /* Bit 27: Clear pending PendSV bit */ -#define NVIC_INTCTRL_PENDSTSET (1 << 26) /* Bit 26: Set pending SysTick bit */ -#define NVIC_INTCTRL_PENDSTCLR (1 << 25) /* Bit 25: Clear pending SysTick bit */ -#define NVIC_INTCTRL_ISPREEMPOT (1 << 23) /* Bit 23: Pending active next cycle */ -#define NVIC_INTCTRL_ISRPENDING (1 << 22) /* Bit 22: Interrupt pending flag */ -#define NVIC_INTCTRL_VECTPENDING_SHIFT 12 /* Bits 21-12: Pending ISR number field */ -#define NVIC_INTCTRL_VECTPENDING_MASK (0x3ff << NVIC_INTCTRL_VECTPENDING_SHIFT) -#define NVIC_INTCTRL_RETTOBASE (1 << 11) /* Bit 11: no other exceptions pending */ -#define NVIC_INTCTRL_VECTACTIVE_SHIFT 0 /* Bits 8-0: Active ISR number */ -#define NVIC_INTCTRL_VECTACTIVE_MASK (0x1ff << NVIC_INTCTRL_VECTACTIVE_SHIFT) - -/* System control register (SYSCON) */ - - /* Bit 0: Reserved */ -#define NVIC_SYSCON_SLEEPONEXIT (1 << 1) /* Bit 1: Sleep-on-exit (returning from Handler to Thread mode) */ -#define NVIC_SYSCON_SLEEPDEEP (1 << 2) /* Bit 2: Use deep sleep in low power mode */ - /* Bit 3: Reserved */ -#define NVIC_SYSCON_SEVONPEND (1 << 4) /* Bit 4: Send Event on Pending bit */ - /* Bits 5-31: Reserved */ - -/* System handler 4-7 priority register */ - -#define NVIC_SYSH_PRIORITY_PR4_SHIFT 0 -#define NVIC_SYSH_PRIORITY_PR4_MASK (0xff << NVIC_SYSH_PRIORITY_PR4_SHIFT) -#define NVIC_SYSH_PRIORITY_PR5_SHIFT 8 -#define NVIC_SYSH_PRIORITY_PR5_MASK (0xff << NVIC_SYSH_PRIORITY_PR5_SHIFT) -#define NVIC_SYSH_PRIORITY_PR6_SHIFT 16 -#define NVIC_SYSH_PRIORITY_PR6_MASK (0xff << NVIC_SYSH_PRIORITY_PR6_SHIFT) -#define NVIC_SYSH_PRIORITY_PR7_SHIFT 24 -#define NVIC_SYSH_PRIORITY_PR7_MASK (0xff << NVIC_SYSH_PRIORITY_PR7_SHIFT) - -/* System handler 8-11 priority register */ - -#define NVIC_SYSH_PRIORITY_PR8_SHIFT 0 -#define NVIC_SYSH_PRIORITY_PR8_MASK (0xff << NVIC_SYSH_PRIORITY_PR8_SHIFT) -#define NVIC_SYSH_PRIORITY_PR9_SHIFT 8 -#define NVIC_SYSH_PRIORITY_PR9_MASK (0xff << NVIC_SYSH_PRIORITY_PR9_SHIFT) -#define NVIC_SYSH_PRIORITY_PR10_SHIFT 16 -#define NVIC_SYSH_PRIORITY_PR10_MASK (0xff << NVIC_SYSH_PRIORITY_PR10_SHIFT) -#define NVIC_SYSH_PRIORITY_PR11_SHIFT 24 -#define NVIC_SYSH_PRIORITY_PR11_MASK (0xff << NVIC_SYSH_PRIORITY_PR11_SHIFT) - -/* System handler 12-15 priority register */ - -#define NVIC_SYSH_PRIORITY_PR12_SHIFT 0 -#define NVIC_SYSH_PRIORITY_PR12_MASK (0xff << NVIC_SYSH_PRIORITY_PR12_SHIFT) -#define NVIC_SYSH_PRIORITY_PR13_SHIFT 8 -#define NVIC_SYSH_PRIORITY_PR13_MASK (0xff << NVIC_SYSH_PRIORITY_PR13_SHIFT) -#define NVIC_SYSH_PRIORITY_PR14_SHIFT 16 -#define NVIC_SYSH_PRIORITY_PR14_MASK (0xff << NVIC_SYSH_PRIORITY_PR14_SHIFT) -#define NVIC_SYSH_PRIORITY_PR15_SHIFT 24 -#define NVIC_SYSH_PRIORITY_PR15_MASK (0xff << NVIC_SYSH_PRIORITY_PR15_SHIFT) - -/* System handler control and state register (SYSHCON) */ - -#define NVIC_SYSHCON_MEMFAULTACT (1 << 0) /* Bit 0: MemManage is active */ -#define NVIC_SYSHCON_BUSFAULTACT (1 << 1) /* Bit 1: BusFault is active */ -#define NVIC_SYSHCON_USGFAULTACT (1 << 3) /* Bit 3: UsageFault is active */ -#define NVIC_SYSHCON_SVCALLACT (1 << 7) /* Bit 7: SVCall is active */ -#define NVIC_SYSHCON_MONITORACT (1 << 8) /* Bit 8: Monitor is active */ -#define NVIC_SYSHCON_PENDSVACT (1 << 10) /* Bit 10: PendSV is active */ -#define NVIC_SYSHCON_SYSTICKACT (1 << 11) /* Bit 11: SysTick is active */ -#define NVIC_SYSHCON_USGFAULTPENDED (1 << 12) /* Bit 12: Usage fault is pended */ -#define NVIC_SYSHCON_MEMFAULTPENDED (1 << 13) /* Bit 13: MemManage is pended */ -#define NVIC_SYSHCON_BUSFAULTPENDED (1 << 14) /* Bit 14: BusFault is pended */ -#define NVIC_SYSHCON_SVCALLPENDED (1 << 15) /* Bit 15: SVCall is pended */ -#define NVIC_SYSHCON_MEMFAULTENA (1 << 16) /* Bit 16: MemFault enabled */ -#define NVIC_SYSHCON_BUSFAULTENA (1 << 17) /* Bit 17: BusFault enabled */ -#define NVIC_SYSHCON_USGFAULTENA (1 << 18) /* Bit 18: UsageFault enabled */ - -/* Application Interrupt and Reset Control Register (AIRCR) */ - -#define NVIC_AIRCR_VECTRESET (1 << 0) /* Bit 0: VECTRESET */ -#define NVIC_AIRCR_VECTCLRACTIVE (1 << 1) /* Bit 1: Reserved for debug use */ -#define NVIC_AIRCR_SYSRESETREQ (1 << 2) /* Bit 2: System reset */ - /* Bits 2-7: Reserved */ -#define NVIC_AIRCR_PRIGROUP_SHIFT (8) /* Bits 8-14: PRIGROUP */ -#define NVIC_AIRCR_PRIGROUP_MASK (7 << NVIC_AIRCR_PRIGROUP_SHIFT) -#define NVIC_AIRCR_ENDIANNESS (1 << 15) /* Bit 15: 1=Big endian */ -#define NVIC_AIRCR_VECTKEY_SHIFT (16) /* Bits 16-31: VECTKEY */ -#define NVIC_AIRCR_VECTKEY_MASK (0xffff << NVIC_AIRCR_VECTKEY_SHIFT) -#define NVIC_AIRCR_VECTKEYSTAT_SHIFT (16) /* Bits 16-31: VECTKEYSTAT */ -#define NVIC_AIRCR_VECTKEYSTAT_MASK (0xffff << NVIC_AIRCR_VECTKEYSTAT_SHIFT) - -/* Debug Exception and Monitor Control Register (DEMCR) */ - -#define NVIC_DEMCR_VCCORERESET (1 << 0) /* Bit 0: Reset Vector Catch */ -#define NVIC_DEMCR_VCMMERR (1 << 4) /* Bit 4: Debug trap on Memory Management faults */ -#define NVIC_DEMCR_VCNOCPERR (1 << 5) /* Bit 5: Debug trap on Usage Fault access to non-present coprocessor */ -#define NVIC_DEMCR_VCCHKERR (1 << 6) /* Bit 6: Debug trap on Usage Fault enabled checking errors */ -#define NVIC_DEMCR_VCSTATERR (1 << 7) /* Bit 7: Debug trap on Usage Fault state error */ -#define NVIC_DEMCR_VCBUSERR (1 << 8) /* Bit 8: Debug Trap on normal Bus error */ -#define NVIC_DEMCR_VCINTERR (1 << 9) /* Bit 9: Debug Trap on interrupt/exception service errors */ -#define NVIC_DEMCR_VCHARDERR (1 << 10) /* Bit 10: Debug trap on Hard Fault */ -#define NVIC_DEMCR_MONEN (1 << 16) /* Bit 16: Enable the debug monitor */ -#define NVIC_DEMCR_MONPEND (1 << 17) /* Bit 17: Pend the monitor to activate when priority permits */ -#define NVIC_DEMCR_MONSTEP (1 << 18) /* Bit 18: Steps the core */ -#define NVIC_DEMCR_MONREQ (1 << 19) /* Bit 19: Monitor wake-up mode */ -#define NVIC_DEMCR_TRCENA (1 << 24) /* Bit 24: Enable trace and debug blocks */ - -/******************************************************************************************** - * Public Types - ********************************************************************************************/ - -/******************************************************************************************** - * Public Data - ********************************************************************************************/ - -/******************************************************************************************** - * Public Function Prototypes - ********************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H */ diff --git a/nuttx/arch/arm/src/armv7-m/psr.h b/nuttx/arch/arm/src/armv7-m/psr.h deleted file mode 100644 index b8b33c80f..000000000 --- a/nuttx/arch/arm/src/armv7-m/psr.h +++ /dev/null @@ -1,87 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/psr.h - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H -#define __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Application Program Status Register (APSR) */ - -#define ARMV7M_APSR_Q (1 << 27) /* Bit 27: Sticky saturation flag */ -#define ARMV7M_APSR_V (1 << 28) /* Bit 28: Overflow flag */ -#define ARMV7M_APSR_C (1 << 29) /* Bit 29: Carry/borrow flag */ -#define ARMV7M_APSR_Z (1 << 30) /* Bit 30: Zero flag */ -#define ARMV7M_APSR_N (1 << 31) /* Bit 31: Negative, less than flag */ - -/* Interrupt Program Status Register (IPSR) */ - -#define ARMV7M_IPSR_ISR_SHIFT 0 /* Bits 8-0: ISR number */ -#define ARMV7M_IPSR_ISR_MASK (0x1ff << ARMV7M_IPSR_ISR_SHIFT) - -/* Execution PSR Register (EPSR) */ - -#define ARMV7M_EPSR_ICIIT1_SHIFT 10 /* Bits 15-10: Interrupt-Continuable-Instruction/If-Then bits */ -#define ARMV7M_EPSR_ICIIT1_MASK (3 << ARMV7M_EPSR_ICIIT1_SHIFT) -#define ARMV7M_EPSR_T (1 << 24) /* Bit 24: T-bit */ -#define ARMV7M_EPSR_ICIIT2_SHIFT 25 /* Bits 26-25: Interrupt-Continuable-Instruction/If-Then bits */ -#define ARMV7M_EPSR_ICIIT2_MASK (3 << ARMV7M_EPSR_ICIIT2_SHIFT) - -/* Save xPSR bits */ - -#define ARMV7M_XPSR_ISR_SHIFT ARMV7M_IPSR_ISR_SHIFT -#define ARMV7M_XPSR_ISR_MASK ARMV7M_IPSR_ISR_MASK -#define ARMV7M_XPSR_ICIIT1_SHIFT ARMV7M_EPSR_ICIIT1_SHIFT/ -#define ARMV7M_XPSR_ICIIT1_MASK ARMV7M_EPSR_ICIIT1_MASK -#define ARMV7M_XPSR_T ARMV7M_EPSR_T -#define ARMV7M_XPSR_ICIIT2_SHIFT ARMV7M_EPSR_ICIIT2_SHIFT -#define ARMV7M_XPSR_ICIIT2_MASK ARMV7M_EPSR_ICIIT2_MASK -#define ARMV7M_XPSR_Q ARMV7M_APSR_Q -#define ARMV7M_XPSR_V ARMV7M_APSR_V -#define ARMV7M_XPSR_C ARMV7M_APSR_C -#define ARMV7M_XPSR_Z ARMV7M_APSR_Z -#define ARMV7M_XPSR_N ARMV7M_APSR_N - -/************************************************************************************ - * Inline Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */ diff --git a/nuttx/arch/arm/src/armv7-m/svcall.h b/nuttx/arch/arm/src/armv7-m/svcall.h deleted file mode 100644 index 675829799..000000000 --- a/nuttx/arch/arm/src/armv7-m/svcall.h +++ /dev/null @@ -1,94 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/svcall.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_CORTEXM_SVCALL_H -#define __ARCH_ARM_SRC_COMMON_CORTEXM_SVCALL_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -#ifdef CONFIG_NUTTX_KERNEL -# include <syscall.h> -#endif - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Configuration ********************************************************************/ -/* This logic uses three system calls {0,1,2} for context switching. The first three - * syscall values must be reserved. - */ - -#ifdef CONFIG_NUTTX_KERNEL -# ifndef CONFIG_SYS_RESERVED -# error "CONFIG_SYS_RESERVED must be defined to the value 3" -# elif CONFIG_SYS_RESERVED != 3 -# error "CONFIG_SYS_RESERVED must have the value 3" -# endif -#endif - -/* Cortex M3 system calls ***********************************************************/ - -/* SYS call 0: - * - * int up_saveusercontext(uint32_t *saveregs); - */ - -#define SYS_save_context (0) - -/* SYS call 1: - * - * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; - */ - -#define SYS_restore_context (1) - -/* SYS call 2: - * - * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); - */ - -#define SYS_switch_context (2) - -/************************************************************************************ - * Inline Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_COMMON_CORTEXM_SVCALL_H */ - diff --git a/nuttx/arch/arm/src/armv7-m/up_assert.c b/nuttx/arch/arm/src/armv7-m/up_assert.c deleted file mode 100644 index b40b1090c..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_assert.c +++ /dev/null @@ -1,340 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_assert.c - * - * Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <stdlib.h> -#include <assert.h> -#include <debug.h> - -#include <nuttx/irq.h> -#include <nuttx/arch.h> -#include <arch/board/board.h> - -#include "up_arch.h" -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Output debug info if stack dump is selected -- even if - * debug is not selected. - */ - -#ifdef CONFIG_ARCH_STACKDUMP -# undef lldbg -# define lldbg lowsyslog -#endif - -/* The following is just intended to keep some ugliness out of the mainline - * code. We are going to print the task name if: - * - * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name - * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used) - * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used - */ - -#undef CONFIG_PRINT_TASKNAME -#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP)) -# define CONFIG_PRINT_TASKNAME 1 -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_getsp - ****************************************************************************/ - -/* I don't know if the builtin to get SP is enabled */ - -static inline uint32_t up_getsp(void) -{ - uint32_t sp; - __asm__ - ( - "\tmov %0, sp\n\t" - : "=r"(sp) - ); - return sp; -} - -/**************************************************************************** - * Name: up_stackdump - ****************************************************************************/ - -#ifdef CONFIG_ARCH_STACKDUMP -static void up_stackdump(uint32_t sp, uint32_t stack_base) -{ - uint32_t stack ; - - for (stack = sp & ~0x1f; stack < stack_base; stack += 32) - { - uint32_t *ptr = (uint32_t*)stack; - lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n", - stack, ptr[0], ptr[1], ptr[2], ptr[3], - ptr[4], ptr[5], ptr[6], ptr[7]); - } -} -#else -# define up_stackdump() -#endif - -/**************************************************************************** - * Name: up_registerdump - ****************************************************************************/ - -#ifdef CONFIG_ARCH_STACKDUMP -static inline void up_registerdump(void) -{ - /* Are user registers available from interrupt processing? */ - - if (current_regs) - { - /* Yes.. dump the interrupt registers */ - - lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], - current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], - current_regs[REG_R6], current_regs[REG_R7]); - lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], - current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], - current_regs[REG_R14], current_regs[REG_R15]); -#ifdef CONFIG_ARMV7M_USEBASEPRI - lldbg("xPSR: %08x BASEPRI: %08x\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI]); -#else - lldbg("xPSR: %08x PRIMASK: %08x\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); -#endif - } -} -#else -# define up_registerdump() -#endif - -/**************************************************************************** - * Name: up_dumpstate - ****************************************************************************/ - -#ifdef CONFIG_ARCH_STACKDUMP -static void up_dumpstate(void) -{ - _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32_t sp = up_getsp(); - uint32_t ustackbase; - uint32_t ustacksize; -#if CONFIG_ARCH_INTERRUPTSTACK > 3 - uint32_t istackbase; - uint32_t istacksize; -#endif - - /* Get the limits on the user stack memory */ - - if (rtcb->pid == 0) - { - ustackbase = g_heapbase - 4; - ustacksize = CONFIG_IDLETHREAD_STACKSIZE; - } - else - { - ustackbase = (uint32_t)rtcb->adj_stack_ptr; - ustacksize = (uint32_t)rtcb->adj_stack_size; - } - - /* Get the limits on the interrupt stack memory */ - -#if CONFIG_ARCH_INTERRUPTSTACK > 3 - istackbase = (uint32_t)&g_intstackbase; - istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4; - - /* Show interrupt stack info */ - - lldbg("sp: %08x\n", sp); - lldbg("IRQ stack:\n"); - lldbg(" base: %08x\n", istackbase); - lldbg(" size: %08x\n", istacksize); - - /* Does the current stack pointer lie within the interrupt - * stack? - */ - - if (sp <= istackbase && sp > istackbase - istacksize) - { - /* Yes.. dump the interrupt stack */ - - up_stackdump(sp, istackbase); - } - - /* Extract the user stack pointer if we are in an interrupt handler. - * If we are not in an interrupt handler. Then sp is the user stack - * pointer (and the above range check should have failed). - */ - - if (current_regs) - { - sp = current_regs[REG_R13]; - lldbg("sp: %08x\n", sp); - } - - lldbg("User stack:\n"); - lldbg(" base: %08x\n", ustackbase); - lldbg(" size: %08x\n", ustacksize); - - /* Dump the user stack if the stack pointer lies within the allocated user - * stack memory. - */ - - if (sp <= ustackbase && sp > ustackbase - ustacksize) - { - up_stackdump(sp, ustackbase); - } -#else - lldbg("sp: %08x\n", sp); - lldbg("stack base: %08x\n", ustackbase); - lldbg("stack size: %08x\n", ustacksize); - - /* Dump the user stack if the stack pointer lies within the allocated user - * stack memory. - */ - - if (sp > ustackbase || sp <= ustackbase - ustacksize) - { - lldbg("ERROR: Stack pointer is not within allocated stack\n"); - } - else - { - up_stackdump(sp, ustackbase); - } -#endif - - /* Then dump the registers (if available) */ - - up_registerdump(); -} -#else -# define up_dumpstate() -#endif - -/**************************************************************************** - * Name: _up_assert - ****************************************************************************/ - -static void _up_assert(int errorcode) noreturn_function; -static void _up_assert(int errorcode) -{ - /* Are we in an interrupt handler or the idle task? */ - - if (current_regs || ((_TCB*)g_readytorun.head)->pid == 0) - { - (void)irqsave(); - for(;;) - { -#ifdef CONFIG_ARCH_LEDS - up_ledon(LED_PANIC); - up_mdelay(250); - up_ledoff(LED_PANIC); - up_mdelay(250); -#endif - } - } - else - { - exit(errorcode); - } -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_assert - ****************************************************************************/ - -void up_assert(const uint8_t *filename, int lineno) -{ -#ifdef CONFIG_PRINT_TASKNAME - _TCB *rtcb = (_TCB*)g_readytorun.head; -#endif - - up_ledon(LED_ASSERTION); -#ifdef CONFIG_PRINT_TASKNAME - lldbg("Assertion failed at file:%s line: %d task: %s\n", - filename, lineno, rtcb->name); -#else - lldbg("Assertion failed at file:%s line: %d\n", - filename, lineno); -#endif - up_dumpstate(); - _up_assert(EXIT_FAILURE); -} - -/**************************************************************************** - * Name: up_assert_code - ****************************************************************************/ - -void up_assert_code(const uint8_t *filename, int lineno, int errorcode) -{ -#ifdef CONFIG_PRINT_TASKNAME - _TCB *rtcb = (_TCB*)g_readytorun.head; -#endif - - up_ledon(LED_ASSERTION); -#ifdef CONFIG_PRINT_TASKNAME - lldbg("Assertion failed at file:%s line: %d task: %s error code: %d\n", - filename, lineno, rtcb->name, errorcode); -#else - lldbg("Assertion failed at file:%s line: %d error code: %d\n", - filename, lineno, errorcode); -#endif - up_dumpstate(); - _up_assert(errorcode); -} diff --git a/nuttx/arch/arm/src/armv7-m/up_blocktask.c b/nuttx/arch/arm/src/armv7-m/up_blocktask.c deleted file mode 100644 index 896476ed2..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_blocktask.c +++ /dev/null @@ -1,167 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_blocktask.c - * - * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdbool.h> -#include <sched.h> -#include <debug.h> - -#include <nuttx/arch.h> - -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_block_task - * - * Description: - * The currently executing task at the head of - * the ready to run list must be stopped. Save its context - * and move it to the inactive list specified by task_state. - * - * Inputs: - * tcb: Refers to a task in the ready-to-run list (normally - * the task at the head of the list). It most be - * stopped, its context saved and moved into one of the - * waiting task lists. It it was the task at the head - * of the ready-to-run list, then a context to the new - * ready to run task must be performed. - * task_state: Specifies which waiting task list should be - * hold the blocked task TCB. - * - ****************************************************************************/ - -void up_block_task(_TCB *tcb, tstate_t task_state) -{ - /* Verify that the context switch can be performed */ - - if ((tcb->task_state < FIRST_READY_TO_RUN_STATE) || - (tcb->task_state > LAST_READY_TO_RUN_STATE)) - { - PANIC(OSERR_BADBLOCKSTATE); - } - else - { - _TCB *rtcb = (_TCB*)g_readytorun.head; - bool switch_needed; - - /* Remove the tcb task from the ready-to-run list. If we - * are blocking the task at the head of the task list (the - * most likely case), then a context switch to the next - * ready-to-run task is needed. In this case, it should - * also be true that rtcb == tcb. - */ - - switch_needed = sched_removereadytorun(tcb); - - /* Add the task to the specified blocked task list */ - - sched_addblocked(tcb, (tstate_t)task_state); - - /* If there are any pending tasks, then add them to the g_readytorun - * task list now - */ - - if (g_pendingtasks.head) - { - switch_needed |= sched_mergepending(); - } - - /* Now, perform the context switch if one is needed */ - - if (switch_needed) - { - /* Are we in an interrupt handler? */ - - if (current_regs) - { - /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. - */ - - up_savestate(rtcb->xcp.regs); - - /* Restore the exception context of the rtcb at the (new) head - * of the g_readytorun task list. - */ - - rtcb = (_TCB*)g_readytorun.head; - - /* Then switch contexts */ - - up_restorestate(rtcb->xcp.regs); - } - - /* No, then we will need to perform the user context switch */ - - else - { - /* Switch context to the context of the task at the head of the - * ready to run list. - */ - - _TCB *nexttcb = (_TCB*)g_readytorun.head; - up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); - - /* up_switchcontext forces a context switch to the task at the - * head of the ready-to-run list. It does not 'return' in the - * normal sense. When it does return, it is because the blocked - * task is again ready to run and has execution priority. - */ - } - } - } -} diff --git a/nuttx/arch/arm/src/armv7-m/up_copystate.c b/nuttx/arch/arm/src/armv7-m/up_copystate.c deleted file mode 100644 index e9eede8f9..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_copystate.c +++ /dev/null @@ -1,86 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_copystate.c - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> - -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_copystate - ****************************************************************************/ - -/* A little faster than most memcpy's */ - -void up_copystate(uint32_t *dest, uint32_t *src) -{ - int i; - - /* In the Cortex-M3 model, the state is copied from the stack to the TCB, - * but only a reference is passed to get the state from the TCB. So the - * following check avoids copying the TCB save area onto itself: - */ - - if (src != dest) - { - for (i = 0; i < XCPTCONTEXT_REGS; i++) - { - *dest++ = *src++; - } - } -} - diff --git a/nuttx/arch/arm/src/armv7-m/up_doirq.c b/nuttx/arch/arm/src/armv7-m/up_doirq.c deleted file mode 100644 index 6063f9ca1..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_doirq.c +++ /dev/null @@ -1,125 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_doirq.c - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <assert.h> - -#include <nuttx/irq.h> -#include <nuttx/arch.h> -#include <arch/board/board.h> - -#include "up_arch.h" -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -uint32_t *up_doirq(int irq, uint32_t *regs) -{ - up_ledon(LED_INIRQ); -#ifdef CONFIG_SUPPRESS_INTERRUPTS - PANIC(OSERR_ERREXCEPTION); -#else - uint32_t *savestate; - - /* Nested interrupts are not supported in this implementation. If you want - * to implement nested interrupts, you would have to (1) change the way that - * current_regs is handled and (2) the design associated with - * CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for - * that purpose as implemented here because only the outermost nested - * interrupt can result in a context switch (it can probably be deleted). - */ - - /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. - */ - - savestate = (uint32_t*)current_regs; - current_regs = regs; - - /* Mask and acknowledge the interrupt */ - - up_maskack_irq(irq); - - /* Deliver the IRQ */ - - irq_dispatch(irq, regs); - - /* If a context switch occurred while processing the interrupt then - * current_regs may have change value. If we return any value different - * from the input regs, then the lower level will know that a context - * switch occurred during interrupt processing. - */ - - regs = (uint32_t*)current_regs; - - /* Restore the previous value of current_regs. NULL would indicate that - * we are no longer in an interrupt handler. It will be non-NULL if we - * are returning from a nested interrupt. - */ - - current_regs = savestate; - - /* Unmask the last interrupt (global interrupts are still disabled) */ - - up_enable_irq(irq); -#endif - up_ledoff(LED_INIRQ); - return regs; -} diff --git a/nuttx/arch/arm/src/armv7-m/up_elf.c b/nuttx/arch/arm/src/armv7-m/up_elf.c deleted file mode 100644 index b838a6905..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_elf.c +++ /dev/null @@ -1,450 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_elf.c - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdlib.h> -#include <elf32.h> -#include <errno.h> -#include <debug.h> - -#include <arch/elf.h> -#include <nuttx/arch.h> -#include <nuttx/binfmt/elf.h> - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: arch_checkarch - * - * Description: - * Given the ELF header in 'hdr', verify that the ELF file is appropriate - * for the current, configured architecture. Every architecture that uses - * the ELF loader must provide this function. - * - * Input Parameters: - * hdr - The ELF header read from the ELF file. - * - * Returned Value: - * True if the architecture supports this ELF file. - * - ****************************************************************************/ - -bool arch_checkarch(FAR const Elf32_Ehdr *ehdr) -{ - /* Make sure it's an ARM executable */ - - if (ehdr->e_machine != EM_ARM) - { - bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine); - return -ENOEXEC; - } - - /* Make sure that 32-bit objects are supported */ - - if (ehdr->e_ident[EI_CLASS] != ELFCLASS32) - { - bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]); - return -ENOEXEC; - } - - /* Verify endian-ness */ - -#ifdef CONFIG_ENDIAN_BIG - if (ehdr->e_ident[EI_DATA] != ELFDATA2MSB) -#else - if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB) -#endif - { - bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]); - return -ENOEXEC; - } - - /* TODO: Check ABI here. */ - return OK; -} - -/**************************************************************************** - * Name: arch_relocate and arch_relocateadd - * - * Description: - * Perform on architecture-specific ELF relocation. Every architecture - * that uses the ELF loader must provide this function. - * - * Input Parameters: - * rel - The relocation type - * sym - The ELF symbol structure containing the fully resolved value. - * addr - The address that requires the relocation. - * - * Returned Value: - * Zero (OK) if the relocation was successful. Otherwise, a negated errno - * value indicating the cause of the relocation failure. - * - ****************************************************************************/ - -int arch_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym, - uintptr_t addr) -{ - int32_t offset; - uint32_t upper_insn; - uint32_t lower_insn; - - switch (ELF32_R_TYPE(rel->r_info)) - { - case R_ARM_NONE: - { - /* No relocation */ - } - break; - - case R_ARM_PC24: - case R_ARM_CALL: - case R_ARM_JUMP24: - { - bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n", - ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr), - sym, (long)sym->st_value); - - offset = (*(uint32_t*)addr & 0x00ffffff) << 2; - if (offset & 0x02000000) - { - offset -= 0x04000000; - } - - offset += sym->st_value - addr; - if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000) - { - bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n", - ELF32_R_TYPE(rel->r_info), offset); - - return -EINVAL; - } - - offset >>= 2; - - *(uint32_t*)addr &= 0xff000000; - *(uint32_t*)addr |= offset & 0x00ffffff; - } - break; - - case R_ARM_ABS32: - case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */ - { - bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n", - (long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value); - - *(uint32_t*)addr += sym->st_value; - } - break; - - case R_ARM_THM_CALL: - case R_ARM_THM_JUMP24: - { - uint32_t S; - uint32_t J1; - uint32_t J2; - - /* Thumb BL and B.W instructions. Encoding: - * - * upper_insn: - * - * 1 1 1 1 1 1 - * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +----------+---+-------------------------------+--------------+ - * |1 1 1 |OP1| OP2 | | 32-Bit Instructions - * +----------+---+--+-----+----------------------+--------------+ - * |1 1 1 | 1 0| S | imm10 | BL Instruction - * +----------+------+-----+-------------------------------------+ - * - * lower_insn: - * - * 1 1 1 1 1 1 - * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +---+---------------------------------------------------------+ - * |OP | | 32-Bit Instructions - * +---+--+---+---+---+------------------------------------------+ - * |1 1 |J1 | 1 |J2 | imm11 | BL Instruction - * +------+---+---+---+------------------------------------------+ - * - * The branch target is encoded in these bits: - * - * S = upper_insn[10] - * imm10 = upper_insn[0:9] - * imm11 = lower_insn[0:10] - * J1 = lower_insn[13] - * J2 = lower_insn[11] - */ - - upper_insn = (uint32_t)(*(uint16_t*)addr); - lower_insn = (uint32_t)(*(uint16_t*)(addr + 2)); - - bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n", - ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn, - sym, (long)sym->st_value); - - /* Extract the 25-bit offset from the 32-bit instruction: - * - * offset[24] = S - * offset[23] = ~(J1 ^ S) - * offset[22] = ~(J2 ^ S)] - * offset[12:21] = imm10 - * offset[1:11] = imm11 - * offset[0] = 0 - */ - - S = (upper_insn >> 10) & 1; - J1 = (lower_insn >> 13) & 1; - J2 = (lower_insn >> 11) & 1; - - offset = (S << 24) | /* S - > offset[24] */ - ((~(J1 ^ S) & 1) << 23) | /* J1 -> offset[23] */ - ((~(J2 ^ S) & 1) << 22) | /* J2 -> offset[22] */ - ((upper_insn & 0x03ff) << 12) | /* imm10 -> offset[12:21] */ - ((lower_insn & 0x07ff) << 1); /* imm11 -> offset[1:11] */ - /* 0 -> offset[0] */ - - /* Sign extend */ - - if (offset & 0x01000000) - { - offset -= 0x02000000; - } - - /* And perform the relocation */ - - bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n", - S, J1, J2, (long)offset, offset + sym->st_value - addr); - - offset += sym->st_value - addr; - - /* Is this a function symbol? If so, then the branch target must be - * an odd Thumb address - */ - - if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0) - { - bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n", - ELF32_R_TYPE(rel->r_info), offset); - - return -EINVAL; - } - - /* Check the range of the offset */ - - if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000) - { - bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n", - ELF32_R_TYPE(rel->r_info), offset); - - return -EINVAL; - } - - /* Now, reconstruct the 32-bit instruction using the new, relocated - * branch target. - */ - - S = (offset >> 24) & 1; - J1 = S ^ (~(offset >> 23) & 1); - J2 = S ^ (~(offset >> 22) & 1); - - upper_insn = ((upper_insn & 0xf800) | (S << 10) | ((offset >> 12) & 0x03ff)); - *(uint16_t*)addr = (uint16_t)upper_insn; - - lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff)); - *(uint16_t*)(addr + 2) = (uint16_t)lower_insn; - - bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n", - S, J1, J2, (int)upper_insn, (int)lower_insn); - } - break; - - case R_ARM_V4BX: - { - bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n", - (long)addr, (long)(*(uint32_t*)addr)); - - /* Preserve only Rm and the condition code */ - - *(uint32_t*)addr &= 0xf000000f; - - /* Change instruction to 'mov pc, Rm' */ - - *(uint32_t*)addr |= 0x01a0f000; - } - break; - - case R_ARM_PREL31: - { - bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n", - (long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value); - - offset = *(uint32_t*)addr + sym->st_value - addr; - *(uint32_t*)addr = offset & 0x7fffffff; - } - break; - - case R_ARM_MOVW_ABS_NC: - case R_ARM_MOVT_ABS: - { - bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n", - ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr), - sym, (long)sym->st_value); - - offset = *(uint32_t*)addr; - offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); - offset = (offset ^ 0x8000) - 0x8000; - - offset += sym->st_value; - if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS) - { - offset >>= 16; - } - - *(uint32_t*)addr &= 0xfff0f000; - *(uint32_t*)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff); - } - break; - - case R_ARM_THM_MOVW_ABS_NC: - case R_ARM_THM_MOVT_ABS: - { - /* Thumb BL and B.W instructions. Encoding: - * - * upper_insn: - * - * 1 1 1 1 1 1 - * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +----------+---+-------------------------------+--------------+ - * |1 1 1 |OP1| OP2 | | 32-Bit Instructions - * +----------+---+--+-----+----------------------+--------------+ - * |1 1 1 | 1 0| i | 1 0 1 1 0 0 | imm4 | MOVT Instruction - * +----------+------+-----+----------------------+--------------+ - * - * lower_insn: - * - * 1 1 1 1 1 1 - * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +---+---------------------------------------------------------+ - * |OP | | 32-Bit Instructions - * +---+----------+--------------+-------------------------------+ - * |0 | imm3 | Rd | imm8 | MOVT Instruction - * +---+----------+--------------+-------------------------------+ - * - * The 16-bit immediate value is encoded in these bits: - * - * i = imm16[11] = upper_insn[10] - * imm4 = imm16[12:15] = upper_insn[3:0] - * imm3 = imm16[8:10] = lower_insn[14:12] - * imm8 = imm16[0:7] = lower_insn[7:0] - */ - - upper_insn = (uint32_t)(*(uint16_t*)addr); - lower_insn = (uint32_t)(*(uint16_t*)(addr + 2)); - - bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n", - ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn, - sym, (long)sym->st_value); - - /* Extract the 16-bit offset from the 32-bit instruction */ - - offset = ((upper_insn & 0x000f) << 12) | /* imm4 -> imm16[8:10] */ - ((upper_insn & 0x0400) << 1) | /* i -> imm16[11] */ - ((lower_insn & 0x7000) >> 4) | /* imm3 -> imm16[8:10] */ - (lower_insn & 0x00ff); /* imm8 -> imm16[0:7] */ - - /* Sign extend */ - - offset = (offset ^ 0x8000) - 0x8000; - - /* And perform the relocation */ - - bvdbg(" offset=%08lx branch target=%08lx\n", - (long)offset, offset + sym->st_value); - - offset += sym->st_value; - - /* Update the immediate value in the instruction. For MOVW we want the bottom - * 16-bits; for MOVT we want the top 16-bits. - */ - - if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) - { - offset >>= 16; - } - - upper_insn = ((upper_insn & 0xfbf0) | ((offset & 0xf000) >> 12) | ((offset & 0x0800) >> 1)); - *(uint16_t*)addr = (uint16_t)upper_insn; - - lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff)); - *(uint16_t*)(addr + 2) = (uint16_t)lower_insn; - - bvdbg(" insn [%04x %04x]\n", - (int)upper_insn, (int)lower_insn); - } - break; - - default: - bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info)); - return -EINVAL; - } - - return OK; -} - -int arch_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym, - uintptr_t addr) -{ - bdbg("RELA relocation not supported\n"); - return -ENOSYS; -} - diff --git a/nuttx/arch/arm/src/armv7-m/up_exception.S b/nuttx/arch/arm/src/armv7-m/up_exception.S deleted file mode 100644 index 17344db41..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_exception.S +++ /dev/null @@ -1,246 +0,0 @@ -/************************************************************************************ - * arch/arm/src/stm32/up_exception.S - * arch/arm/src/chip/up_exception.S - * - * Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. - * Copyright (C) 2012 Michael Smith. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -#include <arch/irq.h> -#include "exc_return.h" - -#include "chip.h" - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .globl exception_common - - .syntax unified - .thumb - .file "up_exception.S" - -/************************************************************************************ - * .text - ************************************************************************************/ - -/* Common exception handling logic. On entry here, the return stack is on either - * the PSP or the MSP and looks like the following: - * - * REG_XPSR - * REG_R15 - * REG_R14 - * REG_R12 - * REG_R3 - * REG_R2 - * REG_R1 - * MSP->REG_R0 - * - * And - * IPSR contains the IRQ number - * R14 Contains the EXC_RETURN value - * We are in handler mode and the current SP is the MSP - * - * If CONFIG_ARCH_FPU is defined, the volatile FP registers and FPSCR are on the - * return stack immediately above REG_XPSR. - */ - - .text - .type exception_common, function - .thumb_func -exception_common: - - mrs r0, ipsr /* R0=exception number */ - - /* Complete the context save */ - - /* The EXC_RETURN value tells us whether the context is on the MSP or PSP */ - - tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */ - ite eq /* next two instructions conditional */ - mrseq r1, msp /* R1=The main stack pointer */ - mrsne r1, psp /* R1=The process stack pointer */ - - mov r2, r1 /* R2=Copy of the main/process stack pointer */ - add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */ - /* (ignoring the xPSR[9] alignment bit) */ -#ifdef CONFIG_ARMV7M_USEBASEPRI - mrs r3, basepri /* R3=Current BASEPRI setting */ -#else - mrs r3, primask /* R3=Current PRIMASK setting */ -#endif - -#ifdef CONFIG_ARCH_FPU - - /* Save the non-volatile FP registers here. - * - * This routine is the only point where we can save these registers; either before - * or after calling up_doirq. The compiler is free to use them at any time as long - * as they are restored before returning, so we can't assume that we can get at the - * true values of these registers in any routine called from here. - * - * XXX we could do all this saving lazily on the context switch side if we knew where to put - * the registers. - */ - - vstmdb r1!, {s16-s31} /* Save the non-volatile FP context */ - -#endif - - stmdb r1!, {r2-r11,r14} /* Save the remaining registers plus the SP/PRIMASK values */ - - /* Disable interrupts, select the stack to use for interrupt handling - * and call up_doirq to handle the interrupt - */ - - cpsid i /* Disable further interrupts */ - - /* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will use a special interrupt - * stack pointer. The way that this is done here prohibits nested interrupts! - * Otherwise, we will use the stack that was current when the interrupt was taken. - */ - -#if CONFIG_ARCH_INTERRUPTSTACK > 3 - ldr sp, =g_intstackbase - push {r1} /* Save the MSP on the interrupt stack */ - bl up_doirq /* R0=IRQ, R1=register save area on stack */ - pop {r1} /* Recover R1=main stack pointer */ -#else - msr msp, r1 /* We are using the main stack pointer */ - bl up_doirq /* R0=IRQ, R1=register save area on stack */ - mrs r1, msp /* Recover R1=main stack pointer */ -#endif - - /* On return from up_doirq, R0 will hold a pointer to register context - * array to use for the interrupt return. If that return value is the same - * as current stack pointer, then things are relatively easy. - */ - - cmp r0, r1 /* Context switch? */ - beq 1f /* Branch if no context switch */ - - /* We are returning with a pending context switch. This case is different - * because in this case, the register save structure does not lie on the - * stack but, rather within a TCB structure. We'll have to copy some - * values to the stack. - */ - - /* Copy the hardware-saved context to the stack, and restore the software - * saved context directly. - * - * XXX In the normal case, it appears that this entire operation is unnecessary; - * context switch time would be improved if we could work out when the stack - * is dirty and avoid the work... - */ - - add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */ - ldmia r1!, {r4-r11} /* Fetch eight registers in HW save area */ -#ifdef CONFIG_ARCH_FPU - vldmia r1!, {s0-s15} /* Fetch sixteen FP registers in HW save area */ - ldmia r1, {r2-r3} /* Fetch FPSCR and Reserved in HW save area */ -#endif - ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */ -#ifdef CONFIG_ARCH_FPU - stmdb r1!, {r2-r3} /* Store FPSCR and Reserved on the return stack */ - vstmdb r1!, {s0-s15} /* Store sixteen FP registers on the return stack */ -#endif - stmdb r1!, {r4-r11} /* Store eight registers on the return stack */ - ldmia r0!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */ -#ifdef CONFIG_ARCH_FPU - vldmia r0, {s16-s31} /* Recover S16-S31 */ -#endif - - b 2f /* Re-join common logic */ - -1: - /* We are returning with no context switch. We simply need to "unwind" - * the same stack frame that we created at entry. - */ - - ldmia r1!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */ -#ifdef CONFIG_ARCH_FPU - vldmia r1!, {s16-s31} /* Recover S16-S31 */ -#endif - -2: - /* The EXC_RETURN value tells us whether we are returning on the MSP or PSP - */ - - tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */ - ite eq /* next two instructions conditional */ - msreq msp, r1 /* R1=The main stack pointer */ - msrne psp, r1 /* R1=The process stack pointer */ - - /* Restore the interrupt state */ - -#ifdef CONFIG_ARMV7M_USEBASEPRI - msr basepri, r3 /* Restore interrupts priority masking*/ - cpsie i /* Re-enable interrupts */ -#else - msr primask, r3 /* Restore interrupts */ -#endif - - /* Always return with R14 containing the special value that will: (1) - * return to thread mode, and (2) select the correct stack. - */ - - bx r14 /* And return */ - - .size exception_common, .-exception_common - -/************************************************************************************ - * Name: up_interruptstack/g_intstackbase - * - * Description: - * Shouldn't happen - * - ************************************************************************************/ - -#if CONFIG_ARCH_INTERRUPTSTACK > 3 - .bss - .global g_intstackbase - .align 4 -up_interruptstack: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~3) -g_intstackbase: - .size up_interruptstack, .-up_interruptstack -#endif - - .end - diff --git a/nuttx/arch/arm/src/armv7-m/up_fpu.S b/nuttx/arch/arm/src/armv7-m/up_fpu.S deleted file mode 100644 index 707420f06..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_fpu.S +++ /dev/null @@ -1,286 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/stm32_fpu.S - * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ -/* - * When this file is assembled, it will require the following GCC options: - * - * -mcpu=cortex-m3 -mfloat-abi=hard -mfpu=vfp -meabi=5 - */ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -#include <arch/irq.h> - -#ifdef CONFIG_ARCH_FPU - -/************************************************************************************ - * Preprocessor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .globl up_savefpu - .globl up_restorefpu - - .syntax unified - .thumb - .file "up_fpu.S" - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: up_savefpu - * - * Description: - * Given the pointer to a register save area (in R0), save the state of the - * floating point registers. - * - * C Function Prototype: - * void up_savefpu(uint32_t *regs); - * - * Input Parameters: - * regs - A pointer to the register save area in which to save the floating point - * registers - * - * Returned Value: - * None - * - ************************************************************************************/ - - .thumb_func - .type up_savefpu, function -up_savefpu: - - add r1, r0, #(4*REG_S0) /* R1=Address of FP register storage */ - - /* Some older GNU assemblers don't support all the newer UAL mnemonics. */ - -#if 1 /* Use UAL mnemonics */ - /* Store all floating point registers. Registers are stored in numeric order, - * s0, s1, ... in increasing address order. - */ - - vstmia r1!, {s0-s31} /* Save the full FP context */ - - /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. - */ - - vmrs r2, fpscr /* Fetch the FPCSR */ - str r2, [r1], #4 /* Save the floating point control and status register */ -#else - /* Store all floating point registers */ - -#if 1 /* Use store multiple */ - fstmias r1!, {s0-s31} /* Save the full FP context */ -#else - vmov r2, r3, d0 /* r2, r3 = d0 */ - str r2, [r1], #4 /* Save S0 and S1 values */ - str r3, [r1], #4 - vmov r2, r3, d1 /* r2, r3 = d1 */ - str r2, [r1], #4 /* Save S2 and S3 values */ - str r3, [r1], #4 - vmov r2, r3, d2 /* r2, r3 = d2 */ - str r2, [r1], #4 /* Save S4 and S5 values */ - str r3, [r1], #4 - vmov r2, r3, d3 /* r2, r3 = d3 */ - str r2, [r1], #4 /* Save S6 and S7 values */ - str r3, [r1], #4 - vmov r2, r3, d4 /* r2, r3 = d4 */ - str r2, [r1], #4 /* Save S8 and S9 values */ - str r3, [r1], #4 - vmov r2, r3, d5 /* r2, r3 = d5 */ - str r2, [r1], #4 /* Save S10 and S11 values */ - str r3, [r1], #4 - vmov r2, r3, d6 /* r2, r3 = d6 */ - str r2, [r1], #4 /* Save S12 and S13 values */ - str r3, [r1], #4 - vmov r2, r3, d7 /* r2, r3 = d7 */ - str r2, [r1], #4 /* Save S14 and S15 values */ - str r3, [r1], #4 - vmov r2, r3, d8 /* r2, r3 = d8 */ - str r2, [r1], #4 /* Save S16 and S17 values */ - str r3, [r1], #4 - vmov r2, r3, d9 /* r2, r3 = d9 */ - str r2, [r1], #4 /* Save S18 and S19 values */ - str r3, [r1], #4 - vmov r2, r3, d10 /* r2, r3 = d10 */ - str r2, [r1], #4 /* Save S20 and S21 values */ - str r3, [r1], #4 - vmov r2, r3, d11 /* r2, r3 = d11 */ - str r2, [r1], #4 /* Save S22 and S23 values */ - str r3, [r1], #4 - vmov r2, r3, d12 /* r2, r3 = d12 */ - str r2, [r1], #4 /* Save S24 and S25 values */ - str r3, [r1], #4 - vmov r2, r3, d13 /* r2, r3 = d13 */ - str r2, [r1], #4 /* Save S26 and S27 values */ - str r3, [r1], #4 - vmov r2, r3, d14 /* r2, r3 = d14 */ - str r2, [r1], #4 /* Save S28 and S29 values */ - str r3, [r1], #4 - vmov r2, r3, d15 /* r2, r3 = d15 */ - str r2, [r1], #4 /* Save S30 and S31 values */ - str r3, [r1], #4 -#endif - - /* Store the floating point control and status register */ - - fmrx r2, fpscr /* Fetch the FPCSR */ - str r2, [r1], #4 /* Save the floating point control and status register */ -#endif - bx lr - - .size up_savefpu, .-up_savefpu - -/************************************************************************************ - * Name: up_restorefpu - * - * Description: - * Given the pointer to a register save area (in R0), restore the state of the - * floating point registers. - * - * C Function Prototype: - * void up_restorefpu(const uint32_t *regs); - * - * Input Parameters: - * regs - A pointer to the register save area containing the floating point - * registers. - * - * Returned Value: - * This function does not return anything explicitly. However, it is called from - * interrupt level assembly logic that assumes that r0 is preserved. - * - ************************************************************************************/ - - .thumb_func - .type up_restorefpu, function -up_restorefpu: - - add r1, r0, #(4*REG_S0) /* R1=Address of FP register storage */ - - /* Some older GNU assemblers don't support all the newer UAL mnemonics. */ - -#if 1 /* Use UAL mnemonics */ - /* Load all floating point registers. Registers are loaded in numeric order, - * s0, s1, ... in increasing address order. - */ - - vldmia r1!, {s0-s31} /* Restore the full FP context */ - - /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. - */ - - ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ -#else - /* Load all floating point registers Registers are loaded in numeric order, - * s0, s1, ... in increasing address order. - */ - -#if 1 /* Use load multiple */ - fldmias r1!, {s0-s31} /* Restore the full FP context */ -#else - ldr r2, [r1], #4 /* Fetch S0 and S1 values */ - ldr r3, [r1], #4 - vmov d0, r2, r3 /* Save as d0 */ - ldr r2, [r1], #4 /* Fetch S2 and S3 values */ - ldr r3, [r1], #4 - vmov d1, r2, r3 /* Save as d1 */ - ldr r2, [r1], #4 /* Fetch S4 and S5 values */ - ldr r3, [r1], #4 - vmov d2, r2, r3 /* Save as d2 */ - ldr r2, [r1], #4 /* Fetch S6 and S7 values */ - ldr r3, [r1], #4 - vmov d3, r2, r3 /* Save as d3 */ - ldr r2, [r1], #4 /* Fetch S8 and S9 values */ - ldr r3, [r1], #4 - vmov d4, r2, r3 /* Save as d4 */ - ldr r2, [r1], #4 /* Fetch S10 and S11 values */ - ldr r3, [r1], #4 - vmov d5, r2, r3 /* Save as d5 */ - ldr r2, [r1], #4 /* Fetch S12 and S13 values */ - ldr r3, [r1], #4 - vmov d6, r2, r3 /* Save as d6 */ - ldr r2, [r1], #4 /* Fetch S14 and S15 values */ - ldr r3, [r1], #4 - vmov d7, r2, r3 /* Save as d7 */ - ldr r2, [r1], #4 /* Fetch S16 and S17 values */ - ldr r3, [r1], #4 - vmov d8, r2, r3 /* Save as d8 */ - ldr r2, [r1], #4 /* Fetch S18 and S19 values */ - ldr r3, [r1], #4 - vmov d9, r2, r3 /* Save as d9 */ - ldr r2, [r1], #4 /* Fetch S20 and S21 values */ - ldr r3, [r1], #4 - vmov d10, r2, r3 /* Save as d10 */ - ldr r2, [r1], #4 /* Fetch S22 and S23 values */ - ldr r3, [r1], #4 - vmov d11, r2, r3 /* Save as d11 */ - ldr r2, [r1], #4 /* Fetch S24 and S25 values */ - ldr r3, [r1], #4 - vmov d12, r2, r3 /* Save as d12 */ - ldr r2, [r1], #4 /* Fetch S26 and S27 values */ - ldr r3, [r1], #4 - vmov d13, r2, r3 /* Save as d13 */ - ldr r2, [r1], #4 /* Fetch S28 and S29 values */ - ldr r3, [r1], #4 - vmov d14, r2, r3 /* Save as d14 */ - ldr r2, [r1], #4 /* Fetch S30 and S31 values */ - ldr r3, [r1], #4 - vmov d15, r2, r3 /* Save as d15 */ -#endif - - /* Load the floating point control and status register. r1 points t - * the address of the FPCSR register. - */ - - ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - fmxr fpscr, r2 /* Restore the FPCSR */ -#endif - bx lr - - .size up_restorefpu, .-up_restorefpu -#endif /* CONFIG_ARCH_FPU */ - .end - diff --git a/nuttx/arch/arm/src/armv7-m/up_fullcontextrestore.S b/nuttx/arch/arm/src/armv7-m/up_fullcontextrestore.S deleted file mode 100755 index 4c77b66b8..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_fullcontextrestore.S +++ /dev/null @@ -1,95 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/up_fullcontextrestore.S - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> -#include <arch/irq.h> - -#include "nvic.h" -#include "svcall.h" - -/************************************************************************************ - * Preprocessor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .syntax unified - .thumb - .file "up_fullcontextrestore.S" - -/************************************************************************************ - * Macros - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: up_fullcontextrestore - * - * Description: - * Restore the current thread context. Full prototype is: - * - * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; - * - * Return: - * None - * - ************************************************************************************/ - - .thumb_func - .globl up_fullcontextrestore - .type up_fullcontextrestore, function -up_fullcontextrestore: - - /* Perform the System call with R0=1 and R1=regs */ - - mov r1, r0 /* R1: regs */ - mov r0, #SYS_restore_context /* R0: restore context */ - svc 0 /* Force synchronous SVCall (or Hard Fault) */ - - /* This call should not return */ - - bx lr /* Unnecessary ... will not return */ - .size up_fullcontextrestore, .-up_fullcontextrestore - .end - diff --git a/nuttx/arch/arm/src/armv7-m/up_hardfault.c b/nuttx/arch/arm/src/armv7-m/up_hardfault.c deleted file mode 100644 index fa750b525..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_hardfault.c +++ /dev/null @@ -1,152 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_hardfault.c - * - * Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <string.h> -#include <assert.h> -#include <debug.h> - -#include <arch/irq.h> - -#include "up_arch.h" -#include "os_internal.h" -#include "nvic.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* If CONFIG_ARMV7M_USEBASEPRI=n, then debug output from this file may - * interfere with context switching! - */ - -#ifdef CONFIG_DEBUG_HARDFAULT -# define hfdbg(format, arg...) lldbg(format, ##arg) -#else -# define hfdbg(x...) -#endif - -#define INSN_SVC0 0xdf00 /* insn: svc 0 */ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_hardfault - * - * Description: - * This is Hard Fault exception handler. It also catches SVC call - * exceptions that are performed in bad contexts. - * - ****************************************************************************/ - -int up_hardfault(int irq, FAR void *context) -{ -#if defined(CONFIG_DEBUG_HARDFAULT) || !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t *regs = (uint32_t*)context; -#endif - - /* Get the value of the program counter where the fault occurred */ - -#ifndef CONFIG_ARMV7M_USEBASEPRI - uint16_t *pc = (uint16_t*)regs[REG_PC] - 1; - if ((void*)pc >= (void*)&_stext && (void*)pc < (void*)&_etext) - { - /* Fetch the instruction that caused the Hard fault */ - - uint16_t insn = *pc; - hfdbg(" PC: %p INSN: %04x\n", pc, insn); - - /* If this was the instruction 'svc 0', then forward processing - * to the SVCall handler - */ - - if (insn == INSN_SVC0) - { - hfdbg("Forward SVCall\n"); - return up_svcall(irq, context); - } - } -#endif - - /* Dump some hard fault info */ - - hfdbg("\nHard Fault:\n"); - hfdbg(" IRQ: %d regs: %p\n", irq, regs); - hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x\n", - getbasepri(), getprimask(), getipsr()); - hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n", - getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS), - getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR), - getreg32(NVIC_AFAULTS)); - hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3], - regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]); - hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11], - regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]); -#ifdef CONFIG_ARMV7M_USEBASEPRI - hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_BASEPRI]); -#else - hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n", - current_regs[REG_XPSR], current_regs[REG_PRIMASK]); -#endif - - (void)irqsave(); - lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS)); - PANIC(OSERR_UNEXPECTEDISR); - return OK; -} diff --git a/nuttx/arch/arm/src/armv7-m/up_initialstate.c b/nuttx/arch/arm/src/armv7-m/up_initialstate.c deleted file mode 100644 index 4af553f25..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_initialstate.c +++ /dev/null @@ -1,204 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_initialstate.c - * - * Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <sys/types.h> -#include <stdint.h> -#include <string.h> - -#include <nuttx/arch.h> - -#include "up_internal.h" -#include "up_arch.h" - -#include "psr.h" -#include "exc_return.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_initial_state - * - * Description: - * A new thread is being started and a new TCB - * has been created. This function is called to initialize - * the processor specific portions of the new TCB. - * - * This function must setup the intial architecture registers - * and/or stack so that execution will begin at tcb->start - * on the next context switch. - * - ****************************************************************************/ - -void up_initial_state(_TCB *tcb) -{ - struct xcptcontext *xcp = &tcb->xcp; - - /* Initialize the initial exception register context structure */ - - memset(xcp, 0, sizeof(struct xcptcontext)); - - /* Save the initial stack pointer */ - - xcp->regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr; - - /* Set the stack limit value */ - - xcp->regs[REG_R10] = (uint32_t)tcb->stack_alloc_ptr + 64; - - /* Fill the stack with a watermark value */ - - memset(tcb->stack_alloc_ptr, 0xff, tcb->adj_stack_size); - - /* Save the task entry point (stripping off the thumb bit) */ - - xcp->regs[REG_PC] = (uint32_t)tcb->start & ~1; - - /* Specify thumb mode */ - - xcp->regs[REG_XPSR] = ARMV7M_XPSR_T; - - /* If this task is running PIC, then set the PIC base register to the - * address of the allocated D-Space region. - */ - -#ifdef CONFIG_PIC - if (tcb->dspace != NULL) - { - /* Set the PIC base register (probably R10) to the address of the - * alloacated D-Space region. - */ - - xcp->regs[REG_PIC] = (uint32_t)tcb->dspace->region; - } - - /* Make certain that bit 0 is set in the main entry address. This - * is only an issue when NXFLAT is enabled. NXFLAT doesn't know - * anything about thumb; the addresses that NXFLAT sets are based - * on file header info and won't have bit 0 set. - */ - -#ifdef CONFIG_NXFLAT - tcb->entry.main = (main_t)((uint32_t)tcb->entry.main | 1); -#endif -#endif /* CONFIG_PIC */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - /* Set privileged- or unprivileged-mode, depending on how NuttX is - * configured and what kind of thread is being started. - * - * If the kernel build is not selected, then all threads run in - * privileged thread mode. - * - * If FPU support is not configured, set the bit that indicates that - * the context does not include the volatile FP registers. - */ - - xcp->regs[REG_EXC_RETURN] = EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE; - -#ifndef CONFIG_ARCH_FPU - - xcp->regs[REG_EXC_RETURN] |= EXC_RETURN_STD_CONTEXT; - -#else - - xcp->regs[REG_FPSCR] = 0; // XXX initial FPSCR should be configurable - xcp->regs[REG_FPReserved] = 0; - -#endif /* CONFIG_ARCH_FPU */ - -#ifdef CONFIG_NUTTX_KERNEL - if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_KERNEL) - { - /* It is a normal task or a pthread. Set user mode */ - - xcp->regs[REG_EXC_RETURN] = EXC_RETURN_PROCESS_STACK; - } -#endif /* CONFIG_NUTTX_KERNEL */ - -#else /* CONFIG_ARMV7M_CMNVECTOR */ - - /* Set privileged- or unprivileged-mode, depending on how NuttX is - * configured and what kind of thread is being started. - * - * If the kernel build is not selected, then all threads run in - * privileged thread mode. - */ - -#ifdef CONFIG_NUTTX_KERNEL - if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_KERNEL) - { - /* It is a kernel thread.. set privileged thread mode */ - - xcp->regs[REG_EXC_RETURN] = EXC_RETURN_PRIVTHR; - } - else - { - /* It is a normal task or a pthread. Set user mode */ - - xcp->regs[REG_EXC_RETURN] = EXC_RETURN_UNPRIVTHR; - } -#endif /* CONFIG_NUTTX_KERNEL */ -#endif /* CONFIG_ARMV7M_CMNVECTOR */ - - /* Enable or disable interrupts, based on user configuration */ - -#ifdef CONFIG_SUPPRESS_INTERRUPTS -#ifdef CONFIG_ARMV7M_USEBASEPRI - xcp->regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - xcp->regs[REG_PRIMASK] = 1; -#endif -#endif /* CONFIG_SUPPRESS_INTERRUPTS */ -} diff --git a/nuttx/arch/arm/src/armv7-m/up_memcpy.S b/nuttx/arch/arm/src/armv7-m/up_memcpy.S deleted file mode 100644 index a154cab61..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_memcpy.S +++ /dev/null @@ -1,416 +0,0 @@ -/************************************************************************************ - * nuttx/arch/arm/src/armv7-m/up_memcpy.S - * - * armv7m-optimised memcpy, contributed by Mike Smith. Apparently in the public - * domain and is re-released here under the modified BSD license: - * - * Obtained via a posting on the Stellaris forum: - * http://e2e.ti.com/support/microcontrollers/\ - * stellaris_arm_cortex-m3_microcontroller/f/473/t/44360.aspx - * - * Posted by rocksoft on Jul 24, 2008 10:19 AM - * - * Hi, - * - * I recently finished a "memcpy" replacement and thought it might be useful for - * others... - * - * I've put some instructions and the code here: - * - * http://www.rock-software.net/downloads/memcpy/ - * - * Hope it works for you as well as it did for me. - * - * Liam. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .global memcpy - - .syntax unified - .thumb - .cpu cortex-m3 - .file "up_memcpy.S" - -/************************************************************************************ - * .text - ************************************************************************************/ - - .text - -/************************************************************************************ - * Private Constant Data - ************************************************************************************/ - -/* We have 16 possible alignment combinations of src and dst, this jump table - * directs the copy operation - * - * Bits: Src=00, Dst=00 - Long to Long copy - * Bits: Src=00, Dst=01 - Long to Byte before half word - * Bits: Src=00, Dst=10 - Long to Half word - * Bits: Src=00, Dst=11 - Long to Byte before long word - * Bits: Src=01, Dst=00 - Byte before half word to long - * Bits: Src=01, Dst=01 - Byte before half word to byte before half word - - * Same alignment - * Bits: Src=01, Dst=10 - Byte before half word to half word - * Bits: Src=01, Dst=11 - Byte before half word to byte before long word - * Bits: Src=10, Dst=00 - Half word to long word - * Bits: Src=10, Dst=01 - Half word to byte before half word - * Bits: Src=10, Dst=10 - Half word to half word - Same Alignment - * Bits: Src=10, Dst=11 - Half word to byte before long word - * Bits: Src=11, Dst=00 - Byte before long word to long word - * Bits: Src=11, Dst=01 - Byte before long word to byte before half word - * Bits: Src=11, Dst=11 - Byte before long word to half word - * Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - - * Same alignment - */ - -MEM_DataCopyTable: - .byte (MEM_DataCopy0 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy1 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy2 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy3 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy4 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy5 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy6 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy7 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy8 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy9 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy10 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy11 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy12 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy13 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy14 - MEM_DataCopyJump) >> 1 - .byte (MEM_DataCopy15 - MEM_DataCopyJump) >> 1 - - .align 2 - -MEM_LongCopyTable: - .byte (MEM_LongCopyEnd - MEM_LongCopyJump) >> 1 /* 0 bytes left */ - .byte 0 /* 4 bytes left */ - .byte (1 * 10) >> 1 /* 8 bytes left */ - .byte (2 * 10) >> 1 /* 12 bytes left */ - .byte (3 * 10) >> 1 /* 16 bytes left */ - .byte (4 * 10) >> 1 /* 20 bytes left */ - .byte (5 * 10) >> 1 /* 24 bytes left */ - .byte (6 * 10) >> 1 /* 28 bytes left */ - .byte (7 * 10) >> 1 /* 32 bytes left */ - .byte (8 * 10) >> 1 /* 36 bytes left */ - - .align 2 - -/************************************************************************************ - * Public Functions - ************************************************************************************/ -/************************************************************************************ - * Name: memcpy - * - * Description: - * Optimised "general" copy routine - * - * Input Parameters: - * r0 = destination, r1 = source, r2 = length - * - ************************************************************************************/ - - .thumb_func -memcpy: - push {r14} - - /* This allows the inner workings to "assume" a minimum amount of bytes */ - /* Quickly check for very short copies */ - - cmp r2, #4 - blt MEM_DataCopyBytes - - and r14, r0, #3 /* Get destination alignment bits */ - bfi r14, r1, #2, #2 /* Get source alignment bits */ - ldr r3, =MEM_DataCopyTable /* Jump table base */ - tbb [r3, r14] /* Perform jump on src/dst alignment bits */ -MEM_DataCopyJump: - - .align 4 - -/* Bits: Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment - * 3 bytes to read for long word aligning - */ - -MEM_DataCopy5: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=10, Dst=10 - Half word to half word - Same Alignment - * 2 bytes to read for long word aligning - */ - -MEM_DataCopy10: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - Same alignment - * 1 bytes to read for long word aligning - */ - -MEM_DataCopy15: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=00, Dst=00 - Long to Long copy */ - -MEM_DataCopy0: - /* Save regs that may be used by memcpy */ - - push {r4-r12} - - /* Check for short word-aligned copy */ - - cmp r2, #0x28 - blt MEM_DataCopy0_2 - - /* Bulk copy loop */ - -MEM_DataCopy0_1: - ldmia r1!, {r3-r12} - stmia r0!, {r3-r12} - sub r2, r2, #0x28 - cmp r2, #0x28 - bge MEM_DataCopy0_1 - - /* Copy remaining long words */ - -MEM_DataCopy0_2: - /* Copy remaining long words */ - - ldr r14, =MEM_LongCopyTable - lsr r11, r2, #0x02 - tbb [r14, r11] - - /* longword copy branch table anchor */ - -MEM_LongCopyJump: - ldr.w r3, [r1], #0x04 /* 4 bytes remain */ - str.w r3, [r0], #0x04 - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r4} /* 8 bytes remain */ - stmia.w r0!, {r3-r4} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r5} /* 12 bytes remain */ - stmia.w r0!, {r3-r5} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r6} /* 16 bytes remain */ - stmia.w r0!, {r3-r6} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r7} /* 20 bytes remain */ - stmia.w r0!, {r3-r7} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r8} /* 24 bytes remain */ - stmia.w r0!, {r3-r8} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r9} /* 28 bytes remain */ - stmia.w r0!, {r3-r9} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r10} /* 32 bytes remain */ - stmia.w r0!, {r3-r10} - b MEM_LongCopyEnd - ldmia.w r1!, {r3-r11} /* 36 bytes remain */ - stmia.w r0!, {r3-r11} - -MEM_LongCopyEnd: - pop {r4-r12} - and r2, r2, #0x03 /* All the longs have been copied */ - - /* Deal with up to 3 remaining bytes */ - -MEM_DataCopyBytes: - /* Deal with up to 3 remaining bytes */ - - cmp r2, #0x00 - it eq - popeq {pc} - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - subs r2, r2, #0x01 - it eq - popeq {pc} - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - subs r2, r2, #0x01 - it eq - popeq {pc} - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - pop {pc} - - .align 4 - -/* Bits: Src=01, Dst=11 - Byte before half word to byte before long word - * 3 bytes to read for long word aligning the source - */ - -MEM_DataCopy7: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=10, Dst=00 - Half word to long word - * 2 bytes to read for long word aligning the source - */ - -MEM_DataCopy8: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=11, Dst=01 - Byte before long word to byte before half word - * 1 byte to read for long word aligning the source - */ - -MEM_DataCopy13: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=00, Dst=10 - Long to Half word */ - -MEM_DataCopy2: - cmp r2, #0x28 - blt MEM_DataCopy2_1 - - /* Save regs */ - - push {r4-r12} - - /* Bulk copy loop */ - -MEM_DataCopy2_2: - ldmia r1!, {r3-r12} - - strh r3, [r0], #0x02 - - lsr r3, r3, #0x10 - bfi r3, r4, #0x10, #0x10 - lsr r4, r4, #0x10 - bfi r4, r5, #0x10, #0x10 - lsr r5, r5, #0x10 - bfi r5, r6, #0x10, #0x10 - lsr r6, r6, #0x10 - bfi r6, r7, #0x10, #0x10 - lsr r7, r7, #0x10 - bfi r7, r8, #0x10, #0x10 - lsr r8, r8, #0x10 - bfi r8, r9, #0x10, #0x10 - lsr r9, r9, #0x10 - bfi r9, r10, #0x10, #0x10 - lsr r10, r10, #0x10 - bfi r10, r11, #0x10, #0x10 - lsr r11, r11, #0x10 - bfi r11, r12, #0x10, #0x10 - stmia r0!, {r3-r11} - lsr r12, r12, #0x10 - strh r12, [r0], #0x02 - - sub r2, r2, #0x28 - cmp r2, #0x28 - bge MEM_DataCopy2_2 - pop {r4-r12} - -MEM_DataCopy2_1: /* Read longs and write 2 x half words */ - cmp r2, #4 - blt MEM_DataCopyBytes - ldr r3, [r1], #0x04 - strh r3, [r0], #0x02 - lsr r3, r3, #0x10 - strh r3, [r0], #0x02 - sub r2, r2, #0x04 - b MEM_DataCopy2 - -/* Bits: Src=01, Dst=00 - Byte before half word to long - * Bits: Src=01, Dst=10 - Byte before half word to half word - * 3 bytes to read for long word aligning the source - */ - -MEM_DataCopy4: -MEM_DataCopy6: - /* Read B and write B */ - - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=10, Dst=01 - Half word to byte before half word - * Bits: Src=10, Dst=11 - Half word to byte before long word - * 2 bytes to read for long word aligning the source - */ - -MEM_DataCopy9: -MEM_DataCopy11: - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=11, Dst=00 -chm Byte before long word to long word - * Bits: Src=11, Dst=11 - Byte before long word to half word - * 1 byte to read for long word aligning the source - */ - -MEM_DataCopy12: -MEM_DataCopy14: - /* Read B and write B */ - - ldrb r3, [r1], #0x01 - strb r3, [r0], #0x01 - sub r2, r2, #0x01 - -/* Bits: Src=00, Dst=01 - Long to Byte before half word - * Bits: Src=00, Dst=11 - Long to Byte before long word - */ - -MEM_DataCopy1: /* Read longs, write B->H->B */ -MEM_DataCopy3: - cmp r2, #4 - blt MEM_DataCopyBytes - ldr r3, [r1], #0x04 - strb r3, [r0], #0x01 - lsr r3, r3, #0x08 - strh r3, [r0], #0x02 - lsr r3, r3, #0x10 - strb r3, [r0], #0x01 - sub r2, r2, #0x04 - b MEM_DataCopy3 - - .size memcpy, .-memcpy - .end diff --git a/nuttx/arch/arm/src/armv7-m/up_memfault.c b/nuttx/arch/arm/src/armv7-m/up_memfault.c deleted file mode 100644 index ab93c7697..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_memfault.c +++ /dev/null @@ -1,110 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_memfault.c - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <assert.h> -#include <debug.h> - -#include <arch/irq.h> - -#include "up_arch.h" -#include "os_internal.h" -#include "nvic.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */ - -#ifdef DEBUG_MEMFAULTS -# define mfdbg(format, arg...) lldbg(format, ##arg) -#else -# define mfdbg(x...) -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_memfault - * - * Description: - * This is Memory Management Fault exception handler. Normally we get here - * when the Cortex M3 MPU is enabled and an MPU fault is detected. However, - * I understand that there are other error conditions that can also generate - * memory management faults. - * - ****************************************************************************/ - -int up_memfault(int irq, FAR void *context) -{ - /* Dump some memory management fault info */ - - (void)irqsave(); - lldbg("PANIC!!! Memory Management Fault:\n"); - mfdbg(" IRQ: %d context: %p\n", irq, regs); - lldbg(" CFAULTS: %08x MMFAR: %08x\n", - getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR)); - mfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3], - regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]); - mfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11], - regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]); - mfdbg(" PSR=%08x\n", regs[REG_XPSR]); - - PANIC(OSERR_UNEXPECTEDISR); - return OK; -} diff --git a/nuttx/arch/arm/src/armv7-m/up_mpu.c b/nuttx/arch/arm/src/armv7-m/up_mpu.c deleted file mode 100644 index 4bb3f21d9..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_mpu.c +++ /dev/null @@ -1,176 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_mpu.c - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> - -#include "mpu.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/* This set represents the set of disabled memory sub-regions. A bit set - * corresponds to a disabled sub-region; the LS bit corresponds to the first - * region. The array is indexed by the number of subregions: 0 means no sub- - * regions (0xff), and 0 means all subregions but one (0x00). - */ - -static const void uint8_t g_regionmap[9] = -{ - 0xff, 0x7f, 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01, 0x00 -}; - -/* The next available region number */ - -static uint8_t g_region; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: mpu_allocregion - * - * Description: - * Allocate the next region - * - * Assumptions: - * - Regions are never deallocated - * - Regions are only allocated early in initialization, so nothing - * special is require; - * - ****************************************************************************/ - -unsigned int mpu_allocregion(void) -{ - return (unsigned int)g_region++; -} - -/**************************************************************************** - * Name: mpu_log2regionsize - * - * Description: - * Determine the smallest value of l2size (log base 2 size) such that the - * following is true: - * - * size <= (1 << l2size) - * - ****************************************************************************/ - -uint8_t mpu_log2regionsize(size_t size) -{ - /* The minimum permitted region size is 16 bytes (log2(16) = 4. */ - - uint32_t l2size; - for (l2size = 4; l2size < 32 && size > (1 << l2size); size++); - return l2size; -} - -/**************************************************************************** - * Name: mpu_subregion - * - * Description: - * Given the size of the (1) memory to be mapped and (2) the log2 size - * of the mapping to use, determine the minimal sub-region set to span - * that memory region. - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionsize() - * - ****************************************************************************/ - -uint32_t mpu_subregion(size_t size, uint8_t l2size) -{ - unsigned int nsrs - uint32_t asize; - uint32_t mask; - - /* Eight subregions are support. The representation is as an 8-bit - * value with the LS bit corresponding to subregion 0. A bit is set - * to disable the sub-region. - * - * l2size: Log2 of the actual region size is <= (1 << l2size); - */ - - DEBUGASSERT(lsize > 3 && size <= (1 << l2size)); - - /* Examples with l2size = 12: - * - * Shifted Adjusted Number Sub-Region - * Size Mask Size Shift Sub-Regions Bitset - * 0x1000 0x01ff 0x1000 9 8 0x00 - * 0x0c00 0x01ff 0x0c00 9 6 0x03 - * 0x0c40 0x01ff 0x0e00 9 7 0x01 - */ - - if (l2size < 32) - { - mask = ((1 << lsize)-1) >> 3; /* Shifted mask */ - } - - /* The 4Gb region size is a special case */ - - else - { - /* NOTE: There is no way to represent a 4Gb region size in the 32-bit - * input. - */ - - mask = 0x1fffffff; /* Shifted mask */ - } - - asize = (size + mask) & ~mask; /* Adjusted size */ - nsrs = asize >> (lsize-3); /* Number of subregions */ - return g_regionmap[nsrs]; -} - - - diff --git a/nuttx/arch/arm/src/armv7-m/up_releasepending.c b/nuttx/arch/arm/src/armv7-m/up_releasepending.c deleted file mode 100644 index 2f0d4dc39..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_releasepending.c +++ /dev/null @@ -1,129 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_releasepending.c - * - * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <sched.h> -#include <debug.h> -#include <nuttx/arch.h> - -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_release_pending - * - * Description: - * Release and ready-to-run tasks that have - * collected in the pending task list. This can call a - * context switch if a new task is placed at the head of - * the ready to run list. - * - ****************************************************************************/ - -void up_release_pending(void) -{ - _TCB *rtcb = (_TCB*)g_readytorun.head; - - slldbg("From TCB=%p\n", rtcb); - - /* Merge the g_pendingtasks list into the g_readytorun task list */ - - /* sched_lock(); */ - if (sched_mergepending()) - { - /* The currently active task has changed! We will need to switch - * contexts. First check if we are operating in interrupt context. - */ - - if (current_regs) - { - /* Yes, then we have to do things differently. Just copy the - * current_regs into the OLD rtcb. - */ - - up_savestate(rtcb->xcp.regs); - - /* Restore the exception context of the rtcb at the (new) head - * of the g_readytorun task list. - */ - - rtcb = (_TCB*)g_readytorun.head; - slldbg("New Active Task TCB=%p\n", rtcb); - - /* Then switch contexts */ - - up_restorestate(rtcb->xcp.regs); - } - - /* No, then we will need to perform the user context switch */ - - else - { - /* Switch context to the context of the task at the head of the - * ready to run list. - */ - - _TCB *nexttcb = (_TCB*)g_readytorun.head; - up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); - - /* up_switchcontext forces a context switch to the task at the - * head of the ready-to-run list. It does not 'return' in the - * normal sense. When it does return, it is because the blocked - * task is again ready to run and has execution priority. - */ - } - } -} diff --git a/nuttx/arch/arm/src/armv7-m/up_reprioritizertr.c b/nuttx/arch/arm/src/armv7-m/up_reprioritizertr.c deleted file mode 100644 index 9a971f064..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_reprioritizertr.c +++ /dev/null @@ -1,187 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_reprioritizertr.c - * - * Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <stdbool.h> -#include <sched.h> -#include <debug.h> -#include <nuttx/arch.h> - -#include "os_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_reprioritize_rtr - * - * Description: - * Called when the priority of a running or - * ready-to-run task changes and the reprioritization will - * cause a context switch. Two cases: - * - * 1) The priority of the currently running task drops and the next - * task in the ready to run list has priority. - * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. - * - * Inputs: - * tcb: The TCB of the task that has been reprioritized - * priority: The new task priority - * - ****************************************************************************/ - -void up_reprioritize_rtr(_TCB *tcb, uint8_t priority) -{ - /* Verify that the caller is sane */ - - if (tcb->task_state < FIRST_READY_TO_RUN_STATE || - tcb->task_state > LAST_READY_TO_RUN_STATE -#if SCHED_PRIORITY_MIN > 0 - || priority < SCHED_PRIORITY_MIN -#endif -#if SCHED_PRIORITY_MAX < UINT8_MAX - || priority > SCHED_PRIORITY_MAX -#endif - ) - { - PANIC(OSERR_BADREPRIORITIZESTATE); - } - else - { - _TCB *rtcb = (_TCB*)g_readytorun.head; - bool switch_needed; - - slldbg("TCB=%p PRI=%d\n", tcb, priority); - - /* Remove the tcb task from the ready-to-run list. - * sched_removereadytorun will return true if we just removed the head - * of the ready to run list. - */ - - switch_needed = sched_removereadytorun(tcb); - - /* Setup up the new task priority */ - - tcb->sched_priority = (uint8_t)priority; - - /* Return the task to the ready-to-run task list. sched_addreadytorun - * will return true if the task was added to the head of ready-to-run - * list. We will need to perform a context switch only if the - * EXCLUSIVE or of the two calls is non-zero (i.e., one and only one - * the calls changes the head of the ready-to-run list). - */ - - switch_needed ^= sched_addreadytorun(tcb); - - /* Now, perform the context switch if one is needed (i.e. if the head - * of the ready-to-run list is no longer the same). - */ - - if (switch_needed) - { - /* If we are going to do a context switch, then now is the right - * time to add any pending tasks back into the ready-to-run list. - * task list now - */ - - if (g_pendingtasks.head) - { - sched_mergepending(); - } - - /* Are we in an interrupt handler? */ - - if (current_regs) - { - /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. - */ - - up_savestate(rtcb->xcp.regs); - - /* Restore the exception context of the rtcb at the (new) head - * of the g_readytorun task list. - */ - - rtcb = (_TCB*)g_readytorun.head; - slldbg("New Active Task TCB=%p\n", rtcb); - - /* Then switch contexts */ - - up_restorestate(rtcb->xcp.regs); - } - - /* No, then we will need to perform the user context switch */ - - else - { - /* Switch context to the context of the task at the head of the - * ready to run list. - */ - - _TCB *nexttcb = (_TCB*)g_readytorun.head; - up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); - - /* up_switchcontext forces a context switch to the task at the - * head of the ready-to-run list. It does not 'return' in the - * normal sense. When it does return, it is because the blocked - * task is again ready to run and has execution priority. - */ - } - } - } -} diff --git a/nuttx/arch/arm/src/armv7-m/up_saveusercontext.S b/nuttx/arch/arm/src/armv7-m/up_saveusercontext.S deleted file mode 100755 index 06eb183d2..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_saveusercontext.S +++ /dev/null @@ -1,104 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/up_saveusercontext.S - * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> -#include <arch/irq.h> - -#include "nvic.h" -#include "svcall.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .syntax unified - .thumb - .file "up_saveusercontext.S" - -/************************************************************************************ - * Macros - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: up_saveusercontext - * - * Description: - * Save the current thread context. Full prototype is: - * - * int up_saveusercontext(uint32_t *saveregs); - * - * Return: - * 0: Normal return - * 1: Context switch return - * - ************************************************************************************/ - - .text - .thumb_func - .globl up_saveusercontext - .type up_saveusercontext, function -up_saveusercontext: - - /* Perform the System call with R0=0 and R1=regs */ - - mov r1, r0 /* R1: regs */ - mov r0, #SYS_save_context /* R0: save context (also return value) */ - svc 0 /* Force synchronous SVCall (or Hard Fault) */ - - /* There are two return conditions. On the first return, R0 (the - * return value will be zero. On the second return we need to - * force R0 to be 1. - */ - - add r2, r1, #(4*REG_R0) - mov r3, #1 - str r3, [r2, #0] - bx lr /* "normal" return with r0=0 or - * context switch with r0=1 */ - .size up_saveusercontext, .-up_saveusercontext - .end - diff --git a/nuttx/arch/arm/src/armv7-m/up_schedulesigaction.c b/nuttx/arch/arm/src/armv7-m/up_schedulesigaction.c deleted file mode 100644 index 9221a69a2..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_schedulesigaction.c +++ /dev/null @@ -1,224 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_schedulesigaction.c - * - * Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <sched.h> -#include <debug.h> - -#include <nuttx/arch.h> - -#include "psr.h" -#include "os_internal.h" -#include "up_internal.h" -#include "up_arch.h" - -#ifndef CONFIG_DISABLE_SIGNALS - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_schedule_sigaction - * - * Description: - * This function is called by the OS when one or more - * signal handling actions have been queued for execution. - * The architecture specific code must configure things so - * that the 'igdeliver' callback is executed on the thread - * specified by 'tcb' as soon as possible. - * - * This function may be called from interrupt handling logic. - * - * This operation should not cause the task to be unblocked - * nor should it cause any immediate execution of sigdeliver. - * Typically, a few cases need to be considered: - * - * (1) This function may be called from an interrupt handler - * During interrupt processing, all xcptcontext structures - * should be valid for all tasks. That structure should - * be modified to invoke sigdeliver() either on return - * from (this) interrupt or on some subsequent context - * switch to the recipient task. - * (2) If not in an interrupt handler and the tcb is NOT - * the currently executing task, then again just modify - * the saved xcptcontext structure for the recipient - * task so it will invoke sigdeliver when that task is - * later resumed. - * (3) If not in an interrupt handler and the tcb IS the - * currently executing task -- just call the signal - * handler now. - * - ****************************************************************************/ - -void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver) -{ - /* Refuse to handle nested signal actions */ - - sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver); - - if (!tcb->xcp.sigdeliver) - { - irqstate_t flags; - - /* Make sure that interrupts are disabled */ - - flags = irqsave(); - - /* First, handle some special cases when the signal is - * being delivered to the currently executing task. - */ - - sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs); - - if (tcb == (_TCB*)g_readytorun.head) - { - /* CASE 1: We are not in an interrupt handler and - * a task is signalling itself for some reason. - */ - - if (!current_regs) - { - /* In this case just deliver the signal now. */ - - sigdeliver(tcb); - } - - /* CASE 2: We are in an interrupt handler AND the - * interrupted task is the same as the one that - * must receive the signal, then we will have to modify - * the return state as well as the state in the TCB. - * - * Hmmm... there looks like a latent bug here: The following - * logic would fail in the strange case where we are in an - * interrupt handler, the thread is signalling itself, but - * a context switch to another task has occurred so that - * current_regs does not refer to the thread at g_readytorun.head! - */ - - else - { - /* Save the return lr and cpsr and one scratch register - * These will be restored by the signal trampoline after - * the signals have been delivered. - */ - - tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = current_regs[REG_PC]; -#ifdef CONFIG_ARMV7M_USEBASEPRI - tcb->xcp.saved_basepri = current_regs[REG_BASEPRI]; -#else - tcb->xcp.saved_primask = current_regs[REG_PRIMASK]; -#endif - tcb->xcp.saved_xpsr = current_regs[REG_XPSR]; - - /* Then set up to vector to the trampoline with interrupts - * disabled - */ - - current_regs[REG_PC] = (uint32_t)up_sigdeliver; -#ifdef CONFIG_ARMV7M_USEBASEPRI - current_regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - current_regs[REG_PRIMASK] = 1; -#endif - current_regs[REG_XPSR] = ARMV7M_XPSR_T; - - /* And make sure that the saved context in the TCB - * is the same as the interrupt return context. - */ - - up_savestate(tcb->xcp.regs); - } - } - - /* Otherwise, we are (1) signaling a task is not running - * from an interrupt handler or (2) we are not in an - * interrupt handler and the running task is signalling - * some non-running task. - */ - - else - { - /* Save the return lr and cpsr and one scratch register - * These will be restored by the signal trampoline after - * the signals have been delivered. - */ - - tcb->xcp.sigdeliver = sigdeliver; - tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC]; -#ifdef CONFIG_ARMV7M_USEBASEPRI - tcb->xcp.saved_basepri = tcb->xcp.regs[REG_BASEPRI]; -#else - tcb->xcp.saved_primask = tcb->xcp.regs[REG_PRIMASK]; -#endif - tcb->xcp.saved_xpsr = tcb->xcp.regs[REG_XPSR]; - - /* Then set up to vector to the trampoline with interrupts - * disabled - */ - - tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver; -#ifdef CONFIG_ARMV7M_USEBASEPRI - tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - tcb->xcp.regs[REG_PRIMASK] = 1; -#endif - tcb->xcp.regs[REG_XPSR] = ARMV7M_XPSR_T; - } - - irqrestore(flags); - } -} - -#endif /* !CONFIG_DISABLE_SIGNALS */ diff --git a/nuttx/arch/arm/src/armv7-m/up_sigdeliver.c b/nuttx/arch/arm/src/armv7-m/up_sigdeliver.c deleted file mode 100644 index 654214b39..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_sigdeliver.c +++ /dev/null @@ -1,150 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_sigdeliver.c - * - * Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <sched.h> -#include <debug.h> - -#include <nuttx/irq.h> -#include <nuttx/arch.h> -#include <arch/board/board.h> - -#include "os_internal.h" -#include "up_internal.h" -#include "up_arch.h" - -#ifndef CONFIG_DISABLE_SIGNALS - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_sigdeliver - * - * Description: - * This is the a signal handling trampoline. When a signal action was - * posted. The task context was mucked with and forced to branch to this - * location with interrupts disabled. - * - ****************************************************************************/ - -void up_sigdeliver(void) -{ - _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32_t regs[XCPTCONTEXT_REGS]; - sig_deliver_t sigdeliver; - - /* Save the errno. This must be preserved throughout the signal handling - * so that the user code final gets the correct errno value (probably - * EINTR). - */ - - int saved_errno = rtcb->pterrno; - - up_ledon(LED_SIGNAL); - - sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n", - rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head); - ASSERT(rtcb->xcp.sigdeliver != NULL); - - /* Save the real return state on the stack. */ - - up_copystate(regs, rtcb->xcp.regs); - regs[REG_PC] = rtcb->xcp.saved_pc; -#ifdef CONFIG_ARMV7M_USEBASEPRI - regs[REG_BASEPRI] = rtcb->xcp.saved_basepri; -#else - regs[REG_PRIMASK] = rtcb->xcp.saved_primask; -#endif - regs[REG_XPSR] = rtcb->xcp.saved_xpsr; - - /* Get a local copy of the sigdeliver function pointer. We do this so that - * we can nullify the sigdeliver function pointer in the TCB and accept - * more signal deliveries while processing the current pending signals. - */ - - sigdeliver = rtcb->xcp.sigdeliver; - rtcb->xcp.sigdeliver = NULL; - - /* Then restore the task interrupt state */ - -#ifdef CONFIG_ARMV7M_USEBASEPRI - irqrestore((uint8_t)regs[REG_BASEPRI]); -#else - irqrestore((uint16_t)regs[REG_PRIMASK]); -#endif - - /* Deliver the signals */ - - sigdeliver(rtcb); - - /* Output any debug messages BEFORE restoring errno (because they may - * alter errno), then disable interrupts again and restore the original - * errno that is needed by the user logic (it is probably EINTR). - */ - - sdbg("Resuming\n"); - (void)irqsave(); - rtcb->pterrno = saved_errno; - - /* Then restore the correct state for this thread of - * execution. - */ - - up_ledoff(LED_SIGNAL); - up_fullcontextrestore(regs); -} - -#endif /* !CONFIG_DISABLE_SIGNALS */ - diff --git a/nuttx/arch/arm/src/armv7-m/up_stackcheck.c b/nuttx/arch/arm/src/armv7-m/up_stackcheck.c deleted file mode 100644 index e8f02a863..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_stackcheck.c +++ /dev/null @@ -1,40 +0,0 @@ - - -void __cyg_profile_func_enter(void *func, void *caller) __attribute__((naked, no_instrument_function)); -void __cyg_profile_func_exit(void *func, void *caller) __attribute__((naked, no_instrument_function)); -void __stack_overflow_trap(void) __attribute__((naked, no_instrument_function)); - -void -__stack_overflow_trap(void) -{ - /* if we get here, the stack has overflowed */ - asm ( "b ."); -} - -void -__cyg_profile_func_enter(void *func, void *caller) -{ - asm volatile ( - " mrs r2, ipsr \n" /* Check whether we are in interrupt mode */ - " cmp r2, #0 \n" /* since we don't switch r10 on interrupt entry, we */ - " bne 2f \n" /* can't detect overflow of the interrupt stack. */ - " \n" - " sub r2, sp, #68 \n" /* compute stack pointer as though we just stacked a full frame */ - " mrs r1, control \n" /* Test CONTROL.FPCA to see whether we also need room for the FP */ - " tst r1, #4 \n" /* context. */ - " beq 1f \n" - " sub r2, r2, #136 \n" /* subtract FP context frame size */ - "1: \n" - " cmp r2, r10 \n" /* compare stack with limit */ - " bgt 2f \n" /* stack is above limit and thus OK */ - " b __stack_overflow_trap\n" - "2: \n" - " bx lr \n" - ); -} - -void -__cyg_profile_func_exit(void *func, void *caller) -{ - asm volatile("bx lr"); -} diff --git a/nuttx/arch/arm/src/armv7-m/up_svcall.c b/nuttx/arch/arm/src/armv7-m/up_svcall.c deleted file mode 100644 index d32f0afc2..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_svcall.c +++ /dev/null @@ -1,363 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_svcall.c - * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> -#include <string.h> -#include <assert.h> -#include <debug.h> - -#include <arch/irq.h> -#include <nuttx/sched.h> - -#ifdef CONFIG_NUTTX_KERNEL -# include <syscall.h> -#endif - -#include "svcall.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* Configuration ************************************************************/ - -#undef SYSCALL_INTERRUPTIBLE -#if defined(CONFIG_NUTTX_KERNEL) -# if CONFIG_ARCH_INTERRUPTSTACK > 3 -# warning "CONFIG_ARCH_INTERRUPTSTACK and CONFIG_NUTTX_KERNEL are incompatible" -# warning "options as currently implemented. Interrupts will have to be disabled" -# warning "during SYScall processing to avoid un-handled nested interrupts" -# else -# define SYSCALL_INTERRUPTIBLE 1 -# endif -#endif - -/* Debug ********************************************************************/ -/* Debug output from this file may interfere with context switching! To get - * debug output you must enabled the following in your NuttX configuration: - * - * CONFIG_DEBUG and CONFIG_DEBUG_SCHED - * - * And you must explicitly define DEBUG_SVCALL below: - */ - -#undef DEBUG_SVCALL /* Define to debug SVCall */ -#ifdef DEBUG_SVCALL -# define svcdbg(format, arg...) slldbg(format, ##arg) -#else -# define svcdbg(x...) -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: dispatch_syscall - * - * Description: - * Dispatch a system call to the appropriate handling logic. - * - ****************************************************************************/ - -#ifdef CONFIG_NUTTX_KERNEL -static inline void dispatch_syscall(uint32_t *regs) -{ - uint32_t cmd = regs[REG_R0]; - FAR _TCB *rtcb = sched_self(); - uintptr_t ret = (uintptr_t)ERROR; - - /* Verify the the SYS call number is within range */ - - if (cmd < SYS_maxsyscall) - { - /* Report error and return ERROR */ - - slldbg("ERROR: Bad SYS call: %d\n", cmd); - } - else - { - /* The index into the syscall table is offset by the number of architecture- - * specific reserved entries at the beginning of the SYS call number space. - */ - - int index = cmd - CONFIG_SYS_RESERVED; - - /* Enable interrupts while the SYSCALL executes */ - -#ifdef SYSCALL_INTERRUPTIBLE - irqenable(); -#endif - - /* Call the correct stub for each SYS call, based on the number of parameters */ - - svcdbg("Calling stub%d at %p\n", index, g_stubloopkup[index].stub0); - - switch (g_stubnparms[index]) - { - /* No parameters */ - - case 0: - ret = g_stublookup[index].stub0(); - break; - - /* Number of parameters: 1 */ - - case 1: - ret = g_stublookup[index].stub1(regs[REG_R1]); - break; - - /* Number of parameters: 2 */ - - case 2: - ret = g_stublookup[index].stub2(regs[REG_R1], regs[REG_R2]); - break; - - /* Number of parameters: 3 */ - - case 3: - ret = g_stublookup[index].stub3(regs[REG_R1], regs[REG_R2], - regs[REG_R3]); - break; - - /* Number of parameters: 4 */ - - case 4: - ret = g_stublookup[index].stub4(regs[REG_R1], regs[REG_R2], - regs[REG_R3], regs[REG_R4]); - break; - - /* Number of parameters: 5 */ - - case 5: - ret = g_stublookup[index].stub5(regs[REG_R1], regs[REG_R2], - regs[REG_R3], regs[REG_R4], - regs[REG_R5]); - break; - - /* Number of parameters: 6 */ - - case 6: - ret = g_stublookup[index].stub6(regs[REG_R1], regs[REG_R2], - regs[REG_R3], regs[REG_R4], - regs[REG_R5], regs[REG_R6]); - break; - - /* Unsupported number of paramters. Report error and return ERROR */ - - default: - slldbg("ERROR: Bad SYS call %d number parameters %d\n", - cmd, g_stubnparms[index]); - break; - } - -#ifdef SYSCALL_INTERRUPTIBLE - irqdisable(); -#endif - } - - /* Set up the return value. First, check if a context switch occurred. - * In this case, regs will no longer be the same as current_regs. In - * the case of a context switch, we will have to save the return value - * in the TCB where it can be returned later when the task is restarted. - */ - - if (regs != current_regs) - { - regs = rtcb->xcp.regs; - } - - /* Then return the result in R0 */ - - svcdbg("Return value regs: %p value: %d\n", regs, ret); - regs[REG_R0] = (uint32_t)ret; -} -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_svcall - * - * Description: - * This is SVCall exception handler that performs context switching - * - ****************************************************************************/ - -int up_svcall(int irq, FAR void *context) -{ - uint32_t *regs = (uint32_t*)context; - - DEBUGASSERT(regs && regs == current_regs); - - /* The SVCall software interrupt is called with R0 = system call command - * and R1..R7 = variable number of arguments depending on the system call. - */ - - svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, regs[REG_R0]); - svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3], - regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]); - svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11], - regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]); - svcdbg(" PSR=%08x\n", regs[REG_XPSR]); - - /* Handle the SVCall according to the command in R0 */ - - switch (regs[REG_R0]) - { - /* R0=SYS_save_context: This is a save context command: - * - * int up_saveusercontext(uint32_t *saveregs); - * - * At this point, the following values are saved in context: - * - * R0 = SYS_save_context - * R1 = saveregs - * - * In this case, we simply need to copy the current regsters to the - * save register space references in the saved R1 and return. - */ - - case SYS_save_context: - { - DEBUGASSERT(regs[REG_R1] != 0); - memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); -#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_ARMV7M_CMNVECTOR) - up_savefpu((uint32_t*)regs[REG_R1]); -#endif - } - break; - - /* R0=SYS_restore_context: This a restore context command: - * - * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; - * - * At this point, the following values are saved in context: - * - * R0 = SYS_restore_context - * R1 = restoreregs - * - * In this case, we simply need to set current_regs to restore register - * area referenced in the saved R1. context == current_regs is the normal - * exception return. By setting current_regs = context[R1], we force - * the return to the saved context referenced in R1. - */ - - case SYS_restore_context: - { - DEBUGASSERT(regs[REG_R1] != 0); - current_regs = (uint32_t*)regs[REG_R1]; - } - break; - - /* R0=SYS_switch_context: This a switch context command: - * - * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); - * - * At this point, the following values are saved in context: - * - * R0 = 1 - * R1 = saveregs - * R2 = restoreregs - * - * In this case, we do both: We save the context registers to the save - * register area reference by the saved contents of R1 and then set - * current_regs to to the save register area referenced by the saved - * contents of R2. - */ - - case SYS_switch_context: - { - DEBUGASSERT(regs[REG_R1] != 0 && regs[REG_R2] != 0); - memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); -#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_ARMV7M_CMNVECTOR) - up_savefpu((uint32_t*)regs[REG_R1]); -#endif - current_regs = (uint32_t*)regs[REG_R2]; - } - break; - - /* This is not an architecture-specific system call. If NuttX is built - * as a standalone kernel with a system call interface, then all of the - * additional system calls must be handled as in the default case. - */ - - default: -#ifdef CONFIG_NUTTX_KERNEL - dispatch_syscall(regs); -#else - slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]); -#endif - break; - } - - /* Report what happened. That might difficult in the case of a context switch */ - - if (regs != current_regs) - { - svcdbg("SVCall Return: Context switch!\n"); - svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R0], current_regs[REG_R1], current_regs[REG_R2], current_regs[REG_R3], - current_regs[REG_R4], current_regs[REG_R5], current_regs[REG_R6], current_regs[REG_R7]); - svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n", - current_regs[REG_R8], current_regs[REG_R9], current_regs[REG_R10], current_regs[REG_R11], - current_regs[REG_R12], current_regs[REG_R13], current_regs[REG_R14], current_regs[REG_R15]); - svcdbg(" PSR=%08x\n", current_regs[REG_XPSR]); - } - else - { - svcdbg("SVCall Return: %d\n", regs[REG_R0]); - } - - return OK; -} diff --git a/nuttx/arch/arm/src/armv7-m/up_switchcontext.S b/nuttx/arch/arm/src/armv7-m/up_switchcontext.S deleted file mode 100755 index 762e2066e..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_switchcontext.S +++ /dev/null @@ -1,97 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/up_switchcontext.S - * - * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> -#include <arch/irq.h> - -#include "nvic.h" -#include "svcall.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .syntax unified - .thumb - .file "up_switchcontext.S" - -/************************************************************************************ - * Macros - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: up_switchcontext - * - * Description: - * Save the current thread context and restore the specified context. - * Full prototype is: - * - * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); - * - * Return: - * None - * - ************************************************************************************/ - - .thumb_func - .globl up_switchcontext - .type up_switchcontext, function -up_switchcontext: - - /* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */ - - mov r2, r1 /* R2: restoreregs */ - mov r1, r0 /* R1: saveregs */ - mov r0, #SYS_switch_context /* R0: context switch */ - svc 0 /* Force synchronous SVCall (or Hard Fault) */ - - /* This call should not return */ - - bx lr /* Unnecessary ... will not return */ - .size up_switchcontext, .-up_switchcontext - .end - diff --git a/nuttx/arch/arm/src/armv7-m/up_systemreset.c b/nuttx/arch/arm/src/armv7-m/up_systemreset.c deleted file mode 100644 index 0d7bd2736..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_systemreset.c +++ /dev/null @@ -1,79 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_systemreset.c - * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * Darcy Gong - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <stdint.h> - -#include "up_arch.h" -#include "nvic.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - - /**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Public functions - ****************************************************************************/ - -void up_systemreset(void) -{ - uint32_t regval; - - /* Set up for the system reset, retaining the priority group from the - * the AIRCR register. - */ - - regval = getreg32(NVIC_AIRCR) & NVIC_AIRCR_PRIGROUP_MASK; - regval |= ((0x5fa << NVIC_AIRCR_VECTKEY_SHIFT) | NVIC_AIRCR_SYSRESETREQ); - putreg32(regval, NVIC_AIRCR); - - /* Ensure completion of memory accesses */ - - __asm volatile ("dsb"); - - /* Wait for the reset */ - - for (;;); -} diff --git a/nuttx/arch/arm/src/armv7-m/up_unblocktask.c b/nuttx/arch/arm/src/armv7-m/up_unblocktask.c deleted file mode 100644 index da10f0376..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_unblocktask.c +++ /dev/null @@ -1,157 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_unblocktask.c - * - * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include <sched.h> -#include <debug.h> -#include <nuttx/arch.h> - -#include "os_internal.h" -#include "clock_internal.h" -#include "up_internal.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_unblock_task - * - * Description: - * A task is currently in an inactive task list - * but has been prepped to execute. Move the TCB to the - * ready-to-run list, restore its context, and start execution. - * - * Inputs: - * tcb: Refers to the tcb to be unblocked. This tcb is - * in one of the waiting tasks lists. It must be moved to - * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. - * - ****************************************************************************/ - -void up_unblock_task(_TCB *tcb) -{ - /* Verify that the context switch can be performed */ - - if ((tcb->task_state < FIRST_BLOCKED_STATE) || - (tcb->task_state > LAST_BLOCKED_STATE)) - { - PANIC(OSERR_BADUNBLOCKSTATE); - } - else - { - _TCB *rtcb = (_TCB*)g_readytorun.head; - - /* Remove the task from the blocked task list */ - - sched_removeblocked(tcb); - - /* Reset its timeslice. This is only meaningful for round - * robin tasks but it doesn't here to do it for everything - */ - -#if CONFIG_RR_INTERVAL > 0 - tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK; -#endif - - /* Add the task in the correct location in the prioritized - * g_readytorun task list - */ - - if (sched_addreadytorun(tcb)) - { - /* The currently active task has changed! We need to do - * a context switch to the new task. - * - * Are we in an interrupt handler? - */ - - if (current_regs) - { - /* Yes, then we have to do things differently. - * Just copy the current_regs into the OLD rtcb. - */ - - up_savestate(rtcb->xcp.regs); - - /* Restore the exception context of the rtcb at the (new) head - * of the g_readytorun task list. - */ - - rtcb = (_TCB*)g_readytorun.head; - - /* Then switch contexts */ - - up_restorestate(rtcb->xcp.regs); - } - - /* No, then we will need to perform the user context switch */ - - else - { - /* Switch context to the context of the task at the head of the - * ready to run list. - */ - - _TCB *nexttcb = (_TCB*)g_readytorun.head; - up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); - - /* up_switchcontext forces a context switch to the task at the - * head of the ready-to-run list. It does not 'return' in the - * normal sense. When it does return, it is because the blocked - * task is again ready to run and has execution priority. - */ - } - } - } -} diff --git a/nuttx/arch/arm/src/armv7-m/up_vectors.c b/nuttx/arch/arm/src/armv7-m/up_vectors.c deleted file mode 100644 index b85ac9246..000000000 --- a/nuttx/arch/arm/src/armv7-m/up_vectors.c +++ /dev/null @@ -1,95 +0,0 @@ -/**************************************************************************** - * arch/arm/src/armv7-m/up_vectors.c - * - * Copyright (C) 2012 Michael Smith. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include "chip.h" - -/************************************************************************************ - * Preprocessor Definitions - ************************************************************************************/ - -#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) - -#ifndef ARMV7M_PERIPHERAL_INTERRUPTS -# error ARMV7M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/* Chip-specific entrypoint */ - -extern void __start(void); - -/* Common exception entrypoint */ - -extern void exception_common(void); - -/************************************************************************************ - * Public data - ************************************************************************************/ - -/* Provided by the linker script to indicate the end of the BSS */ - -extern char _ebss; - -/* The v7m vector table consists of an array of function pointers, with the first - * slot (vector zero) used to hold the initial stack pointer. - * - * As all exceptions (interrupts) are routed via exception_common, we just need to - * fill this array with pointers to it. - * - * Note that the [ ... ] desginated initialiser is a GCC extension. - */ - -unsigned _vectors[] __attribute__((section(".vectors"))) = - { - /* Initial stack */ - - IDLE_STACK, - - /* Reset exception handler */ - - (unsigned)&__start, - - /* Vectors 2 - n point directly at the generic handler */ - - [2 ... (15 + ARMV7M_PERIPHERAL_INTERRUPTS)] = (unsigned)&exception_common - }; diff --git a/nuttx/arch/arm/src/armv7-m/vfork.S b/nuttx/arch/arm/src/armv7-m/vfork.S deleted file mode 100644 index f36ff23aa..000000000 --- a/nuttx/arch/arm/src/armv7-m/vfork.S +++ /dev/null @@ -1,142 +0,0 @@ -/************************************************************************************ - * arch/arm/src/armv7-m/vfork.S - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <gnutt@nuttx.org> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -#include "up_vfork.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Global Symbols - ************************************************************************************/ - - .syntax unified - .thumb - .file "vfork.S" - .globl up_vfork - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: vfork - * - * Description: - * The vfork() function has the same effect as fork(), except that the behavior is - * undefined if the process created by vfork() either modifies any data other than - * a variable of type pid_t used to store the return value from vfork(), or returns - * from the function in which vfork() was called, or calls any other function before - * successfully calling _exit() or one of the exec family of functions. - * - * This thin layer implements vfork by simply calling up_vfork() with the vfork() - * context as an argument. The overall sequence is: - * - * 1) User code calls vfork(). vfork() collects context information and - * transfers control up up_vfork(). - * 2) up_vfork()and calls task_vforksetup(). - * 3) task_vforksetup() allocates and configures the child task's TCB. This - * consists of: - * - Allocation of the child task's TCB. - * - Initialization of file descriptors and streams - * - Configuration of environment variables - * - Setup the intput parameters for the task. - * - Initialization of the TCB (including call to up_initial_state() - * 4) up_vfork() provides any additional operating context. up_vfork must: - * - Allocate and initialize the stack - * - Initialize special values in any CPU registers that were not - * already configured by up_initial_state() - * 5) up_vfork() then calls task_vforkstart() - * 6) task_vforkstart() then executes the child thread. - * - * Input Paremeters: - * None - * - * Return: - * Upon successful completion, vfork() returns 0 to the child process and returns - * the process ID of the child process to the parent process. Otherwise, -1 is - * returned to the parent, no child process is created, and errno is set to - * indicate the error. - * - ************************************************************************************/ - - .thumb_func - .globl vfork - .type vfork, function -vfork: - /* Create a stack frame */ - - mov r0, sp /* Save the value of the stack on entry */ - sub sp, sp, #VFORK_SIZEOF /* Allocate the structure on the stack */ - - /* CPU registers */ - /* Save the volatile registers */ - - str r4, [sp, #VFORK_R4_OFFSET] - str r5, [sp, #VFORK_R5_OFFSET] - str r6, [sp, #VFORK_R6_OFFSET] - str r7, [sp, #VFORK_R7_OFFSET] - str r8, [sp, #VFORK_R8_OFFSET] - str r9, [sp, #VFORK_R9_OFFSET] - str r10, [sp, #VFORK_R10_OFFSET] - - /* Save the frame pointer, stack pointer, and return address */ - - str fp, [sp, #VFORK_FP_OFFSET] - str r0, [sp, #VFORK_SP_OFFSET] - str lr, [sp, #VFORK_LR_OFFSET] - - /* Floating point registers (not yet) */ - - /* Then, call up_vfork(), passing it a pointer to the stack structure */ - - mov r0, sp - bl up_vfork - - /* Release the stack data and return the value returned by up_vfork */ - - ldr lr, [sp, #VFORK_LR_OFFSET] - add sp, sp, #VFORK_SIZEOF - bx lr - .size vfork, .-vfork - .end - |