diff options
Diffstat (limited to 'nuttx/arch/arm/src/stm32/Make.defs')
-rw-r--r-- | nuttx/arch/arm/src/stm32/Make.defs | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/stm32/Make.defs b/nuttx/arch/arm/src/stm32/Make.defs new file mode 100644 index 000000000..1deb23189 --- /dev/null +++ b/nuttx/arch/arm/src/stm32/Make.defs @@ -0,0 +1,143 @@ +############################################################################ +# arch/arm/src/stm32/Make.defs +# +# Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y) +HEAD_ASRC = +else +HEAD_ASRC = stm32_vectors.S +endif + +CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S +CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c \ + up_createstack.c up_mdelay.c up_udelay.c up_exit.c \ + up_initialize.c up_initialstate.c up_interruptcontext.c \ + up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \ + up_releasepending.c up_releasestack.c up_reprioritizertr.c \ + up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \ + up_usestack.c up_doirq.c up_hardfault.c up_svcall.c \ + up_stackcheck.c + +ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y) +CMN_ASRCS += up_exception.S +CMN_CSRCS += up_vectors.c +endif + +ifeq ($(CONFIG_DEBUG_STACK),y) +CMN_CSRCS += up_checkstack.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CMN_ASRCS += up_fpu.S +endif + +ifeq ($(CONFIG_ARCH_MEMCPY),y) +CMN_ASRCS += memcpy.S +endif + +CHIP_ASRCS = +CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c \ + stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c \ + stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \ + stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c + +ifeq ($(CONFIG_USBDEV),y) +ifeq ($(CONFIG_STM32_USB),y) +CMN_CSRCS += stm32_usbdev.c +endif +ifeq ($(CONFIG_STM32_OTGFS),y) +CMN_CSRCS += stm32_otgfsdev.c +endif +endif + +ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y) +CHIP_ASRCS += stm32_vectors.S +endif + +ifneq ($(CONFIG_IDLE_CUSTOM),y) +CHIP_CSRCS += stm32_idle.c +endif + +CHIP_CSRCS += stm32_pmstop.c stm32_pmstandby.c stm32_pmsleep.c + +ifneq ($(CONFIG_PM_CUSTOMINIT),y) +CHIP_CSRCS += stm32_pminitialize.c +endif + +ifeq ($(CONFIG_STM32_ETHMAC),y) +CHIP_CSRCS += stm32_eth.c +endif + +ifeq ($(CONFIG_STM32_PWR),y) +CHIP_CSRCS += stm32_pwr.c +endif + +ifeq ($(CONFIG_RTC),y) +CHIP_CSRCS += stm32_rtc.c +ifeq ($(CONFIG_RTC_ALARM),y) +CHIP_CSRCS += stm32_exti_alarm.c +endif +endif + +ifeq ($(CONFIG_ADC),y) +CHIP_CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_DAC),y) +CHIP_CSRCS += stm32_dac.c +endif + +ifeq ($(CONFIG_PWM),y) +CHIP_CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CHIP_CSRCS += stm32_qencoder.c +endif + +ifeq ($(CONFIG_CAN),y) +CHIP_CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_STM32_IWDG),y) +CHIP_CSRCS += stm32_iwdg.c +endif + +ifeq ($(CONFIG_STM32_WWDG),y) +CHIP_CSRCS += stm32_wwdg.c +endif + +ifeq ($(CONFIG_DEBUG),y) +CHIP_CSRCS += stm32_dumpgpio.c +endif |