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path: root/src/modules/px4iofirmware/serial.c
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* px4io: fixed the io_reg_{set,get} errorsAndrew Tridgell2013-10-281-17/+3
| | | | | | this fixes the PX4IO state machine to avoid the io errors we were seeing. There are still some open questions with this code, but it now seems to give zero errors, which is an improvement!
* Tweak IO serial packet error handling slightly; on reception of a serial ↵px4dev2013-07-071-10/+34
| | | | | | error send a line break back to FMU. This should cause FMU to stop sending immediately. Flag these cases and discard the packet rather than processing it, rather than simply dropping the received packet and letting FMU time out.
* Pull v2 pieces up to build with the mergepx4dev2013-07-071-1/+1
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* Enable UART error handling on PX4IO.px4dev2013-07-061-4/+3
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* Move the common definitions for the PX4IO serial protocol into the shared ↵px4dev2013-07-061-77/+2
| | | | header.
* Copy the correct number of bytes back for register read operations. Basic ↵px4dev2013-07-061-1/+1
| | | | PX4IO comms are working now.
* Enable handling for short-packet reception on FMU using the line-idle ↵px4dev2013-07-051-1/+1
| | | | interrupt from the UART. Enable short packets at both ends.
* Enable handling for short-packet reception on IO using the line-idle ↵px4dev2013-07-051-15/+22
| | | | interrupt from the UART.
* Remove the TX completion callback on the IO side.px4dev2013-07-051-40/+49
| | | | Report CRC, read and protocol errors.
* Send error response if register write fails.px4dev2013-07-051-1/+5
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* Be more consistent with the packet format definition.px4dev2013-07-051-5/+5
| | | | Free perf counters in ~PX4IO_serial
* Check packet CRCs and count errors; don't reject packets yet.px4dev2013-07-051-0/+7
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* Add an 8-bit CRC to each transmitted packet.px4dev2013-07-051-3/+54
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* Encode the packet type and result in the unused high bits of the word count.px4dev2013-07-051-7/+19
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* Always send and expect a reply for every message.px4dev2013-07-051-16/+12
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* Reset the PX4IO rx DMA if we haven't seen any traffic in a while; this gets ↵px4dev2013-07-041-0/+8
| | | | us back into sync.
* One more piece of paranoia when resetting DMApx4dev2013-07-041-1/+3
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* More test work on the px4io side of the serial interface.px4dev2013-07-041-41/+152
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* Rework the FMU<->IO connection to use a simple fixed-size DMA packet; this ↵px4dev2013-07-031-68/+101
| | | | | | should let us reduce overall latency and bump the bitrate up. Will still require some tuning.
* More implementation for the serial side on IO; fix a couple of bugs on the ↵px4dev2013-06-281-47/+78
| | | | | | FMU side. Still needs serial init and some more testing/config on the FMU side, but closer to being ready to test.
* Add serial read-length handling.px4dev2013-05-221-2/+6
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* Serial interface for IOv2px4dev2013-04-281-0/+129