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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-09-05 01:22:04 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-09-05 01:22:04 +0000 |
commit | ce45c0aa761a8805df73e322a839d623c1cedf4e (patch) | |
tree | 9a810656fcea49e012fbc18e1365ff574a8a6351 | |
parent | 5bb64be435bd192e7a3ca52bb5be8cff09cfd14c (diff) | |
download | px4-nuttx-ce45c0aa761a8805df73e322a839d623c1cedf4e.tar.gz px4-nuttx-ce45c0aa761a8805df73e322a839d623c1cedf4e.tar.bz2 px4-nuttx-ce45c0aa761a8805df73e322a839d623c1cedf4e.zip |
Basic MMU setup seems ok now
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2919 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/arch/arm/src/arm/pg_macros.h | 40 | ||||
-rw-r--r-- | nuttx/arch/arm/src/arm/up_vectoraddrexcptn.S | 2 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lpc313x/lpc313x_boot.c | 18 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h | 9 | ||||
-rwxr-xr-x | nuttx/configs/ea3131/locked/mklocked.sh | 2 |
5 files changed, 37 insertions, 34 deletions
diff --git a/nuttx/arch/arm/src/arm/pg_macros.h b/nuttx/arch/arm/src/arm/pg_macros.h index efc3a4faa..da7fe77fe 100644 --- a/nuttx/arch/arm/src/arm/pg_macros.h +++ b/nuttx/arch/arm/src/arm/pg_macros.h @@ -66,6 +66,29 @@ # error "Cannot support both CONFIG_PAGING and CONFIG_ARCH_ROMPGTABLE" #endif +/* Virtual Page Table Location **********************************************/ + +/* Check if the virtual address of the page table has been defined. It should + * not be defined: architecture specific logic should suppress defining + * PGTABLE_BASE_VADDR unless: (1) it is defined in the NuttX configuration + * file, or (2) the page table is position in low memory (because the vectors + * are in high memory). + */ + +#ifndef PGTABLE_BASE_VADDR +# define PGTABLE_BASE_VADDR (PG_LOCKED_VBASE + PG_TEXT_VSIZE + PG_DATA_SIZE) + + /* Virtual base of the address of the L2 page tables need to recalculates + * using this new virtual base address of the L2 page table. + */ + +# undef PGTABLE_L2_FINE_VBASE +# define PGTABLE_L2_FINE_VBASE (PGTABLE_BASE_VADDR+PGTABLE_L2_FINE_OFFSET) + +# undef PGTABLE_L2_COARSE_VBASE +# define PGTABLE_L2_COARSE_VBASE (PGTABLE_BASE_VADDR+PGTABLE_L2_COARSE_OFFSET) +#endif + /* Page Size Selections *****************************************************/ /* Create some friendly definitions to handle some differences between @@ -134,19 +157,6 @@ #define PT_SIZE (4*PTE_NPAGES) -/* Virtual Page Table Location **********************************************/ - -/* Check if the virtual address of the page table has been defined. It should - * not be defined: architecture specific logic should suppress defining - * PGTABLE_BASE_VADDR unless: (1) it is defined in the NuttX configuration - * file, or (2) the page table is position in low memory (because the vectors - * are in high memory). - */ - -#ifndef PGTABLE_BASE_VADDR -# define PGTABLE_BASE_VADDR (PG_LOCKED_VBASE + PG_TEXT_VSIZE + PG_DATA_SIZE) -#endif - /* Addresses of Memory Regions **********************************************/ /* We position the locked region PTEs at an offset into the first @@ -254,8 +264,8 @@ #elif defined(CONFIG_ARCH_LOWVECTORS) && !defined(CONFIG_PAGING_LOCKED_PBASE) # define PG_VECT_PBASE PG_LOCKED_PBASE -# define PG_L2_VECT_PADDR PG_L2_LOCKED_PADDR -# define PG_L2_VECT_VADDR PG_L2_LOCKED_VADDR +# define PG_L2_VECT_PADDR PGTABLE_L2_BASE_PADDR +# define PG_L2_VECT_VADDR PGTABLE_L2_BASE_VADDR /* Case 3: High vectors or the locked region is not at the beginning or SRAM */ diff --git a/nuttx/arch/arm/src/arm/up_vectoraddrexcptn.S b/nuttx/arch/arm/src/arm/up_vectoraddrexcptn.S index 28df31481..ceb27b7be 100644 --- a/nuttx/arch/arm/src/arm/up_vectoraddrexcptn.S +++ b/nuttx/arch/arm/src/arm/up_vectoraddrexcptn.S @@ -79,5 +79,5 @@ .type up_vectoraddrexcptn, %function up_vectoraddrexcptn: b up_vectoraddrexcptn - .size up_vectoaddrexcptn, . - up_vectoraddrexcptn + .size up_vectoraddrexcptn, . - up_vectoraddrexcptn .end diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c index 51f6079bd..4e96e60c8 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c @@ -208,18 +208,16 @@ static void up_setupmappings(void) #if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) static void up_vectorpermissions(uint32_t mmuflags) { - uint32_t *ptr = (uint32_t*)PG_L2_VECT_VADDR; + /* The PTE for virtual address zero is at the base of the L2 page table */ + + uint32_t *ptr = (uint32_t*)PGTABLE_BASE_VADDR; uint32_t pte; /* This is easily because we have already been told everything! */ pte = *ptr; -#ifdef CONFIG_PAGING_VECPPAGE - /* We've been told to use a specify page for the vectors. In this - * case, I expect the pte to be zero the first time this function is - * called (what if it is not?) - */ + /* The pte might be zero the first time this function is called . */ if (pte == 0) { @@ -229,14 +227,6 @@ static void up_vectorpermissions(uint32_t mmuflags) { pte &= PG_L1_PADDRMASK; } -#else - /* Otherwise, we should be using the page at the beginning of the - * locked text region. - */ - - ASSERT(pte != 0); - pte &= PG_L1_PADDRMASK; -#endif /* Update the MMU flags and save */ diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h index e4693a859..5812a20e9 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h @@ -318,7 +318,7 @@ # endif # define PGTABLE_IN_HIGHSRAM 1 - /* If CONFIG_PAGING is defined, insisted that pg_macros.h assign the virtual + /* If CONFIG_PAGING is defined, insist that pg_macros.h assign the virtual * address of the page table. */ @@ -340,11 +340,14 @@ # endif #endif -/* 16Kb of memory is reserved hold the page table for the virtual mappings. A +/* Page table start addresses: + * + * 16Kb of memory is reserved hold the page table for the virtual mappings. A * portion of this table is not accessible in the virtual address space (for * normal operation). We will reuse this memory for coarse page tables as follows: * - * Page table start addresses: + * NOTE: If CONFIG_PAGING is defined, pg_macros.h will re-assign the virtual + * address of the page table. */ #define PGTABLE_L2_COARSE_OFFSET ((((LPC313X_LAST_PSECTION >> 20) + 255) & ~255) << 2) diff --git a/nuttx/configs/ea3131/locked/mklocked.sh b/nuttx/configs/ea3131/locked/mklocked.sh index 911cfb958..0bd8f0896 100755 --- a/nuttx/configs/ea3131/locked/mklocked.sh +++ b/nuttx/configs/ea3131/locked/mklocked.sh @@ -90,7 +90,7 @@ echo "EXTERN(up_vectorprefetch)" >>ld-locked.inc echo "EXTERN(up_vectorundefinsn)" >>ld-locked.inc echo "EXTERN(up_vectorfiq)" >>ld-locked.inc echo "EXTERN(up_vectorirq)" >>ld-locked.inc -echo "EXTERN(up_vectoaddrexcptn)" >>ld-locked.inc +echo "EXTERN(up_vectoraddrexcptn)" >>ld-locked.inc # # These are the initialization entry points of all device drivers that |