diff options
author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-23 14:39:56 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-23 14:39:56 -0600 |
commit | 9d4f3f645e606d812e3bec76a10940691b30b5ff (patch) | |
tree | ec970f690586d7ce93d937df8d6389bc1ecbdf57 | |
parent | 333edc2da8d4bad41a3ea553bf635cbad5119427 (diff) | |
download | px4-nuttx-9d4f3f645e606d812e3bec76a10940691b30b5ff.tar.gz px4-nuttx-9d4f3f645e606d812e3bec76a10940691b30b5ff.tar.bz2 px4-nuttx-9d4f3f645e606d812e3bec76a10940691b30b5ff.zip |
Add support for the UG-2843HHSWEG04 OLED and for the SAM4L Xplained Pro OLED module that uses that OLED.
19 files changed, 762 insertions, 272 deletions
diff --git a/apps/ChangeLog.txt b/apps/ChangeLog.txt index 96208f250..dc2c6e279 100644 --- a/apps/ChangeLog.txt +++ b/apps/ChangeLog.txt @@ -591,3 +591,6 @@ will do C++ initialization unless configured do otherwise (2013-6-21). * apps/examples/cxxtext: Add ostream test as provided by Michael (2013-6-21). + * apps/examples/nxhello: Minor fix for compilation error when the + display resolution is low (< 8bpp) due to a typo that has been there + for a long time (2013-6-23). diff --git a/apps/examples/nxhello/Kconfig b/apps/examples/nxhello/Kconfig index 52924e38e..4f15c94f6 100644 --- a/apps/examples/nxhello/Kconfig +++ b/apps/examples/nxhello/Kconfig @@ -29,7 +29,7 @@ config EXAMPLES_NXHELLO_BPP int "Bits-Per-Pixel" default 32 ---help--- - Pixels per pixel to use. Valid options include 2, 4, 8, 16, 24, + Pixels per pixel to use. Valid options include 1, 2, 4, 8, 16, 24, and 32. Default is 32. diff --git a/apps/examples/nxhello/nxhello_bkgd.c b/apps/examples/nxhello/nxhello_bkgd.c index ad1b99d24..d0de6d841 100644 --- a/apps/examples/nxhello/nxhello_bkgd.c +++ b/apps/examples/nxhello/nxhello_bkgd.c @@ -1,7 +1,7 @@ /**************************************************************************** * examples/nxhello/nxhello_bkgd.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -296,7 +296,7 @@ static void nxhello_initglyph(FAR uint8_t *glyph, uint8_t height, pixel = (pixel) << 4 | pixel; ptr = (FAR nxgl_mxpixel_t *)glyph; - for (row = 0; row < fheight; row++) + for (row = 0; row < height; row++) { for (col = 0; col < stride; col++) { diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 03ba24550..5bcbba4a0 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -5032,3 +5032,12 @@ #5. From Dave (ziggurat29, 2013-6-22). * configs/sam4l-xplained/src/sam_slcd.c: LED1 segment LCD module is now functional (2013-6-23). + * drivers/lcd/ssd1306.c and include/nuttx/lcd/ssd1306.h. Renamed + ug-2864hsweg01.c and .h to ssd1306.c and .h. Extended to support the + UG-2832HSWEG04 which is very similar and also based on the SSD1306 + controller (2013-6-23). + * configs/sam4l-xplained/src/sam_ug2832hsweg04.c: Add support for the + UG-2832HSWEG04 OLED on the SAM4L Xplained Pro's OLED1 module + (2013-6-23). + * include/debug.h: Added macro DEBUGPANIC for forces crashes when debug + is enabled. diff --git a/nuttx/configs/mikroe-stm32f4/README.txt b/nuttx/configs/mikroe-stm32f4/README.txt index fffe9161b..487de7112 100644 --- a/nuttx/configs/mikroe-stm32f4/README.txt +++ b/nuttx/configs/mikroe-stm32f4/README.txt @@ -33,7 +33,6 @@ Contents - FPU - FSMC SRAM - SSD1289 - - UG-2864AMBAG01 / UG-2964SWEG01 - Mikroe-STM32F4-specific Configuration Options - Configurations diff --git a/nuttx/configs/sam4l-xplained/README.txt b/nuttx/configs/sam4l-xplained/README.txt index 17971ba4d..506d40586 100644 --- a/nuttx/configs/sam4l-xplained/README.txt +++ b/nuttx/configs/sam4l-xplained/README.txt @@ -116,31 +116,64 @@ Modules CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1=y : The module is installed in EXT1 CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2=y : The mdoule is installed in EXT2 + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + NOTE: As of this writing, only the SD card slot is supported in the I/O1 module. OLED1 ----- - This module provides an OLED plus 3 additional switches and 3 additional\ + This module provides an OLED plus 3 additional switches and 3 additional LEDs. + OLED1 Connector + -------------- + OLED1 EXT1 EXT2 Other use of either pin + ----------------- -------------------- -------------------- ------------------------------------ + 1 ID 1 1 + 2 GND 2 GND 2 + 3 BUTTON2 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + 4 BUTTON3 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 + 5 DATA_CMD_SEL 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 + 6 LED3 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 + 7 LED1 7 PC00 TC/1/A0 7 PC04 TC/1/A2 + 8 LED2 8 PC01 TC/1/B0 8 PC05 TC/1/B2 PC05 on EXT5 + 9 BUTTON1 9 PC25 EIC/EXTINT2 9 PC06 EIC/EXTINT8 PC25 on EXT5 + 10 DISPLAY_RESET 10 PB13 SPI/NPCS1 10 PC09 GPIO PB13 on EXT5 + 11 N/C 11 PA23 TWIMS/0/TWD 11 PB14 TWIMS/3/TWD PB14 on EXT3&4, PA23 and PB14 on EXT5 + 12 N/C 12 PA24 TWIMS/0/TWCK 12 PB15 TWIMS/3/TWCK PB15 on EXT3&4, PA24 and PB15 on EXT5 + 13 N/C 13 PB00 USART/0/RXD 13 PC26 USART/1/RXD PB00 on EXT4, PC26 on EXT3&5 + 14 N/C 14 PB01 USART/0/TXD 14 PC27 USART/1/TXD PB01 on EXT4, PC27 on EXT3&5 + 15 DISPLAY_SS 15 PC03 SPI/NPCS0 15 PB11 SPI/NPCS2 PB11 on EXT5 + 16 SPI_MOSI 16 PA22 SPI/MOSI 16 PA22 SPI/MOSI PA22 on EXT5 + 17 N/C 17 PA21 SPI/MISO 17 PA21 SPI/MISO PA21 on EXT5 + 18 SPI_SCK 18 PC30 SPI/SCK 18 PC30 SPI/SCK PC30 on EXT5 + 19 GND 19 GND GND + 20 VCC 20 VCC VCC + Configuration Options: ---------------------- - CONFIG_SAM4L_XPLAINED_OLED1MODULE=y : Informs the system that the - I/O1 module is installed + CONFIG_SAM4L_XPLAINED_OLED1MODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2=y : The mdoule is installed in EXT2 - NOTE: As of this writing, the OLED1 module is not supported. + See the set-up in the discussion of the nsh configuration below for other + required configuration options. SLCD1 ----- - This module provides a A segment LCD that connects directly to the "EXT5 SEGMENT LCD" - connector + This module provides a A segment LCD that connects directly to the "EXT5 + SEGMENT LCD" connector + Configuration Options: ---------------------- CONFIG_SAM4L_XPLAINED_SLCD1MODULE=y : Informs the system that the I/O1 module is installed - NOTE: As of this writing, the SLCD1 module is not supported. + See the set-up in the discussion of the nsh configuration below for other + required configuration options. PROTO1 ------ @@ -681,7 +714,17 @@ Configuration sub-directories NOTES: - 1. If the I/O1 module is connected to the SAM4L Xplained Pro, then + 1. NOTE: If you get a compilation error like: + + libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' + ('unsigned int') as first parameter [-fper + + Sometimes NuttX and your toolchain will disagree on the underlying + type of size_t; sometimes it is an 'unsigned int' and sometimes it is + an 'unsigned long int'. If this error occurs, then you may need to + toggle the value of CONFIG_CXX_NEWLONG. + + 2. If the I/O1 module is connected to the SAM4L Xplained Pro, then support for the SD card slot can be enabled by making the following changes to the configuration: @@ -730,16 +773,6 @@ Configuration sub-directories behave very well (since its outgoing prompts also appear as incoming commands). - NOTE: If you get a compilation error like: - - libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' - ('unsigned int') as first parameter [-fper - - Sometimes NuttX and your toolchain will disagree on the underlying - type of size_t; sometimes it is an 'unsigned int' and sometimes it is - an 'unsigned long int'. If this error occurs, then you may need to - toggle the value of CONFIG_CXX_NEWLONG. - STATUS: As of 2013-6-18, this configuration appears completely functional. Testing, however, has been very light. Example: @@ -755,7 +788,61 @@ Configuration sub-directories This is a test nsh> - 2. If the LCD1 module is connected to the SAM4L Xplained Pro, then + 3. If the OLED1 module is connected to the SAM4L Xplained Pro, then + support for the OLED display can be enabled by making the following + changes to the configuration: + + System Type -> Peripherals: + CONFIG_SAM34_SPI=y : Enable the SAM4L SPI peripheral + + Device Drivers -> SPI + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_CMDDATA=y : CMD/DATA support is required + CONFIG_SPI_OWNBUS=y : Smaller code if this is the only SPI device + + Device Drivers -> LCDs + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=255 : Maximum contrast value + CONFIG_LCD_UG2832HSWEG04=y : Enable support for the OLED + CONFIG_LCD_SSD1306_SPIMODE=0 : SPI Mode 0 + CONFIG_LCD_SSD1306_SPIMODE=3500000 : Pick an SPI frequency + + Board Selection -> SAM4L Xplained Pro Modules + CONFIG_SAM4L_XPLAINED_OLED1MODULE=y : OLED1 module is connected + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1=y : In EXT1, or EXT2 + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2=y + + The NX graphics subsystem also needs to be configured: + + CONFIG_NX=y : Enable graphics support + CONFIG_NX_LCDDRIVER=y : Using an LCD driver + CONFIG_NX_NPLANES=1 : With a single color plane + CONFIG_NX_WRITEONLY=y : This is a write only LCD + CONFIG_NX_DISABLE_2BPP=y : Disable all resolutions except 1BPP + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_16BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + CONFIG_NX_PACKEDMSFIRST=y + CONFIG_NXTK_BORDERWIDTH=2 : Use a small border + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y : Default border colors + CONFIG_NXFONTS_CHARBITS=7 : 7-bit fonts + CONFIG_NXFONT_SANS17X23B=y : Pick a font (any that will fit) + + Then, in order to use the OLED, you will need to build some kind of + graphics application or use one of the NuttX graphics examples. + Here, for example, is the setup for the graphic "Hello, World!" + example: + + CONFIG_EXAMPLES_NXHELLO=y : Enables the example + CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y : Use default colors (monochrome) + CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y : Use the default font + CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel + CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. + + 4. If the LCD1 module is connected to the SAM4L Xplained Pro, then support for the SLCDt can be enabled by making the following changes to the configuration: diff --git a/nuttx/configs/sam4l-xplained/src/Makefile b/nuttx/configs/sam4l-xplained/src/Makefile index 1e80e8c6e..d4c215099 100644 --- a/nuttx/configs/sam4l-xplained/src/Makefile +++ b/nuttx/configs/sam4l-xplained/src/Makefile @@ -76,6 +76,14 @@ CSRCS += sam_mmcsd.c endif endif +ifeq ($(CONFIG_SAM34_SPI),y) +ifeq ($(CONFIG_SAM4L_XPLAINED_OLED1MODULE),y) +ifeq ($(CONFIG_LCD_UG2832HSWEG04),y) +CSRCS += sam_ug2832hsweg04.c +endif +endif +endif + COBJS = $(CSRCS:.c=$(OBJEXT)) SRCS = $(ASRCS) $(CSRCS) diff --git a/nuttx/configs/sam4l-xplained/src/sam4l-xplained.h b/nuttx/configs/sam4l-xplained/src/sam4l-xplained.h index 003d6f29e..b4d00002c 100644 --- a/nuttx/configs/sam4l-xplained/src/sam4l-xplained.h +++ b/nuttx/configs/sam4l-xplained/src/sam4l-xplained.h @@ -175,14 +175,15 @@ /* I/O1 * * Support for the microSD card slot on the I/O1 module. The I/O1 requires - * SPI support and two GPIOs. These two GPIOs will vary if the + * SPI support and two GPIOs. These the GPIOs will vary if the I/O1 + * is installed on the EXT1 or EXT2 connector: * * * PIN EXT1 EXT2 Description * --- -------------- --------------- ------------------------------------- * 15 PC03 SPI/NPCS0 PB11 SPI/NPCS2 Active low chip select OUTPUT, pulled * high on board. - * 10 PB13 SPI/NPCS1 10 PC09 GPIO Active low card detect INPUT, must + * 10 PB13 SPI/NPCS1 PC09 GPIO Active low card detect INPUT, must * use internal pull-up. */ @@ -194,8 +195,9 @@ # if defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1) -# if defined(SAM4L_XPLAINED_OLED1MODULE) && defined(SAM4L_XPLAINED_OLED1MODULE_EXT1) -# error I/O1 and OLED1 cannot both reside in EXT1 +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1) +# error I/O1 and OLED1 modules cannot both reside in EXT1 # endif # define GPIO_SD_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \ @@ -212,8 +214,9 @@ # error I/O1 cannot be in EXT2 if the LCD1 module is connected # endif -# if defined(SAM4L_XPLAINED_OLED1MODULE) && defined(SAM4L_XPLAINED_OLED1MODULE_EXT2) -# error I/O1 and OLED1 cannot both reside in EXT2 +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2) +# error I/O1 and OLED1 modules cannot both reside in EXT2 # endif # define GPIO_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \ @@ -229,6 +232,82 @@ # endif #endif +/* OLED1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and three output GPIOs. These the GPIOs will vary if the OLED1 + * is installed on the EXT1 or EXT2 connector: + * + * + * PIN EXT1 EXT2 Description + * --- -------------- --------------- ------------------------------------- + * 5 PB12 GPIO PC08 GPIO DATA_CMD_SEL + * 10 PB13 SPI/NPCS1 PC09 GPIO DISPLAY_RESET. Active low. + * 15 PC03 SPI/NPCS0 PB11 SPI/NPCS2 DISPLAY_SS. Active low. + */ + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + +# ifndef CONFIG_SAM34_SPI +# error CONFIG_SAM34_SPI is required to use the OLED1 module +# endif + +# ifndef CONFIG_SPI_CMDDATA +# error CONFIG_SPI_CMDDATA is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_SSD1306 +# error CONFIG_LCD_SSD1306 is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_UG2832HSWEG04 +# error CONFIG_LCD_UG2832HSWEG04 is required to use the OLED1 module +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1) + +# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1) +# error OLED1 and I/O1 modules cannot both reside in EXT1 +# endif + +# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN12) +# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN13) +# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTC | GPIO_PIN3) +# define OLED_CSNO 0 + +# elif defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2) + +# ifndef CONFIG_SAM4L_XPLAINED_SLCD1MODULE +# error OLED1 cannot be in EXT2 if the LCD1 module is connected +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2) +# error OLED1 and I/O1 modules cannot both reside in EXT2 +# endif + +# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTC | GPIO_PIN8) +# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTc | GPIO_PIN9) +# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) +# define OLED_CSNO 2 + +# else +# error Which connector is the OLED1 module installed in? +# endif +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) +# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) +#endif + /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/nuttx/configs/sam4l-xplained/src/sam_spi.c b/nuttx/configs/sam4l-xplained/src/sam_spi.c index 465f59e61..23725aade 100644 --- a/nuttx/configs/sam4l-xplained/src/sam_spi.c +++ b/nuttx/configs/sam4l-xplained/src/sam_spi.c @@ -101,6 +101,11 @@ void weak_function sam_spiinitialize(void) sam_configgpio(GPIO_SD_CD); /* Card detect input */ sam_configgpio(GPIO_SD_CS); /* Chip select output */ #endif + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + sam_configgpio(GPIO_OLED_DATA); /* Command/data */ + sam_configgpio(GPIO_OLED_CS ); /* Card detect input */ +#endif } /**************************************************************************** @@ -172,6 +177,21 @@ void sam_spiselect(enum spi_dev_e devid, bool selected) sam_gpiowrite(GPIO_SD_CS, !selected); } + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + else +#endif +#endif + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_gpiowrite(GPIO_OLED_CS, !selected); + } #endif } @@ -211,3 +231,47 @@ uint8_t sam_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) } #endif /* CONFIG_SAM34_SPI */ + +/**************************************************************************** + * Name: sam_spicmddata + * + * Description: + * Some SPI devices require an additional control to determine if the SPI + * data being sent is a command or is data. If CONFIG_SPI_CMDDATA then + * this function will be called to different be command and data transfers. + * + * This is often needed, for example, by LCD drivers. Some LCD hardware + * may be configured to use 9-bit data transfers with the 9th bit + * indicating command or data. That same hardware may be configurable, + * instead, to use 8-bit data but to require an additional, board- + * specific GPIO control to distinguish command and data. This function + * would be needed in that latter case. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Zero on success; a negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +int sam_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_gpiowrite(GPIO_OLED_DATA, !cmd); + } +#endif + return OK; +} +#endif diff --git a/nuttx/configs/sam4l-xplained/src/sam_ug2832hsweg04.c b/nuttx/configs/sam4l-xplained/src/sam_ug2832hsweg04.c new file mode 100644 index 000000000..5ea61774a --- /dev/null +++ b/nuttx/configs/sam4l-xplained/src/sam_ug2832hsweg04.c @@ -0,0 +1,181 @@ +/**************************************************************************** + * config/sam4l-xplained/src/sam_ug2832hsweg04.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* OLED1 Connector: + * + * OLED1 EXT1 EXT2 Other use of either pin + * ----------------- -------------------- -------------------- ------------------------------------ + * 1 ID 1 1 + * 2 GND 2 GND 2 + * 3 BUTTON2 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + * 4 BUTTON3 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 + * 5 DATA_CMD_SEL 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 + * 6 LED3 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 + * 7 LED1 7 PC00 TC/1/A0 7 PC04 TC/1/A2 + * 8 LED2 8 PC01 TC/1/B0 8 PC05 TC/1/B2 PC05 on EXT5 + * 9 BUTTON1 9 PC25 EIC/EXTINT2 9 PC06 EIC/EXTINT8 PC25 on EXT5 + * 10 DISPLAY_RESET 10 PB13 SPI/NPCS1 10 PC09 GPIO PB13 on EXT5 + * 11 N/C 11 PA23 TWIMS/0/TWD 11 PB14 TWIMS/3/TWD PB14 on EXT3&4, PA23 and PB14 on EXT5 + * 12 N/C 12 PA24 TWIMS/0/TWCK 12 PB15 TWIMS/3/TWCK PB15 on EXT3&4, PA24 and PB15 on EXT5 + * 13 N/C 13 PB00 USART/0/RXD 13 PC26 USART/1/RXD PB00 on EXT4, PC26 on EXT3&5 + * 14 N/C 14 PB01 USART/0/TXD 14 PC27 USART/1/TXD PB01 on EXT4, PC27 on EXT3&5 + * 15 DISPLAY_SS 15 PC03 SPI/NPCS0 15 PB11 SPI/NPCS2 PB11 on EXT5 + * 16 SPI_MOSI 16 PA22 SPI/MOSI 16 PA22 SPI/MOSI PA22 on EXT5 + * 17 N/C 17 PA21 SPI/MISO 17 PA21 SPI/MISO PA21 on EXT5 + * 18 SPI_SCK 18 PC30 SPI/SCK 18 PC30 SPI/SCK PC30 on EXT5 + * 19 GND 19 GND GND + * 20 VCC 20 VCC VCC + * + * OLED1 signals + * + * DATA_CMD_SEL - Data/command select. Used to choose whether the + * communication is data to the display memory or a command to the LCD + * controller. High = data, low = command + * DISPLAY_RESET - Reset signal to the OLED display, active low. Used during + * initialization of the display. + * DISPLAY_SS - SPI slave select signal, must be held low during SPI + * communication. + * SPI_MOSI - SPI master out, slave in signal. Used to write data to the + * display + * SPI_SCK SPI - clock signal, generated by the master. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <debug.h> + +#include <nuttx/spi.h> +#include <nuttx/lcd/lcd.h> +#include <nuttx/lcd/ssd1306.h> + +#include "sam_gpio.h" +#include "sam4l-xplained.h" + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_LCD_SSD1306 +# error "The OLED driver requires CONFIG_LCD_SSD1306 in the configuration" +#endif + +#ifndef CONFIG_LCD_UG2832HSWEG04 +# error "The OLED driver requires CONFIG_LCD_UG2832HSWEG04 in the configuration" +#endif + +#ifndef CONFIG_SAM34_SPI +# error "The OLED driver requires CONFIG_SAM34_SPI in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, arg...) dbg(format, ##arg) +# define lcdvdbg(format, arg...) vdbg(format, ##arg) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_nxdrvinit + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)sam_configgpio(GPIO_OLED_RST); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + sam_gpiowrite(GPIO_OLED_RST, true); + + /* Get the SPI1 port interface */ + + spi = up_spiinitialize(OLED_CSNO); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_SAM4L_XPLAINED_OLED1MODULE */ diff --git a/nuttx/configs/stm32f4discovery/README.txt b/nuttx/configs/stm32f4discovery/README.txt index f3cd7901b..422aac1bc 100644 --- a/nuttx/configs/stm32f4discovery/README.txt +++ b/nuttx/configs/stm32f4discovery/README.txt @@ -33,7 +33,7 @@ Contents - FPU - FSMC SRAM - SSD1289 - - UG-2864AMBAG01 / UG-2964SWEG01 + - UG-2864AMBAG01 / UG-2864HSWEG01 - STM32F4Discovery-specific Configuration Options - Configurations @@ -707,8 +707,8 @@ The following summarize the bit banging oprations: WriteData(data); } -UG-2864AMBAG01 / UG-2964SWEG01 -============================== +UG-2864AMBAG01 / UG-2864HSWEG01 +=============================== I purchased an OLED display on eBay. The OLED is 128x64 monochrome and is based on an UG-2864AMBAG01 OLED controller. The OLED can run in either @@ -740,9 +740,9 @@ that I am using: (1) Required because of on-board MEMS ------------------------------------------------------------------------- -Darcy Gong recently added support for the UG-2964SWEG01 OLED which is also +Darcy Gong recently added support for the UG-2864HSWEG01 OLED which is also an option with this configuratin. I have little technical information about -the UG-2964SWEG01 interface (see configs/stm32f4discovery/src/up_ug2864sweg01.c). +the UG-2864HSWEG01 interface (see configs/stm32f4discovery/src/up_ug2864hsweg01.c). STM32F4Discovery-specific Configuration Options =============================================== @@ -1437,7 +1437,7 @@ Where <subdir> is one of the following: reconfiguration process. 3. This configured can be re-configured to use either the - UG-2864AMBAG01 or UG-2864SWEG01 0.96 inch OLEDs by adding + UG-2864AMBAG01 or UG-2864HSWEG01 0.96 inch OLEDs by adding or changing the following items in the configuration (using 'make menuconfig'): diff --git a/nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h b/nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h index 982ef38d4..2df40c570 100644 --- a/nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h +++ b/nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h @@ -96,7 +96,7 @@ #define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) -/* USB OTG FS +/* USB OTG FS * * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) * PC0 OTG_FS_PowerSwitchOn @@ -134,7 +134,7 @@ * (1) Required because of on-board MEMS * ------------------------------------------------------------------------- */ - + #if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) # define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6) diff --git a/nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c b/nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c index b6fe354d3..fbf414276 100644 --- a/nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c +++ b/nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c @@ -44,7 +44,7 @@ #include <nuttx/spi.h> #include <nuttx/lcd/lcd.h> -#include <nuttx/lcd/ug-2864hsweg01.h> +#include <nuttx/lcd/ssd1306.h> #include "stm32_gpio.h" #include "stm32f4discovery-internal.h" @@ -140,7 +140,7 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno) { /* Bind the SPI port to the OLED */ - dev = ug2864hsweg01_initialize(spi, devno); + dev = ssd1306_initialize(spi, devno); if (!dev) { lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); diff --git a/nuttx/drivers/lcd/Kconfig b/nuttx/drivers/lcd/Kconfig index 7f0871201..2f956963b 100644 --- a/nuttx/drivers/lcd/Kconfig +++ b/nuttx/drivers/lcd/Kconfig @@ -205,6 +205,7 @@ config LCD_MIO283QT2 config LCD_UG9664HSWAG01 bool "UG-9664HSWAG01 OLED Display Module" default n + depends on SPI ---help--- OLED Display Module, UG-9664HSWAG01, Univision Technology Inc. Used with the LPCXpresso and Embedded Artists base board. @@ -221,6 +222,7 @@ if LCD_UG9664HSWAG01 config UG9664HSWAG01_SPIMODE int "UG-9664HSWAG01 SPI Mode" default 0 + range 0 3 ---help--- Controls the SPI mode @@ -247,6 +249,68 @@ config UG9664HSWAG01_POWER endif +config LCD_UG2864HSWEG01 + bool "UG-2864HSWEG01 OLED Display Module" + default n + depends on SPI + select LCD_SSD1306 + ---help--- + OLED Display Module, UG-2864HSWEG01, Univision Technology Inc based + on the Solomon Tech SSD1306 LCD controller. + + Required LCD driver settings: + LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted. + LCD_MAXPOWER should be 1: 0=off, 1=on + + Required SPI driver settings: + SPI_CMDDATA - Include support for cmd/data selection. + + +config LCD_UG2832HSWEG04 + bool "UG-2832HSWEG04 OLED Display Module" + default n + depends on SPI && !LCD_UG2864HSWEG01 + select LCD_SSD1306 + ---help--- + OLED Display Module, UG-UG2832HSWEG04, Univision Technology Inc + based on the Solomon Tech SSD1306 LCD controller. Used with the + Atmel SAM4L Xplained Pro board on the OLED1 module. + + Required LCD driver settings: + LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted. + LCD_MAXPOWER should be 1: 0=off, 1=on + + Required SPI driver settings: + SPI_CMDDATA - Include support for cmd/data selection. + +config LCD_SSD1306 + bool + +if LCD_SSD1306 + +config SSD1306_SPIMODE + int "SSD1306 SPI Mode" + default 0 + range 0 3 + ---help--- + Selects the SPI mode used with the SSD1306 device + +config SSD1306_FREQUENCY + int "SSD1306 SPI Frequency" + default 3500000 + ---help--- + Selects the SPI bus frequency used with the SSD1306 device + +#config SSD1306_NINTERFACES +# int "Number of SSD1306 Devices" +# default 1 +# ---help--- +# Specifies the number of physical SSD1306 devices that will be +# supported. NOTE: At present, this must be undefined or defined to +# be 1. + +endif + config LCD_ST7567 bool "ST7567 LCD Display Module" default n @@ -266,6 +330,7 @@ if LCD_ST7567 config ST7567_SPIMODE int "ST7567 SPI Mode" default 0 + range 0 3 ---help--- Controls the SPI mode @@ -319,9 +384,10 @@ config LCD_UG2864AMBAG01 if LCD_UG2864AMBAG01 - config UG2864AMBAG01_SPIMODE +config UG2864AMBAG01_SPIMODE int "UG-2864AMBAG01 SPI Mode" default 3 + range 0 3 ---help--- Controls the SPI mode diff --git a/nuttx/drivers/lcd/Make.defs b/nuttx/drivers/lcd/Make.defs index 649979121..fcff2e02e 100644 --- a/nuttx/drivers/lcd/Make.defs +++ b/nuttx/drivers/lcd/Make.defs @@ -51,14 +51,14 @@ ifeq ($(CONFIG_LCD_UG2864AMBAG01),y) CSRCS += ug-2864ambag01.c endif -ifeq ($(CONFIG_LCD_UG2864HSWEG01),y) - CSRCS += ug-2864hsweg01.c -endif - ifeq ($(CONFIG_LCD_UG9664HSWAG01),y) CSRCS += ug-9664hswag01.c endif +ifeq ($(CONFIG_LCD_SSD1306),y) + CSRCS += ssd1306.c +endif + ifeq ($(CONFIG_LCD_SSD1289),y) CSRCS += ssd1289.c endif diff --git a/nuttx/drivers/lcd/README.txt b/nuttx/drivers/lcd/README.txt index 2092b53d1..469e2f499 100644 --- a/nuttx/drivers/lcd/README.txt +++ b/nuttx/drivers/lcd/README.txt @@ -118,6 +118,11 @@ Re-usable LCD drivers reside in the drivers/lcd directory: Technology Inc. Used with the LPC Xpresso and Embedded Artists base board. + ssd1306.c. OLED Display Modules based on the SSD1306 controllers. + This includes the UG-2864HSWEG01 and UG2832HSWEG04, Both from Univision + Technology Inc. The latter is used with the OLED1 module that comes + with the Atmel SAM4l Xplained Pro board. + Examples: configs/ ================== diff --git a/nuttx/drivers/lcd/ug-2864hsweg01.c b/nuttx/drivers/lcd/ssd1306.c index 02a59b104..684193173 100644 --- a/nuttx/drivers/lcd/ug-2864hsweg01.c +++ b/nuttx/drivers/lcd/ssd1306.c @@ -1,15 +1,17 @@ /************************************************************************************** - * drivers/lcd/ug-2864hsweg01.c - * Driver for Univision UG-2864HSWEG01 OLED display (wih SSD1306 controller) in SPI - * mode + * drivers/lcd/ssd1306.c + * Driver for Univision UG-2864HSWEG01 OLED display or UG-2832HSWEG04 both with the + * Univision SSD1306 controller in SPI mode * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * References: * 1. Product Specification (Preliminary), Part Name: OEL Display Module, Part ID: * UG-2864HSWEG01, Doc No: SAS1-9046-B, Univision Technology Inc. - * 2. SSD1306, 128 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with + * 2. Product Specification, Part Name: OEL Display Module, Part ID: UG-2832HSWEG04, + * Doc No.: SAS1-B020-B, Univision Technology Inc. + * 3. SSD1306, 128 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with * Controller, Solomon Systech * * Redistribution and use in source and binary forms, with or without @@ -129,11 +131,11 @@ #include <nuttx/arch.h> #include <nuttx/spi.h> #include <nuttx/lcd/lcd.h> -#include <nuttx/lcd/ug-2864hsweg01.h> +#include <nuttx/lcd/ssd1306.h> #include <arch/irq.h> -#ifdef CONFIG_LCD_UG2864HSWEG01 +#ifdef CONFIG_LCD_SSD1306 /************************************************************************************** * Pre-processor Definitions @@ -141,10 +143,18 @@ /* Configuration **********************************************************************/ /* Limitations of the current configuration that I hope to fix someday */ -#if CONFIG_UG2864HSWEG01_NINTERFACES != 1 -# warning "This implementation supports only a single OLED device" -# undef CONFIG_UG2864HSWEG01_NINTERFACES -# define CONFIG_UG2864HSWEG01_NINTERFACES 1 +#ifndef CONFIG_SSD1306_NINTERFACES +# define CONFIG_SSD1306_NINTERFACES 1 +#endif + +#if CONFIG_SSD1306_NINTERFACES != 1 +# warning "This implementation supports only a single SSD1306 device" +# undef CONFIG_SSD1306_NINTERFACES +# define CONFIG_SSD1306_NINTERFACES 1 +#endif + +#if !defined(CONFIG_LCD_UG2864HSWEG01) && !defined(CONFIG_LCD_UG2832HSWEG04) +# error "Unknown and unsupported SSD1306 LCD" #endif #if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT) @@ -194,12 +204,12 @@ # define SSD1306_CHRGPER(d,p) ((((d) & 0x0f) << 4) | ((p) & 0x0f)) #define SSD1306_CMNPAD_CONFIG (0xda) /* Set Common pads hardware configuration: (Double Bytes Command) */ # define SSD1306_CMNPAD(c) ((0x02) | ((c) & 0x10)) -#define SSD1306_VCOM_SET (0xdb) /* Set VCOM Deselect Level: (Double Bytes Command) */ +#define SSD1306_VCOM_SET (0xdb) /* Set VCOM Deselect Level: (Double Byte Command) */ # define SSD1306_VCOM(v) (v) -#define SSD1306_CHRPUMP_SET (0x8d) /* Charge Pump Setting */ -# define SSD1306_CHRPUMP_ON (0x14) -# define SSD1306_CHRPUMP_OFF (0x10) +#define SSD1306_CHRPUMP_SET (0x8d) /* Charge Pump Setting */ +# define SSD1306_CHRPUMP_ON (0x14) +# define SSD1306_CHRPUMP_OFF (0x10) #define SSD1306_RMWSTART (0xe0) /* Read-Modify-Write: (e0h) */ #define SSD1306_NOP (0xe3) /* NOP: (e3h) */ @@ -214,35 +224,42 @@ /* Display Resolution * * The SSD1306 display controller can handle a resolution of 132x64. The UG-2864HSWEG01 - * on the base board is 128x64. + * on the base board is 128x64; the UG-2832HSWEG04 is 128x32. */ -#define UG2864HSWEG01_DEV_XRES 128 /* Only 128 of 131 columns used */ -#define UG2864HSWEG01_DEV_YRES 64 /* 8 pages each 8 rows */ -#define UG2864HSWEG01_DEV_XOFFSET 2 /* Offset to logical column 0 */ -#define UG2864HSWEG01_DEV_PAGES 8 /* 8 pages */ +#if defined(CONFIG_LCD_UG2864HSWEG01) +# define SSD1306_DEV_NATIVE_XRES 128 /* Only 128 of 131 columns used */ +# define SSD1306_DEV_NATIVE_YRES 64 /* 8 pages each 8 rows */ +# define SSD1306_DEV_XOFFSET 2 /* Offset to logical column 0 */ +# define SSD1306_DEV_PAGES 8 /* 8 pages */ +#elif defined(CONFIG_LCD_UG2832HSWEG04) +# define SSD1306_DEV_NATIVE_XRES 128 /* Only 128 of 131 columns used */ +# define SSD1306_DEV_NATIVE_YRES 32 /* 4 pages each 8 rows */ +# define SSD1306_DEV_XOFFSET 2 /* Offset to logical column 0 */ +# define SSD1306_DEV_PAGES 4 /* 4 pages */ +#endif #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) -# define UG2864HSWEG01_XRES UG2864HSWEG01_DEV_XRES -# define UG2864HSWEG01_YRES UG2864HSWEG01_DEV_YRES +# define SSD1306_DEV_XRES SSD1306_DEV_NATIVE_XRES +# define SSD1306_DEV_YRES SSD1306_DEV_NATIVE_YRES #else -# define UG2864HSWEG01_XRES UG2864HSWEG01_DEV_YRES -# define UG2864HSWEG01_YRES UG2864HSWEG01_DEV_XRES +# define SSD1306_DEV_XRES SSD1306_DEV_NATIVE_YRES +# define SSD1306_DEV_YRES SSD1306_DEV_NATIVE_XRES #endif -/* Color depth and format */ +/* Bytes per logical row and actual device row */ -#define UG2864HSWEG01_BPP 1 -#define UG2864HSWEG01_COLORFMT FB_FMT_Y1 +#define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) +#define SSD1306_DEV_YSTRIDE (SSD1306_DEV_YRES >> 3) -/* Bytes per logical row and actual device row */ +/* Color depth and format */ -#define UG2864HSWEG01_XSTRIDE (UG2864HSWEG01_XRES >> 3) -#define UG2864HSWEG01_YSTRIDE (UG2864HSWEG01_YRES >> 3) +#define SSD1306_DEV_BPP 1 +#define SSD1306_DEV_COLORFMT FB_FMT_Y1 /* Default contrast */ -#define UG2864HSWEG01_CONTRAST (128) +#define SSD1306_DEV_CONTRAST (128) /* The size of the shadow frame buffer or one row buffer. * @@ -250,19 +267,19 @@ * Row size: 128 columns x 8 rows-per-page / 8 bits-per-pixel */ -#define UG2864HSWEG01_FBSIZE (UG2864HSWEG01_XSTRIDE * UG2864HSWEG01_YRES) -#define UG2864HSWEG01_ROWSIZE (UG2864HSWEG01_XSTRIDE) +#define SSD1306_DEV_FBSIZE (SSD1306_DEV_XSTRIDE * SSD1306_DEV_YRES) +#define SSD1306_DEV_ROWSIZE (SSD1306_DEV_XSTRIDE) /* Bit helpers */ -#define LS_BIT (1 << 0) -#define MS_BIT (1 << 7) +#define LS_BIT (1 << 0) +#define MS_BIT (1 << 7) /* Debug ******************************************************************************/ #ifdef CONFIG_DEBUG_LCD -# define lcddbg(format, arg...) dbg(format, ##arg) -# define lcdvdbg(format, arg...) vdbg(format, ##arg) +# define lcddbg(format, arg...) dbg(format, ##arg) +# define lcdvdbg(format, arg...) vdbg(format, ##arg) #else # define lcddbg(x...) # define lcdvdbg(x...) @@ -274,7 +291,7 @@ /* This structure describes the state of this driver */ -struct ug2864hsweg01_dev_s +struct ssd1306_dev_s { struct lcd_dev_s dev; /* Publically visible device structure */ @@ -290,7 +307,7 @@ struct ug2864hsweg01_dev_s * a shadow copy of the framebuffer memory. At 128x64, this amounts to 1KB. */ - uint8_t fb[UG2864HSWEG01_FBSIZE]; + uint8_t fb[SSD1306_DEV_FBSIZE]; }; /************************************************************************************** @@ -300,28 +317,28 @@ struct ug2864hsweg01_dev_s /* Low-level SPI helpers */ #ifdef CONFIG_SPI_OWNBUS -static inline void ug2864hsweg01_configspi(FAR struct spi_dev_s *spi); -# define ug2864hsweg01_lock(spi) -# define ug2864hsweg01_unlock(spi) +static inline void ssd1306_configspi(FAR struct spi_dev_s *spi); +# define ssd1306_lock(spi) +# define ssd1306_unlock(spi) #else -# define ug2864hsweg01_configspi(spi) -static void ug2864hsweg01_lock(FAR struct spi_dev_s *spi); -static void ug2864hsweg01_unlock(FAR struct spi_dev_s *spi); +# define ssd1306_configspi(spi) +static void ssd1306_lock(FAR struct spi_dev_s *spi); +static void ssd1306_unlock(FAR struct spi_dev_s *spi); #endif /* LCD Data Transfer Methods */ -static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, - FAR const uint8_t *buffer, size_t npixels); -static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, - size_t npixels); +static int ssd1306_putrun(fb_coord_t row, fb_coord_t col, + FAR const uint8_t *buffer, size_t npixels); +static int ssd1306_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); /* LCD Configuration */ -static int ug2864hsweg01_getvideoinfo(FAR struct lcd_dev_s *dev, - FAR struct fb_videoinfo_s *vinfo); -static int ug2864hsweg01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, - FAR struct lcd_planeinfo_s *pinfo); +static int ssd1306_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int ssd1306_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); /* LCD RGB Mapping */ @@ -337,10 +354,10 @@ static int ug2864hsweg01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int pl /* LCD Specific Controls */ -static int ug2864hsweg01_getpower(struct lcd_dev_s *dev); -static int ug2864hsweg01_setpower(struct lcd_dev_s *dev, int power); -static int ug2864hsweg01_getcontrast(struct lcd_dev_s *dev); -static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); +static int ssd1306_getpower(struct lcd_dev_s *dev); +static int ssd1306_setpower(struct lcd_dev_s *dev, int power); +static int ssd1306_getcontrast(struct lcd_dev_s *dev); +static int ssd1306_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); /************************************************************************************** * Private Data @@ -357,48 +374,48 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras * if there are multiple LCD devices, they must each have unique run buffers. */ -static uint8_t g_runbuffer[UG2864HSWEG01_ROWSIZE]; +static uint8_t g_runbuffer[SSD1306_DEV_ROWSIZE]; /* This structure describes the overall LCD video controller */ static const struct fb_videoinfo_s g_videoinfo = { - .fmt = UG2864HSWEG01_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ - .xres = UG2864HSWEG01_XRES, /* Horizontal resolution in pixel columns */ - .yres = UG2864HSWEG01_YRES, /* Vertical resolution in pixel rows */ - .nplanes = 1, /* Number of color planes supported */ + .fmt = SSD1306_DEV_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = SSD1306_DEV_XRES, /* Horizontal resolution in pixel columns */ + .yres = SSD1306_DEV_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ }; /* This is the standard, NuttX Plane information object */ static const struct lcd_planeinfo_s g_planeinfo = { - .putrun = ug2864hsweg01_putrun, /* Put a run into LCD memory */ - .getrun = ug2864hsweg01_getrun, /* Get a run from LCD memory */ + .putrun = ssd1306_putrun, /* Put a run into LCD memory */ + .getrun = ssd1306_getrun, /* Get a run from LCD memory */ .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ - .bpp = UG2864HSWEG01_BPP, /* Bits-per-pixel */ + .bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */ }; /* This is the OLED driver instance (only a single device is supported for now) */ -static struct ug2864hsweg01_dev_s g_oleddev = +static struct ssd1306_dev_s g_oleddev = { .dev = { /* LCD Configuration */ - .getvideoinfo = ug2864hsweg01_getvideoinfo, - .getplaneinfo = ug2864hsweg01_getplaneinfo, + .getvideoinfo = ssd1306_getvideoinfo, + .getplaneinfo = ssd1306_getplaneinfo, /* LCD RGB Mapping -- Not supported */ /* Cursor Controls -- Not supported */ /* LCD Specific Controls */ - .getpower = ug2864hsweg01_getpower, - .setpower = ug2864hsweg01_setpower, - .getcontrast = ug2864hsweg01_getcontrast, - .setcontrast = ug2864hsweg01_setcontrast, + .getpower = ssd1306_getpower, + .setpower = ssd1306_setpower, + .getcontrast = ssd1306_getcontrast, + .setcontrast = ssd1306_setcontrast, }, }; @@ -407,7 +424,7 @@ static struct ug2864hsweg01_dev_s g_oleddev = **************************************************************************************/ /************************************************************************************** - * Name: ug2864hsweg01_configspi + * Name: ssd1306_configspi * * Description: * Configure the SPI for use with the UG-2864HSWEG01 @@ -423,23 +440,23 @@ static struct ug2864hsweg01_dev_s g_oleddev = **************************************************************************************/ #ifdef CONFIG_SPI_OWNBUS -static inline void ug2864hsweg01_configspi(FAR struct spi_dev_s *spi) +static inline void ssd1306_configspi(FAR struct spi_dev_s *spi) { lcdvdbg("Mode: %d Bits: 8 Frequency: %d\n", - CONFIG_UG2864HSWEG01_SPIMODE, CONFIG_UG2864HSWEG01_FREQUENCY); + CONFIG_SSD1306_SPIMODE, CONFIG_SSD1306_FREQUENCY); /* Configure SPI for the UG-2864HSWEG01. But only if we own the SPI bus. Otherwise, * don't bother because it might change. */ - SPI_SETMODE(spi, CONFIG_UG2864HSWEG01_SPIMODE); + SPI_SETMODE(spi, CONFIG_SSD1306_SPIMODE); SPI_SETBITS(spi, 8); - SPI_SETFREQUENCY(spi, CONFIG_UG2864HSWEG01_FREQUENCY); + SPI_SETFREQUENCY(spi, CONFIG_SSD1306_FREQUENCY); } #endif /************************************************************************************** - * Name: ug2864hsweg01_lock + * Name: ssd1306_lock * * Description: * Select the SPI, locking and re-configuring if necessary @@ -455,7 +472,7 @@ static inline void ug2864hsweg01_configspi(FAR struct spi_dev_s *spi) **************************************************************************************/ #ifndef CONFIG_SPI_OWNBUS -static inline void ug2864hsweg01_lock(FAR struct spi_dev_s *spi) +static inline void ssd1306_lock(FAR struct spi_dev_s *spi) { /* Lock the SPI bus if there are multiple devices competing for the SPI bus. */ @@ -465,14 +482,14 @@ static inline void ug2864hsweg01_lock(FAR struct spi_dev_s *spi) * might have gotten configured for a different device while unlocked) */ - SPI_SETMODE(spi, CONFIG_UG2864HSWEG01_SPIMODE); + SPI_SETMODE(spi, CONFIG_SSD1306_SPIMODE); SPI_SETBITS(spi, 8); - SPI_SETFREQUENCY(spi, CONFIG_UG2864HSWEG01_FREQUENCY); + SPI_SETFREQUENCY(spi, CONFIG_SSD1306_FREQUENCY); } #endif /************************************************************************************** - * Name: ug2864hsweg01_unlock + * Name: ssd1306_unlock * * Description: * De-select the SPI @@ -488,7 +505,7 @@ static inline void ug2864hsweg01_lock(FAR struct spi_dev_s *spi) **************************************************************************************/ #ifndef CONFIG_SPI_OWNBUS -static inline void ug2864hsweg01_unlock(FAR struct spi_dev_s *spi) +static inline void ssd1306_unlock(FAR struct spi_dev_s *spi) { /* De-select UG-2864HSWEG01 chip and relinquish the SPI bus. */ @@ -497,7 +514,7 @@ static inline void ug2864hsweg01_unlock(FAR struct spi_dev_s *spi) #endif /************************************************************************************** - * Name: ug2864hsweg01_putrun + * Name: ssd1306_putrun * * Description: * This method can be used to write a partial raster line to the LCD. @@ -512,12 +529,12 @@ static inline void ug2864hsweg01_unlock(FAR struct spi_dev_s *spi) **************************************************************************************/ #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) -static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, - size_t npixels) +static int ssd1306_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) { /* Because of this line of code, we will only be able to support a single UG device */ - FAR struct ug2864hsweg01_dev_s *priv = (FAR struct ug2864hsweg01_dev_s *)&g_oleddev; + FAR struct ssd1306_dev_s *priv = (FAR struct ssd1306_dev_s *)&g_oleddev; FAR uint8_t *fbptr; FAR uint8_t *ptr; uint8_t devcol; @@ -533,14 +550,14 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ /* Clip the run to the display */ pixlen = npixels; - if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG2864HSWEG01_XRES) + if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)SSD1306_DEV_XRES) { - pixlen = (int)UG2864HSWEG01_XRES - (int)col; + pixlen = (int)SSD1306_DEV_XRES - (int)col; } /* Verify that some portion of the run remains on the display */ - if (pixlen <= 0 || row > UG2864HSWEG01_YRES) + if (pixlen <= 0 || row > SSD1306_DEV_YRES) { return OK; } @@ -548,8 +565,8 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ /* Perform coordinate conversion for reverse landscape mode */ #ifdef CONFIG_LCD_RLANDSCAPE - row = (UG2864HSWEG01_YRES-1) - row; - col = (UG2864HSWEG01_XRES-1) - col; + row = (SSD1306_DEV_YRES-1) - row; + col = (SSD1306_DEV_XRES-1) - col; #endif /* Get the page number. The range of 64 lines is divided up into eight @@ -581,7 +598,7 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ */ fbmask = 1 << (row & 7); - fbptr = &priv->fb[page * UG2864HSWEG01_XRES + col]; + fbptr = &priv->fb[page * SSD1306_DEV_XRES + col]; #ifdef CONFIG_LCD_RLANDSCAPE ptr = fbptr + pixlen - 1; #else @@ -646,11 +663,11 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ * display range. */ - devcol = col + UG2864HSWEG01_DEV_XOFFSET; + devcol = col + SSD1306_DEV_XOFFSET; /* Lock and select device */ - ug2864hsweg01_lock(priv->spi); + ssd1306_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true); /* Select command transfer */ @@ -678,7 +695,7 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ /* De-select and unlock the device */ SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false); - ug2864hsweg01_unlock(priv->spi); + ssd1306_unlock(priv->spi); return OK; } #else @@ -686,7 +703,7 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ #endif /************************************************************************************** - * Name: ug2864hsweg01_getrun + * Name: ssd1306_getrun * * Description: * This method can be used to read a partial raster line from the LCD: @@ -703,12 +720,12 @@ static int ug2864hsweg01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_ **************************************************************************************/ #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) -static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, +static int ssd1306_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, size_t npixels) { /* Because of this line of code, we will only be able to support a single UG device */ - FAR struct ug2864hsweg01_dev_s *priv = &g_oleddev; + FAR struct ssd1306_dev_s *priv = &g_oleddev; FAR uint8_t *fbptr; uint8_t page; uint8_t fbmask; @@ -722,14 +739,14 @@ static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf /* Clip the run to the display */ pixlen = npixels; - if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG2864HSWEG01_XRES) + if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)SSD1306_DEV_XRES) { - pixlen = (int)UG2864HSWEG01_XRES - (int)col; + pixlen = (int)SSD1306_DEV_XRES - (int)col; } /* Verify that some portion of the run is actually the display */ - if (pixlen <= 0 || row > UG2864HSWEG01_YRES) + if (pixlen <= 0 || row > SSD1306_DEV_YRES) { return -EINVAL; } @@ -737,8 +754,8 @@ static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf /* Perform coordinate conversion for reverse landscape mode */ #ifdef CONFIG_LCD_RLANDSCAPE - row = (UG2864HSWEG01_YRES-1) - row; - col = (UG2864HSWEG01_XRES-1) - col; + row = (SSD1306_DEV_YRES-1) - row; + col = (SSD1306_DEV_XRES-1) - col; #endif /* Then transfer the display data from the shadow frame buffer memory */ @@ -772,9 +789,9 @@ static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf fbmask = 1 << (row & 7); #ifdef CONFIG_LCD_RLANDSCAPE - fbptr = &priv->fb[page * (UG2864HSWEG01_XRES-1) + col + pixlen]; + fbptr = &priv->fb[page * (SSD1306_DEV_XRES-1) + col + pixlen]; #else - fbptr = &priv->fb[page * UG2864HSWEG01_XRES + col]; + fbptr = &priv->fb[page * SSD1306_DEV_XRES + col]; #endif #ifdef CONFIG_NX_PACKEDMSFIRST usrmask = MS_BIT; @@ -834,15 +851,15 @@ static int ug2864hsweg01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf #endif /************************************************************************************** - * Name: ug2864hsweg01_getvideoinfo + * Name: ssd1306_getvideoinfo * * Description: * Get information about the LCD video controller configuration. * **************************************************************************************/ -static int ug2864hsweg01_getvideoinfo(FAR struct lcd_dev_s *dev, - FAR struct fb_videoinfo_s *vinfo) +static int ssd1306_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) { DEBUGASSERT(dev && vinfo); lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", @@ -852,15 +869,15 @@ static int ug2864hsweg01_getvideoinfo(FAR struct lcd_dev_s *dev, } /************************************************************************************** - * Name: ug2864hsweg01_getplaneinfo + * Name: ssd1306_getplaneinfo * * Description: * Get information about the configuration of each LCD color plane. * **************************************************************************************/ -static int ug2864hsweg01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, - FAR struct lcd_planeinfo_s *pinfo) +static int ssd1306_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) { DEBUGASSERT(pinfo && planeno == 0); lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); @@ -869,7 +886,7 @@ static int ug2864hsweg01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int pl } /************************************************************************************** - * Name: ug2864hsweg01_getpower + * Name: ssd1306_getpower * * Description: * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on. On @@ -877,9 +894,9 @@ static int ug2864hsweg01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int pl * **************************************************************************************/ -static int ug2864hsweg01_getpower(FAR struct lcd_dev_s *dev) +static int ssd1306_getpower(FAR struct lcd_dev_s *dev) { - FAR struct ug2864hsweg01_dev_s *priv = (FAR struct ug2864hsweg01_dev_s *)dev; + FAR struct ssd1306_dev_s *priv = (FAR struct ssd1306_dev_s *)dev; DEBUGASSERT(priv); lcdvdbg("power: %s\n", priv->on ? "ON" : "OFF"); @@ -887,7 +904,7 @@ static int ug2864hsweg01_getpower(FAR struct lcd_dev_s *dev) } /************************************************************************************** - * Name: ug2864hsweg01_setpower + * Name: ssd1306_setpower * * Description: * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On @@ -895,16 +912,16 @@ static int ug2864hsweg01_getpower(FAR struct lcd_dev_s *dev) * **************************************************************************************/ -static int ug2864hsweg01_setpower(struct lcd_dev_s *dev, int power) +static int ssd1306_setpower(struct lcd_dev_s *dev, int power) { - struct ug2864hsweg01_dev_s *priv = (struct ug2864hsweg01_dev_s *)dev; + struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev; DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER && priv->spi); lcdvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0); /* Lock and select device */ - ug2864hsweg01_lock(priv->spi); + ssd1306_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true); if (power <= 0) @@ -925,21 +942,21 @@ static int ug2864hsweg01_setpower(struct lcd_dev_s *dev, int power) /* De-select and unlock the device */ SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false); - ug2864hsweg01_unlock(priv->spi); + ssd1306_unlock(priv->spi); return OK; } /************************************************************************************** - * Name: ug2864hsweg01_getcontrast + * Name: ssd1306_getcontrast * * Description: * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). * **************************************************************************************/ -static int ug2864hsweg01_getcontrast(struct lcd_dev_s *dev) +static int ssd1306_getcontrast(struct lcd_dev_s *dev) { - struct ug2864hsweg01_dev_s *priv = (struct ug2864hsweg01_dev_s *)dev; + struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev; DEBUGASSERT(priv); lcdvdbg("contrast: %d\n", priv->contrast); @@ -947,16 +964,16 @@ static int ug2864hsweg01_getcontrast(struct lcd_dev_s *dev) } /************************************************************************************** - * Name: ug2864hsweg01_setcontrast + * Name: ssd1306_setcontrast * * Description: * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). * **************************************************************************************/ -static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +static int ssd1306_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) { - struct ug2864hsweg01_dev_s *priv = (struct ug2864hsweg01_dev_s *)dev; + struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev; unsigned int scaled; lcdvdbg("contrast: %d\n", contrast); @@ -983,7 +1000,7 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras /* Lock and select device */ - ug2864hsweg01_lock(priv->spi); + ssd1306_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true); /* Select command transfer */ @@ -999,7 +1016,7 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras /* De-select and unlock the device */ SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false); - ug2864hsweg01_unlock(priv->spi); + ssd1306_unlock(priv->spi); return OK; } @@ -1008,7 +1025,7 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras **************************************************************************************/ /************************************************************************************** - * Name: ug2864hsweg01_initialize + * Name: ssd1306_initialize * * Description: * Initialize the UG-2864HSWEG01 video hardware. The initial state of the @@ -1018,7 +1035,7 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras * Input Parameters: * * spi - A reference to the SPI driver instance. - * devno - A value in the range of 0 through CONFIG_UG2864HSWEG01_NINTERFACES-1. + * devno - A value in the range of 0 through CONFIG_SSD1306_NINTERFACES-1. * This allows support for multiple OLED devices. * * Returned Value: @@ -1028,9 +1045,9 @@ static int ug2864hsweg01_setcontrast(struct lcd_dev_s *dev, unsigned int contras * **************************************************************************************/ -FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsigned int devno) +FAR struct lcd_dev_s *ssd1306_initialize(FAR struct spi_dev_s *spi, unsigned int devno) { - FAR struct ug2864hsweg01_dev_s *priv = &g_oleddev; + FAR struct ssd1306_dev_s *priv = &g_oleddev; lcdvdbg("Initializing\n"); DEBUGASSERT(spi && devno == 0); @@ -1041,11 +1058,11 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign /* Configure the SPI */ - ug2864hsweg01_configspi(spi); + ssd1306_configspi(spi); /* Lock and select device */ - ug2864hsweg01_lock(priv->spi); + ssd1306_lock(priv->spi); SPI_SELECT(spi, SPIDEV_DISPLAY, true); /* Select command transfer */ @@ -1058,92 +1075,55 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign /* Configure the device */ -//#define OLED_WriteCmd(v) SPI_SEND(spi,v) -// -// /* Module manufacturers to provide initialization code 模块厂家提供初始化代码 */ -// -// OLED_WriteCmd(0xAE); /* 关闭OLED面板显示(休眠) */ -// OLED_WriteCmd(0x00); /* 设置列地址低4bit */ -// OLED_WriteCmd(0x10); /* 设置列地址高4bit */ -// OLED_WriteCmd(0x40); /* 设置起始行地址(低5bit 0-63), 硬件相关*/ -// -// OLED_WriteCmd(0x81); /* 设置对比度命令(双字节命令),第1个字节是命令,第2个字节是对比度参数0-255 */ -// OLED_WriteCmd(0xCF); /* 设置对比度参数 */ -// -// OLED_WriteCmd(0xA1); /* A0 :列地址0映射到SEG0; A1 :列地址127映射到SEG0 */ -// OLED_WriteCmd(0xA6); /* A6 : 设置正常显示模式; A7 : 设置为反显模式 */ -// -// OLED_WriteCmd(0xA8); /* 设置COM路数 */ -// OLED_WriteCmd(0x3F); /* 1 ->(63+1)路 */ -// -// OLED_WriteCmd(0xD3); /* 设置显示偏移(双字节命令)*/ -// OLED_WriteCmd(0x00); /* 无偏移 */ -// -// OLED_WriteCmd(0xD5); /* 设置显示时钟分频系数/振荡频率 */ -// OLED_WriteCmd(0x80); /* 设置分频系数,高4bit是分频系数,低4bit是振荡频率 */ -// -// OLED_WriteCmd(0xD9); /* 设置预充电周期 */ -// OLED_WriteCmd(0xF1); /* [3:0],PHASE 1; [7:4],PHASE 2; */ -// -// OLED_WriteCmd(0xDA); /* 设置COM脚硬件接线方式 */ -// OLED_WriteCmd(0x12); -// -// OLED_WriteCmd(0xDB); /* 设置 vcomh 电压倍率 */ -// OLED_WriteCmd(0x40); /* [6:4] 000 = 0.65 x VCC; 0.77 x VCC (RESET); 0.83 x VCC */ -// -// OLED_WriteCmd(0x8D); /* 设置充电泵(和下个命令结合使用) */ -// OLED_WriteCmd(0x14); /* 0x14 使能充电泵, 0x10 是关闭 */ -// OLED_WriteCmd(0xAF); /* 打开OLED面板 */ - - SPI_SEND(spi, SSD1306_DISPOFF); /* Display off 0xAE*/ + SPI_SEND(spi, SSD1306_DISPOFF); /* Display off 0xae */ SPI_SEND(spi, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */ SPI_SEND(spi, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */ - SPI_SEND(spi, SSD1306_STARTLINE(0)); /* Set display start line 0x40*/ + SPI_SEND(spi, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */ /* SPI_SEND(spi, SSD1306_PAGEADDR(0));*//* Set page address (Can ignore)*/ SPI_SEND(spi, SSD1306_CONTRAST_MODE); /* Contrast control 0x81*/ - SPI_SEND(spi ,SSD1306_CONTRAST(UG2864HSWEG01_CONTRAST)); /* Default contrast 0xCF */ - SPI_SEND(spi, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xA1*/ - /* SPI_SEND(spi, SSD1306_EDISPOFF); */ /* Normal display :off 0xA4 (Can ignore)*/ - SPI_SEND(spi, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xA6 */ - SPI_SEND(spi, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xA8*/ + SPI_SEND(spi ,SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */ + SPI_SEND(spi, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1*/ + /* SPI_SEND(spi, SSD1306_EDISPOFF); */ /* Normal display :off 0xa4 (Can ignore)*/ + SPI_SEND(spi, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */ + SPI_SEND(spi, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8*/ SPI_SEND(spi, SSD1306_MRATIO(0x3f)); /* Duty = 1/64 */ /* SPI_SEND(spi, SSD1306_SCANTOCOM0);*/ /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore)*/ - SPI_SEND(spi, SSD1306_DISPOFFS_MODE); /* Set display offset 0xD3 */ + SPI_SEND(spi, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */ SPI_SEND(spi, SSD1306_DISPOFFS(0)); - SPI_SEND(spi, SSD1306_CLKDIV_SET); /* Set clock divider 0xD5*/ + SPI_SEND(spi, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5*/ SPI_SEND(spi, SSD1306_CLKDIV(8,0)); /* 0x80*/ - SPI_SEND(spi, SSD1306_CHRGPER_SET); /* ++Set pre-charge period 0xD9*/ - SPI_SEND(spi, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22(Enhanced mode?) */ + SPI_SEND(spi, SSD1306_CHRGPER_SET); /* ++Set pre-charge period 0xd9*/ + SPI_SEND(spi, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22 Enhanced mode */ - SPI_SEND(spi, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xDA*/ + SPI_SEND(spi, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xda */ SPI_SEND(spi, SSD1306_CMNPAD(0x12)); /* 0x12 */ SPI_SEND(spi, SSD1306_VCOM_SET); /* set vcomh 0xDB*/ SPI_SEND(spi, SSD1306_VCOM(0x40)); - SPI_SEND(spi, SSD1306_CHRPUMP_SET); /* ++Set Charge Pump enable/disable 0x8D ssd1306*/ + SPI_SEND(spi, SSD1306_CHRPUMP_SET); /* ++Set Charge Pump enable/disable 0x8d ssd1306*/ SPI_SEND(spi, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */ /*SPI_SEND(spi, SSD1306_DCDC_MODE); */ /* DC/DC control mode: on (SSD1306 Not supported) */ /*SPI_SEND(spi, SSD1306_DCDC_ON); */ - SPI_SEND(spi, SSD1306_DISPON); /* display ON 0xAF */ + SPI_SEND(spi, SSD1306_DISPON); /* display ON 0xaf */ /* De-select and unlock the device */ SPI_SELECT(spi, SPIDEV_DISPLAY, false); - ug2864hsweg01_unlock(priv->spi); + ssd1306_unlock(priv->spi); /* Clear the display */ up_mdelay(100); - ug2864hsweg01_fill(&priv->dev, UG_Y1_BLACK); + ssd1306_fill(&priv->dev, UG_Y1_BLACK); return &priv->dev; } /************************************************************************************** - * Name: ug2864hsweg01_fill + * Name: ssd1306_fill * * Description: * This non-standard method can be used to clear the entire display by writing one @@ -1157,9 +1137,9 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign * **************************************************************************************/ -void ug2864hsweg01_fill(FAR struct lcd_dev_s *dev, uint8_t color) +void ssd1306_fill(FAR struct lcd_dev_s *dev, uint8_t color) { - FAR struct ug2864hsweg01_dev_s *priv = &g_oleddev; + FAR struct ssd1306_dev_s *priv = &g_oleddev; unsigned int page; /* Make an 8-bit version of the selected color */ @@ -1175,16 +1155,16 @@ void ug2864hsweg01_fill(FAR struct lcd_dev_s *dev, uint8_t color) /* Initialize the framebuffer */ - memset(priv->fb, color, UG2864HSWEG01_FBSIZE); + memset(priv->fb, color, SSD1306_DEV_FBSIZE); /* Lock and select device */ - ug2864hsweg01_lock(priv->spi); + ssd1306_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true); /* Visit each page */ - for (page = 0; page < UG2864HSWEG01_DEV_PAGES; page++) + for (page = 0; page < SSD1306_DEV_PAGES; page++) { /* Select command transfer */ @@ -1192,7 +1172,7 @@ void ug2864hsweg01_fill(FAR struct lcd_dev_s *dev, uint8_t color) /* Set the column address to the XOFFSET value */ - SPI_SEND(priv->spi, SSD1306_SETCOLL(UG2864HSWEG01_DEV_XOFFSET)); + SPI_SEND(priv->spi, SSD1306_SETCOLL(SSD1306_DEV_XOFFSET)); SPI_SEND(priv->spi, SSD1306_SETCOLH(0)); /* Set the page address */ @@ -1205,14 +1185,14 @@ void ug2864hsweg01_fill(FAR struct lcd_dev_s *dev, uint8_t color) /* Transfer one page of the selected color */ - (void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG2864HSWEG01_XRES], - UG2864HSWEG01_XRES); + (void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * SSD1306_DEV_XRES], + SSD1306_DEV_XRES); } /* De-select and unlock the device */ SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false); - ug2864hsweg01_unlock(priv->spi); + ssd1306_unlock(priv->spi); } -#endif /* CONFIG_LCD_UG2864HSWEG01 */ +#endif /* CONFIG_LCD_SSD1306 */ diff --git a/nuttx/include/assert.h b/nuttx/include/assert.h index 2159ea868..8934d4d55 100644 --- a/nuttx/include/assert.h +++ b/nuttx/include/assert.h @@ -63,43 +63,51 @@ # define VERIFY(f) \ { if ((f) < 0) up_assert((const uint8_t *)__FILE__, (int)__LINE__); } +# define PANIC() \ + up_assert((const uint8_t *)__FILE__, (int)__LINE__) + # ifdef CONFIG_DEBUG + # define DEBUGASSERT(f) \ { if (!(f)) up_assert((const uint8_t *)__FILE__, (int)__LINE__); } + # define DEBUGVERIFY(f) \ { if ((f) < 0) up_assert((const uint8_t *)__FILE__, (int)__LINE__); } + +# define DEBUGPANIC() \ + up_assert((const uint8_t *)__FILE__, (int)__LINE__) + # else + # define DEBUGASSERT(f) # define DEBUGVERIFY(f) ((void)(f)) -# endif /* CONFIG_DEBUG */ +# define DEBUGPANIC() -# define PANIC() \ - up_assert((const uint8_t *)__FILE__, (int)__LINE__) +# endif /* CONFIG_DEBUG */ #else -# define ASSERT(f) \ - { if (!(f)) up_assert(); } -# define VERIFY(f) \ - { if ((f) < 0) up_assert(); } +# define ASSERT(f) { if (!(f)) up_assert(); } +# define VERIFY(f) { if ((f) < 0) up_assert(); } +# define PANIC() up_assert() # ifdef CONFIG_DEBUG -# define DEBUGASSERT(f) \ - { if (!(f)) up_assert(); } -# define DEBUGVERIFY(f) \ - { if ((f) < 0) up_assert(); } + +# define DEBUGASSERT(f) { if (!(f)) up_assert(); } +# define DEBUGVERIFY(f) { if ((f) < 0) up_assert(); } +# define DEBUGPANIC() up_assert() + # else + # define DEBUGASSERT(f) # define DEBUGVERIFY(f) ((void)(f)) -# endif /* CONFIG_DEBUG */ - -# define PANIC(code) \ - up_assert() +# define DEBUGPANIC() +# endif /* CONFIG_DEBUG */ #endif #ifndef assert -#define assert ASSERT +# define assert ASSERT #endif /**************************************************************************** diff --git a/nuttx/include/nuttx/lcd/ug-2864hsweg01.h b/nuttx/include/nuttx/lcd/ssd1306.h index e38741967..fee758b9d 100644 --- a/nuttx/include/nuttx/lcd/ug-2864hsweg01.h +++ b/nuttx/include/nuttx/lcd/ssd1306.h @@ -1,16 +1,18 @@ /************************************************************************************** * include/nuttx/lcd/ug-2864hsweg01.h * - * Driver for Univision UG-2864HSWEG01 OLED display (wih SSD1306 controller) in SPI - * mode + * Driver for Univision UG-2864HSWEG01 OLED display or UG-2832HSWEG04 both with the + * Univision SSD1306 controller in SPI mode * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * References: * 1. Product Specification (Preliminary), Part Name: OEL Display Module, Part ID: * UG-2864HSWEG01, Doc No: SAS1-9046-B, Univision Technology Inc. - * 2. SSD1306, 128 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with + * 2. Product Specification, Part Name: OEL Display Module, Part ID: UG-2832HSWEG04, + * Doc No.: SAS1-B020-B, Univision Technology Inc. + * 3. SSD1306, 128 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with * Controller, Solomon Systech * * Redistribution and use in source and binary forms, with or without @@ -42,8 +44,8 @@ * **************************************************************************************/ -#ifndef __INCLUDE_NUTTX_UG_8264HSWEG01_H -#define __INCLUDE_NUTTX_UG_8264HSWEG01_H +#ifndef __INCLUDE_NUTTX_SSD1306_H +#define __INCLUDE_NUTTX_SSD1306_H /************************************************************************************** * Included Files @@ -55,7 +57,7 @@ #include <nuttx/arch.h> -#ifdef CONFIG_LCD_UG2864HSWEG01 +#ifdef CONFIG_LCD_SSD1306 /************************************************************************************** * Pre-processor Definitions @@ -196,7 +198,7 @@ extern "C" **************************************************************************************/ /************************************************************************************** - * Name: ug2864hsweg01_initialize + * Name: ssd1306initialize * * Description: * Initialize the UG-2864HSWEG01 video hardware. The initial state of the @@ -218,11 +220,10 @@ extern "C" struct lcd_dev_s; /* See include/nuttx/lcd/lcd.h */ struct spi_dev_s; /* See include/nuttx/spi.h */ -FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, - unsigned int devno); +FAR struct lcd_dev_s *ssd1306_initialize(FAR struct spi_dev_s *spi, unsigned int devno); /************************************************************************************************ - * Name: ug2864hsweg01_fill + * Name: ssd1306_fill * * Description: * This non-standard method can be used to clear the entire display by writing one @@ -236,11 +237,11 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, * **************************************************************************************/ -void ug2864hsweg01_fill(FAR struct lcd_dev_s *dev, uint8_t color); +void ssd1306_fill(FAR struct lcd_dev_s *dev, uint8_t color); #ifdef __cplusplus } #endif -#endif /* CONFIG_LCD_UG2864HSWEG01 */ -#endif /* __INCLUDE_NUTTX_UG_8264HSWEG01_H */ +#endif /* CONFIG_LCD_SSD1306 */ +#endif /* __INCLUDE_NUTTX_SSD1306_H */ |