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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-12 21:27:51 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-12 21:27:51 +0000
commitef68b800bb88f5226ab778d5f434c9b746a2e930 (patch)
treeb5d90776974c595a3bd29fef9c694a24b033158c
parentc278caf8a84f8a5b2861a2240be7eccd10e6160b (diff)
downloadpx4-nuttx-ef68b800bb88f5226ab778d5f434c9b746a2e930.tar.gz
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Add LED, button definition, and more EMC logic for the LPC1788
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5646 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r--nuttx/arch/Kconfig16
-rw-r--r--nuttx/arch/arm/src/lpc17xx/chip/lpc17_emc.h37
-rw-r--r--nuttx/configs/open1788/README.txt49
-rw-r--r--nuttx/configs/open1788/include/board.h270
-rw-r--r--nuttx/configs/open1788/src/Makefile87
-rw-r--r--nuttx/configs/open1788/src/lpc17_boardinitialize.c109
-rw-r--r--nuttx/configs/open1788/src/lpc17_nandinitialize.c101
-rw-r--r--nuttx/configs/open1788/src/lpc17_norinitialize.c97
-rw-r--r--nuttx/configs/open1788/src/lpc17_sdraminitialize.c229
-rw-r--r--nuttx/configs/open1788/src/open1788.h122
10 files changed, 899 insertions, 218 deletions
diff --git a/nuttx/arch/Kconfig b/nuttx/arch/Kconfig
index c0f235c5d..c7771e9c8 100644
--- a/nuttx/arch/Kconfig
+++ b/nuttx/arch/Kconfig
@@ -172,6 +172,22 @@ config ARCH_EXTDRAMSIZE
---help---
Size of the external SDRAM in bytes.
+choice
+ prompt "SDRAM Width Selection"
+ default ARCH_CHIP_STM32F103ZET6
+ depends on ARCH_CHIP_STM32
+
+config ARCH_SDRAM_8BIT
+ bool "8-bit"
+
+config ARCH_SDRAM_16BIT
+ bool "16-bit"
+
+config ARCH_SDRAM_32BIT
+ bool "32-bit"
+
+endchoice
+
config ARCH_EXTDRAMHEAP
bool "Add external SDRAM to the heap"
default y
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_emc.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_emc.h
index a1587b4b2..2454003a4 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_emc.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_emc.h
@@ -277,8 +277,9 @@
#define EMC_DYNAMICCONFIG_MD_MASK (3 << EMC_DYNAMICCONFIG_MD_SHIFT)
# define EMC_DYNAMICCONFIG_MD_SDRAM (0 << EMC_DYNAMICCONFIG_MD_SHIFT) /* SDRAM */
# define EMC_DYNAMICCONFIG_MD_LOWPOWER (1 << EMC_DYNAMICCONFIG_MD_SHIFT) /* Low-power SDRAM */
-#define EMC_DYNAMICCONFIG_AM0_SHIFT (nn) /* Bits 7-12: */
+#define EMC_DYNAMICCONFIG_AM0_SHIFT (7) /* Bits 7-12: */
#define EMC_DYNAMICCONFIG_AM0_MASK (63 << EMC_DYNAMICCONFIG_AM0_SHIFT)
+# define EMC_DYNAMICCONFIG_AM0(n) ((n) << EMC_DYNAMICCONFIG_AM0_SHIFT)
#define EMC_DYNAMICCONFIG_AM1 (1 << 14) /* Bit 14: */
#define EMC_DYNAMICCONFIG_B (1 << 19) /* Bit 19: Buffer enable */
#define EMC_DYNAMICCONFIG_P (1 << 20) /* Bit 20: Write protect */
@@ -298,41 +299,41 @@
/* Static Memory Configuration registers (0-3) */
-#define EMC_STATICCONFIG_MW_SHIFT (0) /* Bits 0-1: Memory width */
-#define EMC_STATICCONFIG_MW_MASK (3 << EMC_STATICCONFIG_MW_SHIFT)
-# define EMC_STATICCONFIG_MW_8BIT (0 << EMC_STATICCONFIG_MW_SHIFT)
-# define EMC_STATICCONFIG_MW_16BIT (1 << EMC_STATICCONFIG_MW_SHIFT)
-# define EMC_STATICCONFIG_MW_32BIT (2 << EMC_STATICCONFIG_MW_SHIFT)
-#define EMC_STATICCONFIG_PM (1 << 3) /* Bit 3: Page mode */
-#define EMC_STATICCONFIG_PC (1 << 6) /* Bit 6: Chip select polarity */
-#define EMC_STATICCONFIG_PB (1 << 7) /* Bit 7: Byte lane state */
-#define EMC_STATICCONFIG_EW (1 << 8) /* Bit 8: Extended wait */
-#define EMC_STATICCONFIG_B (1 << 19) /* Bit 19: Buffer enable */
-#define EMC_STATICCONFIG_P (1 << 20) /* Bit 20: Write protect */
+#define EMC_STATICCONFIG_MW_SHIFT (0) /* Bits 0-1: Memory width */
+#define EMC_STATICCONFIG_MW_MASK (3 << EMC_STATICCONFIG_MW_SHIFT)
+# define EMC_STATICCONFIG_MW_8BIT (0 << EMC_STATICCONFIG_MW_SHIFT)
+# define EMC_STATICCONFIG_MW_16BIT (1 << EMC_STATICCONFIG_MW_SHIFT)
+# define EMC_STATICCONFIG_MW_32BIT (2 << EMC_STATICCONFIG_MW_SHIFT)
+#define EMC_STATICCONFIG_PM (1 << 3) /* Bit 3: Page mode */
+#define EMC_STATICCONFIG_PC (1 << 6) /* Bit 6: Chip select polarity */
+#define EMC_STATICCONFIG_PB (1 << 7) /* Bit 7: Byte lane state */
+#define EMC_STATICCONFIG_EW (1 << 8) /* Bit 8: Extended wait */
+#define EMC_STATICCONFIG_B (1 << 19) /* Bit 19: Buffer enable */
+#define EMC_STATICCONFIG_P (1 << 20) /* Bit 20: Write protect */
/* Static Memory Write Enable Delay registers (0-3) */
-#define EMC_STATICWAITWEN_MASK (0x0000000f) /* Bits 0-3: Wait write enable */
+#define EMC_STATICWAITWEN_MASK (0x0000000f) /* Bits 0-3: Wait write enable */
/* Static Memory Output Enable Delay registers (0-3) */
-#define EMC_STATICWAITOEN_MASK (0x0000000f) /* Bits 0-3: Wait output enable */
+#define EMC_STATICWAITOEN_MASK (0x0000000f) /* Bits 0-3: Wait output enable */
/* Static Memory Read Delay registers (0-3) */
-#define EMC_STATICWAITRD_MASK (0x0000001f) /* Bits 0-4: Exit self-refresh to active command time */
+#define EMC_STATICWAITRD_MASK (0x0000001f) /* Bits 0-4: Exit self-refresh to active command time */
/* Static Memory Page Mode Read Delay registers (0-3) */
-#define EMC_STATICWAITPAGE_MASK (0x0000001f) /* Bits 0-4: Asynchronous page mode read after the first read wait states */
+#define EMC_STATICWAITPAGE_MASK (0x0000001f) /* Bits 0-4: Asynchronous page mode read after the first read wait states */
/* Static Memory Write Delay registers (0-3) */
-#define EMC_STATICWAITWR_MASK (0x0000001f) /* Bits 0-4: Write wait states */
+#define EMC_STATICWAITWR_MASK (0x0000001f) /* Bits 0-4: Write wait states */
/* Static Memory Turn Round Delay registers (0-3) */
-#define EMC_STATICWAITTURN_MASK (0x0000000f) /* Bits 0-3: Bus turn-around cycles */
+#define EMC_STATICWAITTURN_MASK (0x0000000f) /* Bits 0-3: Bus turn-around cycles */
/****************************************************************************************************
* Public Types
diff --git a/nuttx/configs/open1788/README.txt b/nuttx/configs/open1788/README.txt
index 154d4b2f7..c207254ca 100644
--- a/nuttx/configs/open1788/README.txt
+++ b/nuttx/configs/open1788/README.txt
@@ -8,9 +8,58 @@ NXP LPC1788 MCU
CONTENTS
========
+ o LEDs
+ o Buttons
o FPU
o Configuration
+LEDs
+====
+
+The Open1788 base board has four user LEDs
+
+ LED1 : Connected to P1[14]
+ LED2 : Connected to P0[16]
+ LED3 : Connected to P1[13]
+ LED4 : Connected to P4[27]
+
+If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
+any way using the defitions provided in the board.h header file.
+
+If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs on the
+WaveShare Open1788K. The following definitions describe how NuttX controls
+the LEDs:
+ LED1 LED2 LED3 LED4
+ LED_STARTED OFF OFF OFF OFF
+ LED_HEAPALLOCATE ON OFF OFF OFF
+ LED_IRQSENABLED OFF ON OFF OFF
+ LED_STACKCREATED ON ON OFF OFF
+ LED_INIRQ LED3 glows, on while in interupt
+ LED_SIGNAL LED3 glows, on while in signal handler
+ LED_ASSERTION LED3 glows, on while in assertion
+ LED_PANIC LED3 Flashes at 2Hz
+ LED_IDLE LED glows, ON while sleeping
+
+Buttons
+=======
+
+The Open1788K supports several buttons:
+
+ USER1 : Connected to P4[26]
+ USER2 : Connected to P2[22]
+ USER3 : Connected to P0[10]
+
+And a Joystick
+
+ JOY_A : Connected to P2[25]
+ JOY_B : Connected to P2[26]
+ JOY_C : Connected to P2[23]
+ JOY_D : Connected to P2[19]
+ JOY_CTR : Connected to P0[14]
+
+These can be accessed using the definitions and interfaces defined in the
+board.h header file.
+
FPU
===
diff --git a/nuttx/configs/open1788/include/board.h b/nuttx/configs/open1788/include/board.h
index abe544a4a..1be5ac5fb 100644
--- a/nuttx/configs/open1788/include/board.h
+++ b/nuttx/configs/open1788/include/board.h
@@ -133,40 +133,6 @@
//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44
#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20
-/* LED definitions ******************************************************************/
-/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
- * any way. The following definitions are used to access individual LEDs.
- *
- * LED1 -- Connected to P1[25]
- * LED2 -- Connected to P0[4]
- */
-
-/* LED index values for use with lpc17_setled() */
-
-#define BOARD_LED1 0
-#define BOARD_LED2 1
-#define BOARD_NLEDS 2
-
-/* LED bits for use with lpc17_setleds() */
-
-#define BOARD_LED1_BIT (1 << BOARD_LED1)
-#define BOARD_LED2_BIT (1 << BOARD_LED2)
-
-/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs
- * on board the Olimex LPC1766-STK. The following definitions
- * describe how NuttX controls the LEDs:
- */
- /* LED1 LED2 */
-#define LED_STARTED 0 /* OFF OFF = Still initializing */
-#define LED_HEAPALLOCATE 0 /* OFF OFF = Still initializing */
-#define LED_IRQSENABLED 0 /* OFF OFF = Still initializing */
-#define LED_STACKCREATED 1 /* ON OFF = Initialization complete */
-#define LED_INIRQ 2 /* N/C ON = In an interrupt handler */
-#define LED_SIGNAL 2 /* N/C ON = In a signal handler (glowing) */
-#define LED_ASSERTION 2 /* N/C ON = In an assertion */
-#define LED_PANIC 2 /* N/C ON = Oops! We crashed. (flashing) */
-#define LED_IDLE 3 /* OFF N/C = LPC17 in sleep mode (LED1 glowing) */
-
/* Set EMC delay values:
*
* CMDDLY: Programmable delay value for EMC outputs in command delayed
@@ -187,8 +153,8 @@
#if defined(CONFIG_LPC17_EMC_NAND) || defined(CONFIG_LPC17_EMC_SDRAM)
# define BOARD_CMDDLY 17
-# define BOARD_FBCLKDLY 1
-# define BOARD_CLKOUT0DLY 2
+# define BOARD_FBCLKDLY 17
+# define BOARD_CLKOUT0DLY 1
# define BOARD_CLKOUT1DLY 1
#else
# define BOARD_CMDDLY 1
@@ -197,187 +163,91 @@
# define BOARD_CLKOUT1DLY 1
#endif
-/* Button definitions ***************************************************************/
-/* The LPC1766-STK supports several buttons. All will read "1" when open and "0"
- * when closed
- *
- * BUT1 -- Connected to P0[23]
- * BUT2 -- Connected to P2[13]
- * WAKE-UP -- Connected to P2[12]
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
+ * any way. The following definitions are used to access individual LEDs.
*
- * And a Joystick
+ * LED1 -- Connected to P1[14]
+ * LED2 -- Connected to P0[16]
+ * LED3 -- Connected to P1[13]
+ * LED4 -- Connected to P4[27]
*
- * CENTER -- Connected to P0[4]
- * DOWN -- Connected to P2[1]
- * LEFT -- Connected to P2[7]
- * RIGHT -- Connected to P2[8]
- * UP -- Connected to P2[0]
- */
-
-#define BOARD_BUTTON_1 0
-#define BOARD_BUTTON_2 1
-#define BOARD_BUTTON_WAKEUP 2
-
-#define BOARD_JOYSTICK_CENTER 3
-#define BOARD_JOYSTICK_UP 4
-#define BOARD_JOYSTICK_DOWN 5
-#define BOARD_JOYSTICK_LEFT 6
-#define BOARD_JOYSTICK_RIGHT 7
-
-#define BOARD_NUM_BUTTONS 8
-
-#define BOARD_BUTTON_BUTTON1_BIT (1 << BOARD_BUTTON_1)
-#define BOARD_BUTTON_BUTTON2_BIT (1 << BOARD_BUTTON_2)
-#define BOARD_BUTTON_WAKEUP_BIT (1 << BOARD_BUTTON_WAKEUP)
-
-#define BOARD_JOYSTICK_CENTER_BIT (1 << BOARD_JOYSTICK_CENTER)
-#define BOARD_JOYSTICK_UP_BIT (1 << BOARD_JOYSTICK_UP)
-#define BOARD_JOYSTICK_DOWN_BIT (1 << BOARD_JOYSTICK_DOWN)
-#define BOARD_JOYSTICK_LEFT_BIT (1 << BOARD_JOYSTICK_LEFT)
-#define BOARD_JOYSTICK_RIGHT_BIT (1 << BOARD_JOYSTICK_RIGHT)
-
-/* Alternate pin selections *********************************************************/
-
-/* CAN1 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[0]/RD1/TXD3/SDA1 46 RD1
- * P0[1]/TD1/RXD3/SCL1 47 TD1
- */
-
-#define GPIO_CAN1_RD GPIO_CAN1_RD_1
-#define GPIO_CAN1_TD GPIO_CAN1_TD_1
-
-/* UART0 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[2]/TXD0/AD0[7] 98 TXD0
- * P0[3]/RXD0/AD0[6] 99 RXD0
- */
-
-/* UART1 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[15]/TXD1/SCK0/SCK 62 TXD1
- * P0[16]/RXD1/SSEL0/SSEL 63 RXD1
- * P0[17]/CTS1/MISO0/MISO 61 CTS1
- * P0[18]/DCD1/MOSI0/MOSI 60 DCD1
- * P0[19]/DSR1/SDA1 59 DSR1
- * P0[20]/DTR1/SCL1 58 DTR1
- * P0[22]/RTS1/TD1 56 RTS1
+ * These LEDs are connecte to ground so a high output value will illuminate them.
*/
-#define GPIO_UART1_TXD GPIO_UART1_TXD_1
-#define GPIO_UART1_RXD GPIO_UART1_RXD_1
-#define GPIO_UART1_CTS GPIO_UART1_CTS_1
-#define GPIO_UART1_DCD GPIO_UART1_DCD_1
-#define GPIO_UART1_DSR GPIO_UART1_DSR_1
-#define GPIO_UART1_DTR GPIO_UART1_DTR_1
-#define GPIO_UART1_RTS GPIO_UART1_RTS_1
-
-/* SSP0 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0
- * P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0
- * P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0
- * P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0
- */
+/* LED index values for use with lpc17_setled() */
-#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_2
-#define GPIO_SSP0_SCK GPIO_SSP0_SCK_2
-#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2
-#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_2
-
-/* SSP1 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1
- * P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1
- * P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1
- * P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1
- */
+#define BOARD_LED1 0
+#define BOARD_LED2 1
+#define BOARD_LED3 2
+#define BOARD_LED4 3
+#define BOARD_NLEDS 4
-#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1
+/* LED bits for use with lpc17_setleds() */
-/* I2C2 GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[10]/TXD2/SDA2/MAT3[0] 48 SDA2
- * P0[11]/RXD2/SCL2/MAT3[1] 49 SCL2
- */
+#define BOARD_LED1_BIT (1 << BOARD_LED1)
+#define BOARD_LED2_BIT (1 << BOARD_LED2)
+#define BOARD_LED3_BIT (1 << BOARD_LED3)
+#define BOARD_LED4_BIT (1 << BOARD_LED4)
-/* AD GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP
- * P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN
-
-/* USB GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P0[27]/SDA0/USB_SDA 25 USB_SDA
- * P0[28]/SCL0/USB_SCL 24 USB_SCL
- * P0[29]/USB_D+ 29 USB_D+
- * P0[30]/USB_D- 30 USB_D-
- * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 USB_UP_LED
- * P1[19]/MC0A/#USB_PPWR/CAP1[1] 33 #USB_PPWR
- * P1[22]/MC0B/USB_PWRD/MAT1[0] 36 USBH_PWRD
- * P1[27]/CLKOUT/#USB_OVRCR/CAP0[1] 43 #USB_OVRCR
- * P1[30]/VBUS/AD0[4] 21 VBUS
- * P2[9]/USB_CONNECT/RXD2 64 USBD_CONNECT
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs
+ * on the WaveShare Open1788K. The following definitions describe how NuttX
+ * controls the LEDs:
*/
+ /* LED1 LED2 LED3 LED4 */
+#define LED_STARTED 0 /* OFF OFF OFF OFF */
+#define LED_HEAPALLOCATE 1 /* ON OFF OFF OFF */
+#define LED_IRQSENABLED 2 /* OFF ON OFF OFF */
+#define LED_STACKCREATED 1 /* ON ON OFF OFF */
+#define LED_INIRQ 2 /* LED3 glows, on while in interupt */
+#define LED_SIGNAL 2 /* LED3 glows, on while in signal handler */
+#define LED_ASSERTION 2 /* LED3 glows, on while in assertion */
+#define LED_PANIC 2 /* LED3 Flashes at 2Hz */
+#define LED_IDLE 3 /* LED glows, ON while sleeping */
-#ifdef GPIO_USB_PPWR /* We can only redefine this if they have been defined */
-
-/* The Olimex LPC1766-STK has 10K pull-ups on PPWR and OVRCR and a 100k
- * pull-down on PWRD so we should make sure that the outputs float.
+/* Button definitions ***************************************************************/
+/* The Open1788K supports several buttons. All will read "1" when open and "0"
+ * when closed
+ *
+ * USER1 -- Connected to P4[26]
+ * USER2 -- Connected to P2[22]
+ * USER3 -- Connected to P0[10]
+ *
+ * And a Joystick
+ *
+ * JOY_A -- Connected to P2[25]
+ * JOY_B -- Connected to P2[26]
+ * JOY_C -- Connected to P2[23]
+ * JOY_D -- Connected to P2[19]
+ * JOY_CTR -- Connected to P0[14]
+ *
+ * The switches are all connected to ground and should be pulled up and sensed
+ * with a value of '0' when closed.
*/
-# undef GPIO_USB_PPWR
-# define GPIO_USB_PPWR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN19)
-# undef GPIO_USB_OVRCR
-# define GPIO_USB_OVRCR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN27)
-# undef GPIO_USB_PWRD
-# define GPIO_USB_PWRD (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN22)
-
-/* In host mode (only) there are also 15K pull-downs on D+ and D- */
-
-# ifdef CONFIG_USBHOST
-# undef GPIO_USB_DP
-# define GPIO_USB_DP (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN29)
-# undef GPIO_USB_DM
-# define GPIO_USB_DM (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN30)
-# endif
-#endif
+#define BOARD_BUTTON_USER1 0
+#define BOARD_BUTTON_USER2 1
+#define BOARD_BUTTON_USER3 2
-/* Ethernet GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P1[0]/ENET_TXD0 95 E_TXD0
- * P1[1]/ENET_TXD1 94 E_TXD1
- * P1[4]/ENET_TX_EN 93 E_TX_EN
- * P1[8]/ENET_CRS 92 E_CRS
- * P1[9]/ENET_RXD0 91 E_RXD0
- * P1[10]/ENET_RXD1 90 E_RXD1
- * P1[14]/ENET_RX_ER 89 E_RX_ER
- * P1[15]/ENET_REF_CLK 88 E_REF_CLK
- * P1[16]/ENET_MDC 87 E_MDC
- * P1[17]/ENET_MDIO 86 E_MDIO
- */
+#define BOARD_JOYSTICK_A 3
+#define BOARD_JOYSTICK_B 4
+#define BOARD_JOYSTICK_C 5
+#define BOARD_JOYSTICK_D 6
+#define BOARD_JOYSTICK_CTR 7
-#define GPIO_ENET_MDC GPIO_ENET_MDC_1
-#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1
+#define BOARD_NUM_BUTTONS 8
-/* Trace GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 TRACE_D3
- * P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 TRACE_D2
- * P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 TRACE_D1
- * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 TRACE_D0
- * P2[6]/PCAP1[0]/RI1/TRACECLK 67 TRACE_CLK
- */
+#define BOARD_BUTTON_USER1_BIT (1 << BOARD_BUTTON_USER1)
+#define BOARD_BUTTON_USER2_BIT (1 << BOARD_BUTTON_USER2)
+#define BOARD_BUTTON_USER3_BIT (1 << BOARD_BUTTON_USER3)
-/* EINT GPIO PIN SIGNAL NAME
- * -------------------------------- ---- --------------
- * P2[11]/#EINT1/I2STX_CLK 52 #EINT1
- */
+#define BOARD_JOYSTICK_A_BIT (1 << BOARD_JOYSTICK_A)
+#define BOARD_JOYSTICK_B_BIT (1 << BOARD_JOYSTICK_B)
+#define BOARD_JOYSTICK_C_BIT (1 << BOARD_JOYSTICK_C)
+#define BOARD_JOYSTICK_D_BIT (1 << BOARD_JOYSTICK_D)
+#define BOARD_JOYSTICK_CTR_BIT (1 << BOARD_JOYSTICK_CTR)
-/* ?
- * P0[26]/AD0[3]/AOUT/RXD3 6 AOUT
- * P1[31]/SCK1/AD0[5] 20 AIN5
- */
+/* Alternate pin selections *********************************************************/
/************************************************************************************
* Public Types
diff --git a/nuttx/configs/open1788/src/Makefile b/nuttx/configs/open1788/src/Makefile
new file mode 100644
index 000000000..ee4a244f3
--- /dev/null
+++ b/nuttx/configs/open1788/src/Makefile
@@ -0,0 +1,87 @@
+############################################################################
+# configs/open1788/src/Makefile
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+CFLAGS += -I$(TOPDIR)/sched
+
+ASRCS =
+CSRCS = lpc17_boardinitialize.c
+
+ifeq ($(CONFIG_LPC17_EMC_NOR),y)
+CSRCS += lpc17_norinitialize.c
+endif
+
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+ CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+ -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+ -I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
+else
+ CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+ $(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+ $(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+ $(call ARCHIVE, $@, $(OBJS))
+
+.depend: Makefile $(SRCS)
+ $(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+ $(Q) touch $@
+
+depend: .depend
+
+clean:
+ $(call DELFILE, libboard$(LIBEXT))
+ $(call CLEAN)
+
+distclean: clean
+ $(call DELFILE, Make.dep)
+ $(call DELFILE, .depend)
+
+-include Make.dep
diff --git a/nuttx/configs/open1788/src/lpc17_boardinitialize.c b/nuttx/configs/open1788/src/lpc17_boardinitialize.c
new file mode 100644
index 000000000..417c9ae85
--- /dev/null
+++ b/nuttx/configs/open1788/src/lpc17_boardinitialize.c
@@ -0,0 +1,109 @@
+/************************************************************************************
+ * configs/open1788/src/lpc17_boardinitialize.c
+ * arch/arm/src/board/lpc17_boardinitialize.c
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "lpc17_emc.h"
+
+#include "open1788.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_boardinitialize
+ *
+ * Description:
+ * All LPC17xx architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void lpc17_boardinitialize(void)
+{
+ /* Initialize the EMC, SDRAM, NOR FLASH, and NAND FLASH */
+
+#ifdef CONFIG_LPC17_EMC
+ lpc17_emcinitialize();
+#ifdef CONFIG_LPC17_EMC_SDRAM
+ lpc17_sdram_initialize();
+#endif
+#ifdef CONFIG_LPC17_EMC_NOR
+ lpc17_nor_initialize();
+#endif
+#ifdef CONFIG_LPC17_EMC_NAND
+ lpc17_nand_initialize();
+#endif
+#endif
+
+ /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak
+ * function lpc17_sspinitialize() has been brought into the link.
+ */
+
+#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1)
+ if (lpc17_sspinitialize)
+ {
+ lpc17_sspinitialize();
+ }
+#endif
+
+ /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+ up_ledinit();
+#endif
+}
diff --git a/nuttx/configs/open1788/src/lpc17_nandinitialize.c b/nuttx/configs/open1788/src/lpc17_nandinitialize.c
new file mode 100644
index 000000000..1c72b754c
--- /dev/null
+++ b/nuttx/configs/open1788/src/lpc17_nandinitialize.c
@@ -0,0 +1,101 @@
+/************************************************************************************
+ * configs/open1788/src/lpc17_nandinitialize.c
+ * arch/arm/src/board/lpc17_nandinitialize.c
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "open1788.h"
+
+#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_NAND)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_nand_initialize
+ *
+ * Description:
+ * Initialize NAND FLASH
+ *
+ ************************************************************************************/
+
+void lpc17_nand_initialize(void)
+{
+ uint32_t regval;
+
+ /* Set the memory width and byte lanes */
+
+ regval = getreg32(LPC17_EMC_STATICCONFIG1);
+ regval &= ~EMC_STATICCONFIG_MW_MASK;
+ regbal |= (EMC_STATICCONFIG_MW_8BIT | EMC_STATICCONFIG_PB);
+ putreg32(regval, LPC17_EMC_STATICCONFIG1);
+
+ /* Configure timing */
+
+ putreg32(2, LPC17_EMC_STATICWAITWEN1);
+ putreg32(2, LPC17_EMC_STATICWAITOEN1);
+ putreg32(31, LPC17_EMC_STATICWAITRD1);
+ putreg32(31, LPC17_EMC_STATICWAITPAGE1);
+ putreg32(31, LPC17_EMC_STATICWAITWR1);
+ putreg32(31, LPC17_EMC_STATICWAITTURN1);
+
+ /* GPIO P2[21] connects to the Ready/Busy pin of the NAND part. We need to
+ * reconfigure this pin as normal GPIO input.
+ */
+
+ lpc17_gpioconfig(GPIO_NAND_RB);
+}
+
+#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_NAND */
diff --git a/nuttx/configs/open1788/src/lpc17_norinitialize.c b/nuttx/configs/open1788/src/lpc17_norinitialize.c
new file mode 100644
index 000000000..76838b3f0
--- /dev/null
+++ b/nuttx/configs/open1788/src/lpc17_norinitialize.c
@@ -0,0 +1,97 @@
+/************************************************************************************
+ * configs/open1788/src/lpc17_norinitialize.c
+ * arch/arm/src/board/lpc17_norinitialize.c
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "open1788.h"
+
+#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_NOR)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_nor_initialize
+ *
+ * Description:
+ * Initialize NOR FLASH
+ *
+ ************************************************************************************/
+
+void lpc17_nor_initialize(void)
+{
+ uint32_t regval;
+
+ /* Set the memory width and byte lanes */
+
+ regval = getreg32(LPC17_EMC_STATICCONFIG0);
+ regval &= ~EMC_STATICCONFIG_MW_MASK;
+ regbal |= (EMC_STATICCONFIG_MW_16BIT | EMC_STATICCONFIG_PB);
+ putreg32(regval, LPC17_EMC_STATICCONFIG0);
+
+ /* Configure timing */
+
+ putreg32(2, LPC17_EMC_STATICWAITWEN0);
+ putreg32(2, LPC17_EMC_STATICWAITOEN0);
+ putreg32(31, LPC17_EMC_STATICWAITRD0);
+ putreg32(31, LPC17_EMC_STATICWAITPAGE0);
+ putreg32(31, LPC17_EMC_STATICWAITWR0);
+ putreg32(31, LPC17_EMC_STATICWAITTURN0);
+
+ up_mdelay(10);
+}
+
+#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_NOR */
diff --git a/nuttx/configs/open1788/src/lpc17_sdraminitialize.c b/nuttx/configs/open1788/src/lpc17_sdraminitialize.c
new file mode 100644
index 000000000..07059f49a
--- /dev/null
+++ b/nuttx/configs/open1788/src/lpc17_sdraminitialize.c
@@ -0,0 +1,229 @@
+/************************************************************************************
+ * configs/open1788/src/lpc17_sdraminitialize.c
+ * arch/arm/src/board/lpc17_sdraminitialize.c
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "open1788.h"
+
+#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_SDRAM)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+#define EMC_NS2CLK(ns, npc) ((ns + npc - 1) / npc)
+#define MDKCFG_RASCAS0VAL 0x00000303
+
+#define CONFIG_ARCH_SDRAM_32BIT
+
+#ifdef CONFIG_ARCH_SDRAM_16BIT
+# define SDRAM_SIZE 0x02000000 /* 256Mbit */
+#else /* if defined(CONFIG_ARCH_SDRAM_32BIT) */
+# undef CONFIG_ARCH_SDRAM_32BIT
+# define CONFIG_ARCH_SDRAM_32BIT 1
+# define SDRAM_SIZE 0x04000000 /* 512Mbit */
+#endif
+
+#define SDRAM_BASE 0xa0000000 /* CS0 */
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_sdram_initialize
+ *
+ * Description:
+ * Initialize SDRAM
+ *
+ ************************************************************************************/
+
+void lpc17_sdram_initialize(void)
+{
+ uint32_t mhz;
+ uint32_t ns_per_clk;
+ uint32_t regval;
+#ifdef CONFIG_ARCH_SDRAM_16BIT
+ volatile uint16_t dummy;
+#else
+ volatile uint32_t dummy;
+#endif
+ int i;
+
+ /* Reconfigure delays:
+ *
+ * CMDDLY: Programmable delay value for EMC outputs in command delayed
+ * mode. The delay amount is roughly CMDDLY * 250 picoseconds.
+ * FBCLKDLY: Programmable delay value for the feedback clock that controls
+ * input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250
+ * picoseconds.
+ * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
+ * typically be used in clock delayed mode. The delay amount is roughly
+ * (CLKOUT0DLY+1) * 250 picoseconds.
+ * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
+ * typically be used in clock delayed mode. The delay amount is roughly
+ * (CLKOUT1DLY+1) * 250 picoseconds.
+ */
+
+ regval = SYSCON_EMCDLYCTL_CMDDLY(32) |
+ SYSCON_EMCDLYCTL_FBCLKDLY(32) |
+ SYSCON_EMCDLYCTL_CLKOUT0DLY(1) |
+ SYSCON_EMCDLYCTL_CLKOUT1DLY(1);
+ putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
+
+ /* The core clock is PLL0CLK:
+ *
+ * PLL0CLK = (2 * PLL0_M * SYSCLK) / PLL0_D
+ */
+
+ mhz = PLL0CLK / 1000000;
+#if BOARD_CLKSRCSEL_VALUE == SYSCON_CLKSRCSEL_MAIN
+ mhz >>= 1;
+#endif
+ ns_per_clk = 1000 / mhz;
+
+ /* Configure the SDRAM */
+
+ putreg32( EMC_NS2CLK(20, ns_per_clk), LPC17_EMC_DYNAMICRP); /* TRP = 20 nS */
+ putreg32( 15, LPC17_EMC_DYNAMICRAS); /* RAS = 42ns to 100K ns, */
+ putreg32( 0, LPC17_EMC_DYNAMICSREX); /* TSREX = 1 clock */
+ putreg32( 1, LPC17_EMC_DYNAMICAPR); /* TAPR = 2 clocks? */
+ putreg32(EMC_NS2CLK(20, ns_per_clk) + 2, LPC17_EMC_DYNAMICDAL); /* TDAL = TRP + TDPL = 20ns + 2clk */
+ putreg32( 1, LPC17_EMC_DYNAMICWR); /* TWR = 2 clocks */
+ putreg32( EMC_NS2CLK(63, ns_per_clk), LPC17_EMC_DYNAMICRC); /* H57V2562GTR-75C TRC = 63ns(min)*/
+ putreg32( EMC_NS2CLK(63, ns_per_clk, LPC17_EMC_DYNAMICRFC); /* H57V2562GTR-75C TRFC = TRC */
+ putreg32( 15, LPC17_EMC_DYNAMICXSR); /* Exit self-refresh to active */
+ putreg32( EMC_NS2CLK(63, ns_per_clk), LPC17_EMC_DYNAMICRRD); /* 3 clock, TRRD = 15ns (min) */
+ putreg32( 1, LPC17_EMC_DYNAMICMRD); /* 2 clock, TMRD = 2 clocks (min) */
+
+ /* Command delayed strategy, using EMCCLKDELAY */
+
+ putreg32(EMC_DYNAMICREADCONFIG_RD_CMD, LPC17_EMC_DYNAMICREADCONFIG);
+
+ /* H57V2562GTR-75C: TCL=3CLK, TRCD = 20ns(min), 3 CLK = 24ns */
+
+ putreg32(MDKCFG_RASCAS0VAL, LPC17_EMC_DYNAMICRASCAS0);
+
+ #ifdef CONFIG_ARCH_SDRAM_16BIT
+ /* For Manley lpc1778 SDRAM: H57V2562GTR-75C, 256Mb, 16Mx16, 4 banks, row=13, column=9:
+ *
+ * 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC
+ */
+
+ putreg32(EMC_DYNAMICCONFIG_MD_SDRAM | EMC_DYNAMICCONFIG_AM0(13),
+ LPC17_EMC_DYNAMICCONFIG0);
+
+#elif defined CONFIG_ARCH_SDRAM_32BIT
+ /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
+
+ putreg32(EMC_DYNAMICCONFIG_MD_SDRAM | EMC_DYNAMICCONFIG_AM0(13) | EMC_DYNAMICCONFIG_AM1,
+ LPC17_EMC_DYNAMICCONFIG0);
+#endif
+
+ up_mdelay(100);
+
+ /* Issue NOP command */
+
+ putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_NOP,
+ LPC17_EMC_DYNAMICCONTROL);
+
+ /* Wait 200 Msec */
+
+ up_mdelay(200);
+
+ /* Issue PALL command */
+
+ putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_PALL,
+ LPC17_EMC_DYNAMICCONTROL);
+
+ putreg32(2, LPC17_EMC_DYNAMICREFRESH); /* ( n * 16 ) -> 32 clock cycles */
+
+ /* Wait 128 AHB clock cycles */
+
+ for(i = 0; i < 128; i++);
+
+ /* 64ms/8192 = 7.8125us, nx16x8.33ns < 7.8125us, n < 58.6*/
+
+ regval = 64000000 / (1 << 13);
+ regval -= 16;
+ regval >>= 4;
+ regval = regval * mhz / 1000;
+ putreg32(regval, LPC17_EMC_DYNAMICREFRESH);
+
+ /* Issue MODE command */
+
+ putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_MODE,
+ LPC17_EMC_DYNAMICCONTROL);
+
+#ifdef CONFIG_ARCH_SDRAM_16BIT
+ dummy = getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
+#elif defined CONFIG_ARCH_SDRAM_32BIT
+ dummy = getreg32(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */
+#endif
+
+ /* Issue NORMAL command */
+
+ putreg32(EMC_DYNAMICCONTROL_I_NORMAL, LPC17_EMC_DYNAMICCONTROL);
+
+ /* Enable buffer */
+
+ regval = getreg32(LPC17_EMC_DYNAMICCONFIG0);
+ regval |= EMC_DYNAMICCONFIG_B;
+ putreg32(regval, LPC17_EMC_DYNAMICCONFIG0);
+ up_mdelay(12);
+
+ regval = getreg32(LPC17_SYSCON_EMCDLYCTL);
+ regval &= ~SYSCON_EMCDLYCTL_CMDDLY_MASK;
+ regval |= SYSCON_EMCDLYCTL_CMDDLY(18);
+ putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
+}
+
+#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_SDRAM */
diff --git a/nuttx/configs/open1788/src/open1788.h b/nuttx/configs/open1788/src/open1788.h
new file mode 100644
index 000000000..7eb4f7e9c
--- /dev/null
+++ b/nuttx/configs/open1788/src/open1788.h
@@ -0,0 +1,122 @@
+/************************************************************************************
+ * configs/olimex-lpc1766stk/src/lpc1766stk_internal.h
+ * arch/arm/src/board/lpc1766stk_internal.n
+ *
+ * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_INTERNAL_H
+#define _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_INTERNAL_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* LPC1766-STK GPIO Pin Definitions *************************************************/
+/* GPIO P2[21] connects to the Ready/Busy pin of the NAND part. We need to
+ * reconfigure this pin as normal GPIO input if NAND is used.
+ */
+
+#define GPIO_NAND_RB (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN21)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_sspinitialize
+ *
+ * Description:
+ * Called to configure SPI chip select GPIO pins for the Olimex LPC1766-STK board.
+ *
+ ************************************************************************************/
+
+void weak_function lpc17_sspinitialize(void);
+
+/************************************************************************************
+ * Name: lpc17_sdram_initialize
+ *
+ * Description:
+ * Initialize SDRAM
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_LPC17_EMC
+#ifdef CONFIG_LPC17_EMC_SDRAM
+void lpc17_sdram_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: lpc17_nor_initialize
+ *
+ * Description:
+ * Initialize NOR FLASH
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_LPC17_EMC_NOR
+void lpc17_nor_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: lpc17_nand_initialize
+ *
+ * Description:
+ * Initialize NAND FLASH
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_LPC17_EMC_NAND
+void lpc17_nand_initialize(void);
+#endif
+#endif /* CONFIG_LPC17_EMC */
+
+#endif /* __ASSEMBLY__ */
+#endif /* _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_INTERNAL_H */
+