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author | Gregory Nutt <gnutt@nuttx.org> | 2013-11-16 11:46:35 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-11-16 11:46:35 -0600 |
commit | c6bd7ced5e8b6f9f0ef12fe32e7ef67df5539a10 (patch) | |
tree | bfe5138c834209522490dd80af60fcb209385140 | |
parent | 803b5f698d0aaec0b014dd54ea7870f2c3fecd6d (diff) | |
download | px4-nuttx-c6bd7ced5e8b6f9f0ef12fe32e7ef67df5539a10.tar.gz px4-nuttx-c6bd7ced5e8b6f9f0ef12fe32e7ef67df5539a10.tar.bz2 px4-nuttx-c6bd7ced5e8b6f9f0ef12fe32e7ef67df5539a10.zip |
Further NAND development
-rw-r--r-- | nuttx/ChangeLog | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sama5/Kconfig | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sama5/sam_nand.c | 75 | ||||
-rw-r--r-- | nuttx/configs/sama5d3x-ek/include/board.h | 6 | ||||
-rw-r--r-- | nuttx/drivers/mtd/Kconfig | 47 | ||||
-rw-r--r-- | nuttx/drivers/mtd/Make.defs | 2 | ||||
-rwxr-xr-x | nuttx/drivers/mtd/mtd_nand.c | 187 | ||||
-rw-r--r-- | nuttx/drivers/mtd/mtd_onfi.c | 238 | ||||
-rw-r--r-- | nuttx/include/nuttx/mtd/nand.h | 104 | ||||
-rw-r--r-- | nuttx/include/nuttx/mtd/nand_config.h | 127 | ||||
-rw-r--r-- | nuttx/include/nuttx/mtd/nand_model.h | 17 | ||||
-rw-r--r-- | nuttx/include/nuttx/mtd/nand_scheme.h | 105 | ||||
-rw-r--r-- | nuttx/include/nuttx/mtd/onfi.h | 68 |
13 files changed, 786 insertions, 198 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index cdaeddafa..2732e71e4 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -6070,4 +6070,6 @@ (2013-11-15). * configs/ea3131/src/up_usbhost.c: Board-specific USB host support for the EA3131 board (2013-11-15). - + * drivers/mtd/mtd_nand.c, include/nuttx/mtd/nand.h, nand_config.h, + and nand_scheme.h: Further NAND support (still incomplete). + (2013-11-16). diff --git a/nuttx/arch/arm/src/sama5/Kconfig b/nuttx/arch/arm/src/sama5/Kconfig index acc34bee1..a062235ec 100644 --- a/nuttx/arch/arm/src/sama5/Kconfig +++ b/nuttx/arch/arm/src/sama5/Kconfig @@ -57,12 +57,14 @@ config ARCH_CHIP_ATSAMA5D31 select SAMA5_HAVE_LCDC select SAMA5_HAVE_UART0 select SAMA5_HAVE_UART1 + select ARCH_NAND_HWECC config ARCH_CHIP_ATSAMA5D33 bool "Atmel ATSAMA5D33" select ARCH_CHIP_SAMA5D3 select SAMA5_HAVE_GMAC select SAMA5_HAVE_LCDC + select ARCH_NAND_HWECC config ARCH_CHIP_ATSAMA5D34 bool "Atmel ATSAMA5D34" @@ -72,6 +74,7 @@ config ARCH_CHIP_ATSAMA5D34 select SAMA5_HAVE_LCDC select SAMA5_HAVE_CAN0 select SAMA5_HAVE_CAN1 + select ARCH_NAND_HWECC config ARCH_CHIP_ATSAMA5D35 bool "Atmel ATSAMA5D35" @@ -84,6 +87,7 @@ config ARCH_CHIP_ATSAMA5D35 select SAMA5_HAVE_CAN0 select SAMA5_HAVE_CAN1 select SAMA5_HAVE_TC1 + select ARCH_NAND_HWECC endchoice # Atmel AT91SAMA5 Chip Selection diff --git a/nuttx/arch/arm/src/sama5/sam_nand.c b/nuttx/arch/arm/src/sama5/sam_nand.c index 819134a7f..d18d874a6 100644 --- a/nuttx/arch/arm/src/sama5/sam_nand.c +++ b/nuttx/arch/arm/src/sama5/sam_nand.c @@ -47,6 +47,7 @@ ****************************************************************************/ #include <nuttx/config.h> +#include <nuttx/mtd/nand_config.h> #include <sys/types.h> #include <stdint.h> @@ -56,6 +57,9 @@ #include <nuttx/fs/ioctl.h> #include <nuttx/mtd/mtd.h> +#include <nuttx/mtd/nand.h> + +#include <arch/board/board.h> #include "sam_nand.h" @@ -160,7 +164,7 @@ static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startblock, */ /* Read the specified blocks into the provided user buffer and return status - * (The positive, number of blocks actually read or a negated errno). + * (The positive, number of blocks actually read or a negated errno). */ #warning Missing logic @@ -233,7 +237,7 @@ static int nand_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) ret = OK; } break; - + case MTDIOC_XIPBASE: default: ret = -ENOTTY; /* Bad command */ @@ -251,19 +255,15 @@ static int nand_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) * Name: sam_nand_initialize * * Description: - * Create and initialize a raw NAND MTD device instance. MTD devices are + * Create and initialize an NAND MTD device instance. MTD devices are * not registered in the file system, but are created as instances that can * be bound to other functions (such as a block or character driver front * end). * - * This MTD devices implements a RAW NAND interface: No ECC or sparing is - * performed here. Those necessary NAND features are provided by common, - * higher level MTD layers found in drivers/mtd. - * * Input parameters: * cs - Chip select number (in the event that multiple NAND devices * are connected on-board). - * + * * Returned value. * On success a non-NULL pointer to an MTD device structure is returned; * NULL is returned on a failure. @@ -273,6 +273,9 @@ static int nand_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) struct mtd_dev_s *sam_nand_initialize(int cs) { struct nand_dev_s *priv; + uintptr_t cmdaddr; + uintptr_t addraddr; + uintptr_t dataaddr; int ret; fvdbg("CS%d\n", cs); @@ -282,28 +285,67 @@ struct mtd_dev_s *sam_nand_initialize(int cs) #ifdef CONFIG_SAMA5_EBICS0_NAND if (cs == HSMC_CS0) { + /* Refer to the pre-allocated NAND device structure */ + priv = &g_cs0nand; - } + + /* Set up the NAND addresses. These must be provided in the board.h + * header file. + */ + + cmdaddr = BOARD_EBICS0_NAND_CMDADDR; + addraddr = BOARD_EBICS0_NAND_ADDRADDR; + dataaddr = BOARD_EBICS0_NAND_DATAADDR; else #endif #ifdef CONFIG_SAMA5_EBICS1_NAND if (cs == HSMC_CS1) { + /* Refer to the pre-allocated NAND device structure */ + priv = &g_cs1nand; + + /* Set up the NAND addresses. These must be provided in the board.h + * header file. + */ + + cmdaddr = BOARD_EBICS1_NAND_CMDADDR; + addraddr = BOARD_EBICS1_NAND_ADDRADDR; + dataaddr = BOARD_EBICS1_NAND_DATAADDR; } else #endif #ifdef CONFIG_SAMA5_EBICS2_NAND if (cs == HSMC_CS2) { + /* Refer to the pre-allocated NAND device structure */ + priv = &g_cs2nand; + + /* Set up the NAND addresses. These must be provided in the board.h + * header file. + */ + + cmdaddr = BOARD_EBICS2_NAND_CMDADDR; + addraddr = BOARD_EBICS2_NAND_ADDRADDR; + dataaddr = BOARD_EBICS2_NAND_DATAADDR; } else #endif #ifdef CONFIG_SAMA5_EBICS3_NAND if (cs == HSMC_CS3) { + /* Refer to the pre-allocated NAND device structure */ + priv = &g_cs3nand; + + /* Set up the NAND addresses. These must be provided in the board.h + * header file. + */ + + cmdaddr = BOARD_EBICS3_NAND_CMDADDR; + addraddr = BOARD_EBICS3_NAND_ADDRADDR; + dataaddr = BOARD_EBICS3_NAND_DATAADDR; } else #endif @@ -327,11 +369,22 @@ struct mtd_dev_s *sam_nand_initialize(int cs) ret = board_nandflash_config(cs); if (ret < 0) { - fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n", cs, ret); + fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n", + cs, ret); + return NULL; + } + + /* Probe the NAND part */ + + ret = nand_initialize(cmdaddr, addraddr, dataaddr); + if (ret < 0) + { + fdbg("ERROR: CS%d nand_initialize failed: %d at (%p, %p, %p)\n", + cs, ret, + (FAR void *)cmdaddr, (FAR void *)addraddr, (FAR void *)dataaddr); return NULL; } - /* Initialize the NAND */ #warning Missing logic /* Return the implementation-specific state structure as the MTD device */ diff --git a/nuttx/configs/sama5d3x-ek/include/board.h b/nuttx/configs/sama5d3x-ek/include/board.h index 8a47596e0..5cda44581 100644 --- a/nuttx/configs/sama5d3x-ek/include/board.h +++ b/nuttx/configs/sama5d3x-ek/include/board.h @@ -168,15 +168,15 @@ /* Address for transferring command bytes to the nandflash, CLE A22*/ -#define BOARD_NF_COMMAND_ADDR 0x60400000 +#define BOARD_EBICS3_NAND_CMDADDR 0x60400000 /* Address for transferring address bytes to the nandflash, ALE A21*/ -#define BOARD_NF_ADDRESS_ADDR 0x60200000 +#define BOARD_EBICS3_NAND_ADDRADDR 0x60200000 /* Address for transferring data bytes to the nandflash.*/ -#define BOARD_NF_DATA_ADDR 0x60000000 +#define BOARD_EBICS3_NAND_DATAADDR 0x60000000 /* PIO configuration ****************************************************************/ /* LCDC */ diff --git a/nuttx/drivers/mtd/Kconfig b/nuttx/drivers/mtd/Kconfig index ed9f79850..1097897f0 100644 --- a/nuttx/drivers/mtd/Kconfig +++ b/nuttx/drivers/mtd/Kconfig @@ -81,8 +81,55 @@ config MTD_NAND ---help--- Enable support for NAND FLASH devices. +config ARCH_NAND_HWECC + bool + default n + if MTD_NAND +config MTD_NAND_MAXNUMBLOCKS + int "Max blocks" + default 1024 + ---help--- + Maximum number of blocks in a device + +config MTD_NAND_MAXNUMPAGESPERBLOCK + int "Max pages per block" + default 256 + ---help--- + Maximum number of pages in one block + +config MTD_NAND_MAXPAGEDATASIZE + int "Max page size" + default 4096 + ---help--- + Maximum size of the data area of one page, in bytes. + +config MTD_NAND_MAXPAGESPARESIZE + int "Max size of spare area" + default 256 + ---help--- + Maximum size of the spare area of one page, in bytes. + +config MTD_NAND_MAXSPAREECCBYTES + int "Max number of ECC bytes" + default 48 + ---help--- + Maximum number of ECC bytes stored in the spare for one single page. + +config MTD_NAND_MAXSPAREEXTRABYTES + int "Max extra free bytes" + default 206 + ---help--- + Maximum number of extra free bytes inside the spare area of a page. + +config MTD_NAND_MAX_HWECCSIZE + int "Max H/W ECC size" + default 200 + depends on ARCH_NAND_HWECC + ---help--- + Maximum HW ECC size + config MTD_NAND_EMBEDDEDECC bool "Support devices with Embedded ECC" default n diff --git a/nuttx/drivers/mtd/Make.defs b/nuttx/drivers/mtd/Make.defs index 0595a57d5..61624e566 100644 --- a/nuttx/drivers/mtd/Make.defs +++ b/nuttx/drivers/mtd/Make.defs @@ -46,7 +46,7 @@ CSRCS += mtd_partition.c endif ifeq ($(CONFIG_MTD_NAND),y) -CSRCS += mtd_onfi.c +CSRCS += mtd_nand.c mtd_onfi.c endif ifeq ($(CONFIG_RAMMTD),y) diff --git a/nuttx/drivers/mtd/mtd_nand.c b/nuttx/drivers/mtd/mtd_nand.c new file mode 100755 index 000000000..45791d40e --- /dev/null +++ b/nuttx/drivers/mtd/mtd_nand.c @@ -0,0 +1,187 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_nand.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * References: + * SAMA5D3 Series Data Sheet + * Atmel NoOS sample code. + * + * The Atmel sample code has a BSD compatibile license that requires this + * copyright notice: + * + * Copyright (c) 2011, 2012, Atmel Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the names NuttX nor Atmel nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/mtd/nand_config.h> + +#include <sys/types.h> +#include <stdint.h> +#include <string.h> +#include <errno.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/mtd/nand.h> +#include <nuttx/mtd/onfi.h> +#include <nuttx/mtd/nand_scheme.h> +#include <nuttx/mtd/nand_model.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nand_initialize + * + * Description: + * Probe and initialize NAND. + * + * Input parameters: + * cmdaddr - NAND command address base + * addraddr - NAND address address base + * dataaddr - NAND data address + * + * Returned value. + * OK is returned on success; A negated errno value is returned on failure. + * + ****************************************************************************/ + +int nand_initialize(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr) +{ + struct onfi_pgparam_s onfi; + struct nand_model_s model; + bool compatible; + int ret; + + fvdbg("cmdaddr=%p addraddr=%p dataaddr=%p\n", + (FAR void *)cmdaddr, (FAR void *)addraddr, (FAR void *)dataaddr); + + /* Check if there is NAND connected on the EBI */ + + if (!onfi_ebidetect(cmdaddr, addraddr, dataaddr)) + { + fdbg("ERROR: No NAND device detected at: %p %p %p\n", + (FAR void *)cmdaddr, (FAR void *)addraddr, (FAR void *)dataaddr); + return -ENODEV; + } + + /* Read the ONFI page parameters from the NAND device */ + + ret = onfi_read(cmdaddr, addraddr, dataaddr, &onfi); + if (ret < 0) + { + fvdbg("ERROR: Failed to get ONFI page parameters: %d\n", ret); + compatible = false; + } + else + { + uint64_t size; + + fvdbg("Found ONFI compliant NAND FLASH\n"); + compatible = true; + + /* Construct the NAND model structure */ + + model.devid = onfi.manufacturer; + model.options = onfi.buswidth ? NANDMODEL_DATAWIDTH16 : NANDMODEL_DATAWIDTH8; + model.pagesize = onfi.pagesize; + model.sparesize = onfi.sparesize; + + size = (uint64_t)onfi.pagesperblock * + (uint64_t)onfi.blocksperlun * + (uint64_t)onfi.pagesize; + DEBUGASSERT(size < (uint64_t)(1 << 21)); + + model.devsize = (uint16_t)(size >> 20); + + size = (uint64_t)onfi.pagesperblock * + (uint64_t)onfi.pagesize; + DEBUGASSERT(size < (uint64_t)(1 << 11)); + + model.blocksize = (uint16_t)(size >> 10); + + switch (onfi.pagesize) + { + case 256: + model.scheme = &g_nand_sparescheme256; + break; + + case 512: + model.scheme = &g_nand_sparescheme512; + break; + + case 2048: + model.scheme = &g_nand_sparescheme2048; + break; + + case 4096: + model.scheme = &g_nand_sparescheme4096; + break; + } + + /* Disable any internal, embedded ECC function */ + + (void)onfi_embeddedecc(&onfi, cmdaddr, addraddr, dataaddr, false); + } + +#warning Missing logic + + /* Return the implementation-specific state structure as the MTD device */ + + return OK; +} diff --git a/nuttx/drivers/mtd/mtd_onfi.c b/nuttx/drivers/mtd/mtd_onfi.c index 872f9a866..58cf30e6b 100644 --- a/nuttx/drivers/mtd/mtd_onfi.c +++ b/nuttx/drivers/mtd/mtd_onfi.c @@ -49,6 +49,7 @@ ****************************************************************************/ #include <nuttx/config.h> +#include <nuttx/mtd/nand_config.h> #include <sys/types.h> @@ -59,7 +60,6 @@ #include <assert.h> #include <debug.h> -#include <nuttx/kmalloc.h> #include <nuttx/mtd/nand_model.h> #include <nuttx/mtd/onfi.h> @@ -89,20 +89,20 @@ #define EBICSA_NAND_D0_ON_D16 (1 << 24) /* Misc. definitions */ - + #define MAX_READ_STATUS_COUNT 100000 /* Read status timeout */ #define ONFI_PARAM_TABLE_SIZE 116 /* Not all 256 bytes are useful */ /* NAND access macros */ -#define WRITE_NAND_COMMAND(d,a,c) \ +#define WRITE_NAND_COMMAND(d,c) \ do { \ - *(volatile uint8_t *)((uintptr_t)(a) | (uintptr_t)(c)) = (uint8_t)(d); \ + *(volatile uint8_t *)((uintptr_t)(c)) = (uint8_t)(d); \ } while (0) -#define WRITE_NAND_ADDRESS(d,a,b) \ +#define WRITE_NAND_ADDRESS(d,b) \ do { \ - *(volatile uint8_t *)((uintptr_t)(a) | (uintptr_t)(b)) = (uint8_t)(d); \ + *(volatile uint8_t *)((uintptr_t)(b)) = (uint8_t)(d); \ } while (0) #define READ_NAND(a) \ @@ -117,24 +117,6 @@ * Private Types ****************************************************************************/ -/* Describes memory organization block information in ONFI parameter page*/ - -struct onfi_pgparam_s -{ - uint8_t manufacturer; /* JEDEC manufacturer ID */ - uint8_t buswidth; /* Bus width */ - uint8_t luns; /* Number of logical units */ - uint8_t eccsize; /* Number of bits of ECC correction */ - uint8_t model; /* Device model */ - uint16_t sparesize; /* Number of spare bytes per page */ - uint16_t pagesperblock; /* Number of pages per block */ - uint16_t blocksperlun; /* Number of blocks per logical unit (LUN) */ - uint32_t pagesize; /* Number of data bytes per page */ - uintptr_t cmdaddr; /* Base address for NAND commands */ - uintptr_t addraddr; /* Base address for NAND addresses */ - uintptr_t dataaddr; /* NAND data address */ -}; - /**************************************************************************** * Private Data ****************************************************************************/ @@ -167,7 +149,7 @@ static int onfi_readstatus(uintptr_t cmdaddr, uintptr_t dataaddr) /* Issue command */ - WRITE_NAND_COMMAND(NAND_CMD_STATUS, dataaddr, cmdaddr); + WRITE_NAND_COMMAND(NAND_CMD_STATUS, cmdaddr); timeout = 0; while (timeout < MAX_READ_STATUS_COUNT) @@ -205,7 +187,7 @@ static int onfi_readstatus(uintptr_t cmdaddr, uintptr_t dataaddr) * This function check if the Nandflash has an embedded ECC controller. * * Input Parameters: - * handle - An ONFI handle previously created by onfi_create(). + * onfi - An initialized ONFI data structure. * * Returned Value: * True - Internal ECC supported @@ -258,8 +240,8 @@ bool onfi_compatible(uintptr_t cmdaddr, uintptr_t addraddr, /* Check if the Nandflash is ONFI compliant */ - WRITE_NAND_COMMAND(NAND_CMD_READID, dataaddr, cmdaddr); - WRITE_NAND_ADDRESS(0x20, dataaddr, addraddr); + WRITE_NAND_COMMAND(NAND_CMD_READID, cmdaddr); + WRITE_NAND_ADDRESS(0x20, addraddr); parmtab[0] = READ_NAND(dataaddr); parmtab[1] = READ_NAND(dataaddr); @@ -272,29 +254,28 @@ bool onfi_compatible(uintptr_t cmdaddr, uintptr_t addraddr, } /**************************************************************************** - * Name: onfi_create + * Name: onfi_read * * Description: - * If the addresses refer to a compatible ONFI device, then create the - * ONFI handle that can be used to interact with the device. + * If the addresses refer to a compatible ONFI device, then read the ONFI + * parameters from the FLASH into the user provided data staructure. * * Input Parameters: * cmdaddr - NAND command address base * addraddr - NAND address address base * dataaddr - NAND data address + * onfi - The ONFI data structure to populate. * * Returned Value: - * On success, a non-NULL ONFI handle is returned. This handle must be - * freed by calling onfi_destroy with it is no longer needed. - * NULL is returned on any failure. Failures include such things as - * memory allocation failures, ONFI incompatibility, timeouts, etc. + * OK is returned on success and the the ONFI data structure is initialized + * with NAND data. A negated errno value is returned in the event of an + * error. * ****************************************************************************/ -ONFI_HANDLE *onfi_create(uintptr_t cmdaddr, uintptr_t addraddr, - uintptr_t dataaddr) +int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr, + FAR struct onfi_pgparam_s *onfi) { - FAR struct onfi_pgparam_s *onfi; uint8_t parmtab[ONFI_PARAM_TABLE_SIZE]; int i; @@ -303,126 +284,95 @@ ONFI_HANDLE *onfi_create(uintptr_t cmdaddr, uintptr_t addraddr, if (onfi_compatible(cmdaddr, addraddr, dataaddr)) { - /* Allocate the ONFI structure */ - - onfi = (FAR struct onfi_pgparam_s *)kzalloc(sizeof(struct onfi_pgparam_s)); - if (!onfi) - { - fdbg("ERROR: Failed to allocate ONFI structure\n"); - return (ONFI_HANDLE)NULL; - } - - /* Save the NAND base addresses */ - - onfi->cmdaddr = cmdaddr; - onfi->addraddr = addraddr; - onfi->dataaddr = dataaddr; - - /* Initialize the ONFI parameter table */ + fdbg("ERROR: No ONFI compatible device detected\n"); + return -ENODEV; + } - memset(parmtab, 0xff, ONFI_PARAM_TABLE_SIZE); + /* Initialize the ONFI parameter table */ - /* Perform Read Parameter Page command */ + memset(parmtab, 0xff, ONFI_PARAM_TABLE_SIZE); - WRITE_NAND_COMMAND(NAND_CMD_READ_PARAM_PAGE, dataaddr, cmdaddr); - WRITE_NAND_ADDRESS(0x0, dataaddr, addraddr); + /* Perform Read Parameter Page command */ - /* Wait NF ready */ + WRITE_NAND_COMMAND(NAND_CMD_READ_PARAM_PAGE, cmdaddr); + WRITE_NAND_ADDRESS(0x0, addraddr); - onfi_readstatus(cmdaddr, dataaddr); + /* Wait NF ready */ - /* Re-enable data output mode required after Read Status command */ + onfi_readstatus(cmdaddr, dataaddr); - WRITE_NAND_COMMAND(NAND_CMD_READ0, dataaddr, cmdaddr); + /* Re-enable data output mode required after Read Status command */ - /* Read the parameter table */ + WRITE_NAND_COMMAND(NAND_CMD_READ0, cmdaddr); - for (i = 0; i < ONFI_PARAM_TABLE_SIZE; i++) - { - parmtab[i] = READ_NAND(dataaddr); - } + /* Read the parameter table */ - for (i = 0; i < ONFI_PARAM_TABLE_SIZE; i++) - { - if (parmtab[i] != 0xff) - { - break; - } - } + for (i = 0; i < ONFI_PARAM_TABLE_SIZE; i++) + { + parmtab[i] = READ_NAND(dataaddr); + } - if (i == ONFI_PARAM_TABLE_SIZE) + for (i = 0; i < ONFI_PARAM_TABLE_SIZE; i++) + { + if (parmtab[i] != 0xff) { - kfree(onfi); - return (ONFI_HANDLE)NULL; + break; } - - /* JEDEC manufacturer ID */ - - onfi->manufacturer = *(uint8_t *)(parmtab + 64); - fvdbg("ONFI manufacturer %x \n\r", onfi->manufacturer); + } - /* Bus width */ + if (i == ONFI_PARAM_TABLE_SIZE) + { + fdbg("ERROR: Failed to read ONFI parameter table\n"); + return -EIO; + } - onfi->buswidth = (*(uint8_t *)(parmtab + 6)) & 0x01; + /* JEDEC manufacturer ID */ - /* Get number of data bytes per page (bytes 80-83 in the param table) */ + onfi->manufacturer = *(uint8_t *)(parmtab + 64); - onfi->pagesize = *(uint32_t *)(void*)(parmtab + 80); - fvdbg("ONFI pagesize %x \n\r", (unsigned int)onfi->pagesize); + /* Bus width */ - /* Get number of spare bytes per page (bytes 84-85 in the param table) */ + onfi->buswidth = (*(uint8_t *)(parmtab + 6)) & 0x01; - onfi->sparesize = *(uint16_t *)(void*)(parmtab + 84); - fvdbg("ONFI sparesize %x \n\r", (unsigned int)onfi->sparesize); + /* Get number of data bytes per page (bytes 80-83 in the param table) */ - /* Number of pages per block. */ + onfi->pagesize = *(uint32_t *)(void*)(parmtab + 80); - onfi->pagesperblock = *(uint32_t *)(void*)(parmtab + 92); + /* Get number of spare bytes per page (bytes 84-85 in the param table) */ - /* Number of blocks per logical unit (LUN). */ + onfi->sparesize = *(uint16_t *)(void*)(parmtab + 84); - onfi->blocksperlun = *(uint32_t *)(void*)(parmtab + 96); + /* Number of pages per block. */ - /* Number of logical units. */ + onfi->pagesperblock = *(uint32_t *)(void*)(parmtab + 92); - onfi->luns = *(uint8_t *)(parmtab + 100); + /* Number of blocks per logical unit (LUN). */ - /* Number of bits of ECC correction */ + onfi->blocksperlun = *(uint32_t *)(void*)(parmtab + 96); - onfi->eccsize = *(uint8_t *)(parmtab + 112); - fvdbg("ONFI eccsize %x \n\r", onfi->eccsize); + /* Number of logical units. */ - /* Device model */ + onfi->luns = *(uint8_t *)(parmtab + 100); - onfi->model= *(uint8_t *)(parmtab + 49); + /* Number of bits of ECC correction */ - fvdbg("Returning %p\n", onfi); - return (ONFI_HANDLE)onfi; - } + onfi->eccsize = *(uint8_t *)(parmtab + 112); - return (ONFI_HANDLE)NULL; -} + /* Device model */ -/**************************************************************************** - * Name: onfi_destroy - * - * Description: - * Free resources allocated on onfi_create() when the ONFI handle was - * created. Upon return, the ONFI handle is no longer valid and should not - * be used further. - * - * Input Parameters: - * handle - An ONFI handle previously created by onfi_create(). - * - * Returned Value: - * None - * - ****************************************************************************/ + onfi->model= *(uint8_t *)(parmtab + 49); -void onfi_destroy(ONFI_HANDLE handle) -{ - DEBUGASSERT(handle); - kfree(handle); + fvdbg("Returning:\n"); + fvdbg(" manufacturer: 0x%02x\n", onfi->manufacturer); + fvdbg(" buswidth: %d\n", onfi->buswidth); + fvdbg(" luns: %d\n", onfi->luns); + fvdbg(" eccsize: %d\n", onfi->eccsize); + fvdbg(" model: 0x%02s\n", onfi->model); + fvdbg(" sparesize: %d\n", onfi->sparesize); + fvdbg(" pagesperblock: %d\n", onfi->pagesperblock); + fvdbg(" blocksperlun: %d\n", onfi->blocksperlun); + fvdbg(" pagesize: %d\n", onfi->pagesize); + return OK; } /**************************************************************************** @@ -432,7 +382,10 @@ void onfi_destroy(ONFI_HANDLE handle) * Enable or disable the NAND's embedded ECC controller. * * Input Parameters: - * handle - An ONFI handle previously created by onfi_create(). + * onfi - An initialized ONFI data structure. + * cmdaddr - NAND command address base + * addraddr - NAND address address base + * dataaddr - NAND data address * enable - True: enabled the embedded ECC function; False: disable it * * Returned Value: @@ -442,11 +395,10 @@ void onfi_destroy(ONFI_HANDLE handle) ****************************************************************************/ #ifdef CONFIG_MTD_NAND_EMBEDDEDECC -bool onfi_embeddedecc(ONFI_HANDLE handle, bool enable) +bool onfi_embeddedecc(FAR const struct onfi_pgparam_s *onfi, + uintptr_t cmdaddr, uintptr_t addraddr, + uintptr_t dataaddr, bool enable) { - FAR struct onfi_pgparam_s *onfi = (FAR struct onfi_pgparam_s *)handle; - DEBUGASSERT(onfi); - /* Does the NAND supported the embedded ECC function? */ if (onfi_have_embeddedecc(onfi)) @@ -454,27 +406,27 @@ bool onfi_embeddedecc(ONFI_HANDLE handle, bool enable) /* Yes... enable or disable it */ /* Perform common setup */ - WRITE_NAND_COMMAND(NAND_CMD_SET_FEATURE, onfi->dataaddr, onfi->cmdaddr); - WRITE_NAND_ADDRESS(0x90, onfi->dataaddr, onfi->addraddr); + WRITE_NAND_COMMAND(NAND_CMD_SET_FEATURE, cmdaddr); + WRITE_NAND_ADDRESS(0x90, addraddr); if (enable) { /* Activate the internal ECC controller */ - WRITE_NAND(0x08, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); + WRITE_NAND(0x08, dataaddr); + WRITE_NAND(0x00, dataaddr); + WRITE_NAND(0x00, dataaddr); + WRITE_NAND(0x00, dataaddr); setSmcOpEccType(SMC_ECC_INTERNAL); } else { /* De-activate the internal ECC controller */ - WRITE_NAND(0x00, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); - WRITE_NAND(0x00, onfi->dataaddr); + WRITE_NAND(0x00, dataaddr); + WRITE_NAND(0x00, dataaddr); + WRITE_NAND(0x00, dataaddr); + WRITE_NAND(0x00, dataaddr); } return true; @@ -514,7 +466,7 @@ bool onfi_ebidetect(uintptr_t cmdaddr, uintptr_t addraddr, /* Send Reset command */ - WRITE_NAND_COMMAND(NAND_CMD_RESET, dataaddr, cmdaddr); + WRITE_NAND_COMMAND(NAND_CMD_RESET, cmdaddr); /* If a Nandflash is connected, it should answer to a read status command */ @@ -523,8 +475,8 @@ bool onfi_ebidetect(uintptr_t cmdaddr, uintptr_t addraddr, rc = onfi_readstatus(cmdaddr, dataaddr); if (rc == OK) { - WRITE_NAND_COMMAND(NAND_CMD_READID, dataaddr, cmdaddr); - WRITE_NAND_ADDRESS(0, dataaddr, addraddr); + WRITE_NAND_COMMAND(NAND_CMD_READID, cmdaddr); + WRITE_NAND_ADDRESS(0, addraddr); ids[0] = READ_NAND(dataaddr); ids[1] = READ_NAND(dataaddr); diff --git a/nuttx/include/nuttx/mtd/nand.h b/nuttx/include/nuttx/mtd/nand.h new file mode 100644 index 000000000..5a80e3da4 --- /dev/null +++ b/nuttx/include/nuttx/mtd/nand.h @@ -0,0 +1,104 @@ +/**************************************************************************** + * include/nuttx/mtd/nand.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * This logic was based largely on Atmel sample code with modifications for + * better integration with NuttX. The Atmel sample code has a BSD + * compatibile license that requires this copyright notice: + * + * Copyright (c) 2012, Atmel Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the names NuttX nor Atmel nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MTD_NAND_H +#define __INCLUDE_NUTTX_MTD_NAND_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: nand_initialize + * + * Description: + * Probe and initialize NAND. + * + * Input parameters: + * cmdaddr - NAND command address base + * addraddr - NAND address address base + * dataaddr - NAND data address + * + * Returned value. + * OK is returned on success; A negated errno value is returned on failure. + * + ****************************************************************************/ + +int nand_initialize(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __INCLUDE_NUTTX_MTD_NAND_H */ diff --git a/nuttx/include/nuttx/mtd/nand_config.h b/nuttx/include/nuttx/mtd/nand_config.h new file mode 100644 index 000000000..8ce896e18 --- /dev/null +++ b/nuttx/include/nuttx/mtd/nand_config.h @@ -0,0 +1,127 @@ +/**************************************************************************** + * include/nuttx/mtd/nand_config.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * This logic was based largely on Atmel sample code with modifications for + * better integration with NuttX. The Atmel sample code has a BSD + * compatibile license that requires this copyright notice: + * + * Copyright (c) 2012, Atmel Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the names NuttX nor Atmel nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MTD_NAND_CONFIG_H +#define __INCLUDE_NUTTX_MTD_NAND_CONFIG_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************ +/* Maximum number of blocks in a device */ + +#ifndef CONFIG_MTD_NAND_MAXNUMBLOCKS +# define CONFIG_MTD_NAND_MAXNUMBLOCKS 1024 +#endif + +/* Maximum number of pages in one block */ + +#ifndef CONFIG_MTD_NAND_MAXNUMPAGESPERBLOCK +# define CONFIG_MTD_NAND_MAXNUMPAGESPERBLOCK 256 +#endif + +/* Maximum size of the data area of one page, in bytes. */ + +#ifndef CONFIG_MTD_NAND_MAXPAGEDATASIZE +# define CONFIG_MTD_NAND_MAXPAGEDATASIZE 4096 +#endif + +/* Maximum size of the spare area of one page, in bytes. */ + +#ifndef CONFIG_MTD_NAND_MAXPAGESPARESIZE +# define CONFIG_MTD_NAND_MAXPAGESPARESIZE 256 +#endif + +/* Maximum number of ecc bytes stored in the spare for one single page. */ + +#ifndef CONFIG_MTD_NAND_MAXSPAREECCBYTES +# define CONFIG_MTD_NAND_MAXSPAREECCBYTES 48 +#endif + +/* Maximum number of extra free bytes inside the spare area of a page. */ + +#ifndef CONFIG_MTD_NAND_MAXSPAREEXTRABYTES +# define CONFIG_MTD_NAND_MAXSPAREEXTRABYTES 206 +#endif + +/* Maximum PMECC size */ + +#ifdef CONFIG_ARCH_NAND_HWECC +# ifndef CONFIG_MTD_NAND_MAX_HWECCSIZE +# define CONFIG_MTD_NAND_MAX_HWECCSIZE 200 +# endif +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __INCLUDE_NUTTX_MTD_NAND_CONFIG_H */ diff --git a/nuttx/include/nuttx/mtd/nand_model.h b/nuttx/include/nuttx/mtd/nand_model.h index 7a5035fac..b2130ad6b 100644 --- a/nuttx/include/nuttx/mtd/nand_model.h +++ b/nuttx/include/nuttx/mtd/nand_model.h @@ -9,9 +9,9 @@ * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * - * This ogic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * This logic was based largely on Atmel sample code for the SAMA5D3x with + * modifications for better integration with NuttX. The Atmel sample code + * has a BSD compatibile license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * @@ -60,15 +60,22 @@ * Pre-Processor Definitions ****************************************************************************/ -/* Number of NandFlash models inside the model list */ +/* Number of NAND FLASH models inside the model list */ #define NAND_NMODELS 60 +/* Bit definitions for the NAND model options field */ + +#define NANDMODEL_DATAWIDTH8 (0 << 0) /* NAND uses an 8-bit databus */ +#define NANDMODEL_DATAWIDTH16 (1 << 0) /* NAND uses a 16-bit databus */ +#define NANDMODEL_COPYBACK (1 << 1) /* NAND supports the copy-back function + * (internal page-to-page copy) */ + /**************************************************************************** * Public Types ****************************************************************************/ -/* Describes a particular model of NandFlash device. */ +/* Describes a particular model of NAND FLASH device. */ struct nand_model_s { diff --git a/nuttx/include/nuttx/mtd/nand_scheme.h b/nuttx/include/nuttx/mtd/nand_scheme.h new file mode 100644 index 000000000..914d3c195 --- /dev/null +++ b/nuttx/include/nuttx/mtd/nand_scheme.h @@ -0,0 +1,105 @@ +/**************************************************************************** + * include/nuttx/mtd/nand_scheme.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * This logic was based largely on Atmel sample code with modifications for + * better integration with NuttX. The Atmel sample code has a BSD + * compatibile license that requires this copyright notice: + * + * Copyright (c) 2012, Atmel Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the names NuttX nor Atmel nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MTD_SCHEME_H +#define __INCLUDE_NUTTX_MTD_SCHEME_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <nuttx/mtd/nand_config.h> + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct nand_scheme_s +{ + uint8_t bbpos; /* Bad block position marker */ + uint8_t eccsize; /* Number of bytes of ECC correction */ + uint8_t nxbytes; /* Number of extra bytes */ + + /* ECC byte positions */ + + uint8_t eccbytepos[CONFIG_MTD_NAND_MAXSPAREECCBYTES]; + + /* Extra byte positions */ + + uint8_t xbytepos[CONFIG_MTD_NAND_MAXSPAREEXTRABYTES]; +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +EXTERN const struct nand_scheme_s g_nand_sparescheme256; +EXTERN const struct nand_scheme_s g_nand_sparescheme512; +EXTERN const struct nand_scheme_s g_nand_sparescheme2048; +EXTERN const struct nand_scheme_s g_nand_sparescheme4096; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __INCLUDE_NUTTX_MTD_SCHEME_H */ diff --git a/nuttx/include/nuttx/mtd/onfi.h b/nuttx/include/nuttx/mtd/onfi.h index 2cf2878a1..65b4a6863 100644 --- a/nuttx/include/nuttx/mtd/onfi.h +++ b/nuttx/include/nuttx/mtd/onfi.h @@ -9,9 +9,9 @@ * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * - * This ONFI logic was based largely on Atmel sample code with modifications - * for better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * This ONFI logic was based largely on Atmel sample code for the SAMA5D3x + * with modifications for better integration with NuttX. The Atmel sample + * code has a BSD compatibile license that requires this copyright notice: * * Copyright (c) 2010, Atmel Corporation * @@ -64,9 +64,20 @@ * Public Types ****************************************************************************/ -/* Opaque handler used to interact with the ONFI module */ +/* Describes memory organization block information in ONFI parameter page*/ -typedef FAR void *ONFI_HANDLE; +struct onfi_pgparam_s +{ + uint8_t manufacturer; /* JEDEC manufacturer ID */ + uint8_t buswidth; /* Bus width */ + uint8_t luns; /* Number of logical units */ + uint8_t eccsize; /* Number of bits of ECC correction */ + uint8_t model; /* Device model */ + uint16_t sparesize; /* Number of spare bytes per page */ + uint16_t pagesperblock; /* Number of pages per block */ + uint16_t blocksperlun; /* Number of blocks per logical unit (LUN) */ + uint32_t pagesize; /* Number of data bytes per page */ +}; /**************************************************************************** * Public Data @@ -107,45 +118,27 @@ bool onfi_compatible(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr); /**************************************************************************** - * Name: onfi_create + * Name: onfi_read * * Description: - * If the addresses refere to a compatible ONFI device, then create the - * ONFI handle that can be used to interact with the device. + * If the addresses refer to a compatible ONFI device, then read the ONFI + * parameters from the FLASH into the user provided data staructure. * * Input Parameters: * cmdaddr - NAND command address base * addraddr - NAND address address base * dataaddr - NAND data address + * onfi - The ONFI data structure to populate. * * Returned Value: - * On success, a non-NULL ONFI handle is returned. This handle must be - * freed by calling onfi_destroy with it is no longer needed. - * NULL is returned on any failure. Failures include such things as - * memory allocation failures, ONFI incompatibility, timeouts, etc. - * - ****************************************************************************/ - -ONFI_HANDLE *onfi_create(uintptr_t cmdaddr, uintptr_t addraddr, - uintptr_t dataaddr); - -/**************************************************************************** - * Name: onfi_destroy - * - * Description: - * Free resources allocated on onfi_create() when the ONFI handle was - * created. Upon return, the ONFI handle is no longer valid and should not - * be used further. - * - * Input Parameters: - * handle - An ONFI handle previously created by onfi_create(). - * - * Returned Value: - * None + * OK is returned on success and the the ONFI data structure is initialized + * with NAND data. A negated errno value is returned in the event of an + * error. * ****************************************************************************/ -void onfi_destroy(ONFI_HANDLE handle); +int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr, + FAR struct onfi_pgparam_s *onfi); /**************************************************************************** * Name: onfi_embeddedecc @@ -154,7 +147,10 @@ void onfi_destroy(ONFI_HANDLE handle); * Enable or disable the NAND's embedded ECC controller. * * Input Parameters: - * handle - An ONFI handle previously created by onfi_create(). + * onfi - An initialized ONFI data structure. + * cmdaddr - NAND command address base + * addraddr - NAND address address base + * dataaddr - NAND data address * enable - True: enabled the embedded ECC function; False: disable it * * Returned Value: @@ -164,7 +160,11 @@ void onfi_destroy(ONFI_HANDLE handle); ****************************************************************************/ #ifdef CONFIG_MTD_NAND_EMBEDDEDECC -bool onfi_embeddedecc(ONFI_HANDLE handle, bool enable); +bool onfi_embeddedecc(FAR const struct onfi_pgparam_s *onfi, + uintptr_t cmdaddr, uintptr_t addraddr, + uintptr_t dataaddr, bool enable); +#else +# define onfi_embeddedecc(o,c,a,d,e) (false) #endif /**************************************************************************** |