diff options
author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-08 21:42:23 +0000 |
---|---|---|
committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-08 21:42:23 +0000 |
commit | 08650208d65dad8629ef44064f443dfbc2420f38 (patch) | |
tree | 276ac05e5d6d6f4a9b9c88a61ab784ece0c8180b | |
parent | 1603b1a112981f8054b69612a5ad0721eb865bbd (diff) | |
download | px4-nuttx-08650208d65dad8629ef44064f443dfbc2420f38.tar.gz px4-nuttx-08650208d65dad8629ef44064f443dfbc2420f38.tar.bz2 px4-nuttx-08650208d65dad8629ef44064f443dfbc2420f38.zip |
Fixes to get STM32F3Discovery running
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5627 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_lowputc.c | 56 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f30xxx_rcc.c | 2 | ||||
-rw-r--r-- | nuttx/configs/stm32f3discovery/include/board.h | 7 | ||||
-rw-r--r-- | nuttx/configs/stm32f3discovery/nsh/defconfig | 2 | ||||
-rw-r--r-- | nuttx/configs/stm32f3discovery/ostest/defconfig | 2 | ||||
-rw-r--r-- | nuttx/configs/stm32f3discovery/usbnsh/defconfig | 2 | ||||
-rw-r--r-- | nuttx/sched/task_create.c | 6 | ||||
-rw-r--r-- | nuttx/sched/task_vfork.c | 27 |
8 files changed, 81 insertions, 23 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_lowputc.c b/nuttx/arch/arm/src/stm32/stm32_lowputc.c index 08b0118be..1ba29a573 100644 --- a/nuttx/arch/arm/src/stm32/stm32_lowputc.c +++ b/nuttx/arch/arm/src/stm32/stm32_lowputc.c @@ -178,7 +178,18 @@ # define USART_CR1_PARITY_VALUE 0 #endif -#define USART_CR1_CLRBITS (USART_CR1_M|USART_CR1_PCE|USART_CR1_PS|USART_CR1_TE|USART_CR1_RE|USART_CR1_ALLINTS) +#ifdef CONFIG_STM32_STM32F30XX +# define USART_CR1_CLRBITS\ + (USART_CR1_UESM | USART_CR1_RE | USART_CR1_TE | USART_CR1_PS |\ + USART_CR1_PCE |USART_CR1_WAKE | USART_CR1_M | USART_CR1_MME |\ + USART_CR1_OVER8 | USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK |\ + USART_CR1_ALLINTS) +#else +# define USART_CR1_CLRBITS\ + (USART_CR1_M | USART_CR1_PCE |USART_CR1_PS | USART_CR1_TE |\ + USART_CR1_RE | USART_CR1_ALLINTS) +#endif + #define USART_CR1_SETBITS (USART_CR1_M_VALUE|USART_CR1_PARITY_VALUE) /* CR2 settings */ @@ -189,12 +200,34 @@ # define USART_CR2_STOP2_VALUE 0 #endif -#define USART_CR2_CLRBITS (USART_CR2_STOP_MASK|USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL|USART_CR2_LBDIE) +#ifdef CONFIG_STM32_STM32F30XX +# define USART_CR2_CLRBITS \ + (USART_CR2_ADDM7 | USART_CR2_LBDL | USART_CR2_LBDIE | USART_CR2_LBCL |\ + USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_STOP_MASK |\ + USART_CR2_LINEN | USART_CR2_RXINV | USART_CR2_TXINV | USART_CR2_DATAINV |\ + USART_CR2_MSBFIRST | USART_CR2_ABREN | USART_CR2_ABRMOD_MASK |\ + USART_CR2_RTOEN | USART_CR2_ADD8_MASK) +#else +# define USART_CR2_CLRBITS \ + (USART_CR2_STOP_MASK|USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|\ + USART_CR2_LBCL|USART_CR2_LBDIE) +#endif #define USART_CR2_SETBITS USART_CR2_STOP2_VALUE /* CR3 settings */ -#define USART_CR3_CLRBITS (USART_CR3_CTSIE|USART_CR3_CTSE|USART_CR3_RTSE|USART_CR3_EIE) +#ifdef CONFIG_STM32_STM32F30XX + +# define USART_CR3_CLRBITS \ + (USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL |\ + USART_CR3_NACK | USART_CR3_SCEN | USART_CR3_DMAR | USART_CR3_DMAT |\ + USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR1_ONEBIT |\ + USART_CR1_OVRDIS | USART_CR1_DDRE | USART_CR1_DEM | USART_CR1_DEP |\ + USART_CR1_SCARCNT_MASK | USART_CR1_WUS_MASK | USART_CR1_WUFIE) +#else +# define USART_CR3_CLRBITS \ + (USART_CR3_CTSIE|USART_CR3_CTSE|USART_CR3_RTSE|USART_CR3_EIE) +#endif #define USART_CR3_SETBITS 0 /* Only the STM32 F3 supports oversampling by 8 */ @@ -465,14 +498,6 @@ void stm32_lowsetup(void) putreg32(STM32_BRR_VALUE, STM32_CONSOLE_BASE + STM32_USART_BRR_OFFSET); - /* Select oversampling by 8 */ - -#ifdef USE_OVER8 - cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); - cr |= USART_CR1_OVER8; - putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); -#endif - /* Enable Rx, Tx, and the USART */ cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); @@ -536,9 +561,16 @@ void stm32_lowsetup(void) putreg32(STM32_BRR_VALUE, STM32_CONSOLE_BASE + STM32_USART_BRR_OFFSET); - /* Enable Rx, Tx, and the USART */ + /* Select oversampling by 8 */ cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); +#ifdef USE_OVER8 + cr |= USART_CR1_OVER8; + putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); +#endif + + /* Enable Rx, Tx, and the USART */ + cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE); putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); #endif diff --git a/nuttx/arch/arm/src/stm32/stm32f30xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f30xxx_rcc.c index f272217a3..c18f1de3e 100644 --- a/nuttx/arch/arm/src/stm32/stm32f30xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f30xxx_rcc.c @@ -90,6 +90,8 @@ static inline void rcc_reset(void) RCC_CFGR2_ADC34PRES_MASK); putreg32(regval, STM32_RCC_CFGR2); + putreg32(0, STM32_RCC_CFGR2); /* Reset fCK source for all U[S]ARTs to PCLK */ + regval = getreg32(STM32_RCC_CR); /* Reset HSEON, CSSON and PLLON bits */ regval &= ~(RCC_CR_HSEON|RCC_CR_CSSON|RCC_CR_PLLON); putreg32(regval, STM32_RCC_CR); diff --git a/nuttx/configs/stm32f3discovery/include/board.h b/nuttx/configs/stm32f3discovery/include/board.h index b8f1555ec..fb3406499 100644 --- a/nuttx/configs/stm32f3discovery/include/board.h +++ b/nuttx/configs/stm32f3discovery/include/board.h @@ -100,17 +100,20 @@ #define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) + /* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) diff --git a/nuttx/configs/stm32f3discovery/nsh/defconfig b/nuttx/configs/stm32f3discovery/nsh/defconfig index 468e99f5c..c487c0296 100644 --- a/nuttx/configs/stm32f3discovery/nsh/defconfig +++ b/nuttx/configs/stm32f3discovery/nsh/defconfig @@ -235,7 +235,7 @@ CONFIG_ARCH_STACKDUMP=y # Board Settings # CONFIG_DRAM_START=0x20000000 -CONFIG_DRAM_SIZE=114688 +CONFIG_DRAM_SIZE=40960 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y CONFIG_ARCH_INTERRUPTSTACK=0 diff --git a/nuttx/configs/stm32f3discovery/ostest/defconfig b/nuttx/configs/stm32f3discovery/ostest/defconfig index 4cfcc7c49..8dad4a846 100644 --- a/nuttx/configs/stm32f3discovery/ostest/defconfig +++ b/nuttx/configs/stm32f3discovery/ostest/defconfig @@ -228,7 +228,7 @@ CONFIG_ARCH_STACKDUMP=y # Board Settings # CONFIG_DRAM_START=0x20000000 -CONFIG_DRAM_SIZE=114688 +CONFIG_DRAM_SIZE=40960 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y CONFIG_ARCH_INTERRUPTSTACK=0 diff --git a/nuttx/configs/stm32f3discovery/usbnsh/defconfig b/nuttx/configs/stm32f3discovery/usbnsh/defconfig index d1f549536..975549815 100644 --- a/nuttx/configs/stm32f3discovery/usbnsh/defconfig +++ b/nuttx/configs/stm32f3discovery/usbnsh/defconfig @@ -235,7 +235,7 @@ CONFIG_ARCH_STACKDUMP=y # Board Settings # CONFIG_DRAM_START=0x20000000 -CONFIG_DRAM_SIZE=114688 +CONFIG_DRAM_SIZE=40960 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y CONFIG_ARCH_INTERRUPTSTACK=0 diff --git a/nuttx/sched/task_create.c b/nuttx/sched/task_create.c index 15bdebdb9..c160cb52c 100644 --- a/nuttx/sched/task_create.c +++ b/nuttx/sched/task_create.c @@ -135,7 +135,7 @@ static int thread_create(const char *name, uint8_t ttype, int priority, #if CONFIG_NFILE_DESCRIPTORS > 0 || CONFIG_NSOCKET_DESCRIPTORS > 0 ret = group_setuptaskfiles(tcb); - if (ret != OK) + if (ret < OK) { errcode = -ret; goto errout_with_tcb; @@ -146,7 +146,7 @@ static int thread_create(const char *name, uint8_t ttype, int priority, #ifndef CONFIG_CUSTOM_STACK ret = up_create_stack((FAR struct tcb_s *)tcb, stack_size); - if (ret != OK) + if (ret < OK) { errcode = -ret; goto errout_with_tcb; @@ -184,7 +184,7 @@ static int thread_create(const char *name, uint8_t ttype, int priority, /* Activate the task */ ret = task_activate((FAR struct tcb_s *)tcb); - if (ret != OK) + if (ret < OK) { errcode = get_errno(); diff --git a/nuttx/sched/task_vfork.c b/nuttx/sched/task_vfork.c index 5ac368cbf..7008a016e 100644 --- a/nuttx/sched/task_vfork.c +++ b/nuttx/sched/task_vfork.c @@ -123,11 +123,21 @@ FAR struct task_tcb_s *task_vforksetup(start_t retaddr) return NULL; } + /* Allocate a new task group */ + +#ifdef HAVE_TASK_GROUP + ret = group_allocate(child); + if (ret < 0) + { + goto errout_with_tcb; + } +#endif + /* Associate file descriptors with the new task */ #if CONFIG_NFILE_DESCRIPTORS > 0 || CONFIG_NSOCKET_DESCRIPTORS > 0 ret = group_setuptaskfiles(child); - if (ret != OK) + if (ret < OK) { goto errout_with_tcb; } @@ -146,7 +156,7 @@ FAR struct task_tcb_s *task_vforksetup(start_t retaddr) svdbg("Child priority=%d start=%p\n", priority, retaddr); ret = task_schedsetup(child, priority, retaddr, parent->entry.main, TCB_FLAG_TTYPE_TASK); - if (ret != OK) + if (ret < OK) { goto errout_with_tcb; } @@ -228,6 +238,17 @@ pid_t task_vforkstart(FAR struct task_tcb_s *child) (void)task_argsetup(child, name, (FAR char * const *)NULL); + /* Now we have enough in place that we can join the group */ + +#ifdef HAVE_TASK_GROUP + ret = group_initialize(child); + if (ret < 0) + { + task_vforkabort(child, -ret); + return ERROR; + } +#endif + /* Get the assigned pid before we start the task */ pid = (int)child->cmn.pid; @@ -235,7 +256,7 @@ pid_t task_vforkstart(FAR struct task_tcb_s *child) /* Activate the task */ ret = task_activate((FAR struct tcb_s *)child); - if (ret != OK) + if (ret < OK) { task_vforkabort(child, -ret); return ERROR; |