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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-04-17 13:48:39 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-04-17 13:48:39 +0000 |
commit | 0951d2fa8ffc6d0dc4bdaf1db205f46128ce4337 (patch) | |
tree | 092e7994500c6350898c340952574fcc6627fcad | |
parent | 981a4d7fb34f82ba698d537f1bb50af81acf468e (diff) | |
download | px4-nuttx-0951d2fa8ffc6d0dc4bdaf1db205f46128ce4337.tar.gz px4-nuttx-0951d2fa8ffc6d0dc4bdaf1db205f46128ce4337.tar.bz2 px4-nuttx-0951d2fa8ffc6d0dc4bdaf1db205f46128ce4337.zip |
More Kconfig files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4624 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/arch/arm/Kconfig | 21 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_iwdg.c | 7 | ||||
-rw-r--r-- | nuttx/arch/hc/Kconfig | 22 | ||||
-rw-r--r-- | nuttx/arch/mips/Kconfig | 266 | ||||
-rwxr-xr-x | nuttx/configs/stm3240g-eval/README.txt | 2 | ||||
-rwxr-xr-x | nuttx/configs/stm32f4discovery/README.txt | 2 |
6 files changed, 316 insertions, 4 deletions
diff --git a/nuttx/arch/arm/Kconfig b/nuttx/arch/arm/Kconfig index 18288e21b..464726075 100644 --- a/nuttx/arch/arm/Kconfig +++ b/nuttx/arch/arm/Kconfig @@ -75,6 +75,27 @@ config ARCH_CHIP_STR71X endchoice +config ARCH_ARM7TDMI + bool + default y if ARCH_CHIP_C5471 || ARCH_CHIP_CALYPSO || ARCH_CHIP_LPC214X || ARCH_CHIP_LPC2378 || ARCH_CHIP_STR71X + +config ARCH_ARM926EJS + bool + default y if ARCH_CHIP_DM320 || ARCH_CHIP_LPC31XX + +config ARCH_ARM920T + bool + default y if ARCH_CHIP_IMX + +config ARCH_CORTEXM + bool + default y if ARCH_CHIP_KINETIS || ARCH_CHIP_LM3S || ARCH_CHIP_LPC17XX || ARCH_CHIP_SAM3U || ARCH_CHIP_STM32 + +config ARCH_FAMILY + string + default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T + default "armv7-m" if ARCH_CORTEXM + config ARCH string default "c5471" if ARCH_CHIP_C5471 diff --git a/nuttx/arch/arm/src/stm32/stm32_iwdg.c b/nuttx/arch/arm/src/stm32/stm32_iwdg.c index e7db53f91..fd51ba0fe 100644 --- a/nuttx/arch/arm/src/stm32/stm32_iwdg.c +++ b/nuttx/arch/arm/src/stm32/stm32_iwdg.c @@ -292,12 +292,15 @@ static inline void stm32_setprescaler(FAR struct stm32_lowerhalf_s *priv) stm32_putreg(IWDG_KR_KEY_ENABLE, STM32_IWDG_KR); - /* Wait for the PVU anrd RVU bit to be reset be hardware. These bits + /* Wait for the PVU and RVU bits to be reset be hardware. These bits * were set the last time that the PR register was written and may not * yet be cleared. + * + * If the setup is only permitted one time, then this wait should not + * be necessary. */ -#ifdef CONFIG_STM32_IWDG_DEFERREDSETUP +#ifndef CONFIG_STM32_IWDG_ONETIMESETUP while ((stm32_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU|IWDG_SR_RVU)) != 0); #endif diff --git a/nuttx/arch/hc/Kconfig b/nuttx/arch/hc/Kconfig index ae2bf3130..720c6ff0d 100644 --- a/nuttx/arch/hc/Kconfig +++ b/nuttx/arch/hc/Kconfig @@ -2,3 +2,25 @@ # For a description of the syntax of this configuration file, # see misc/tools/kconfig-language.txt. # + +if ARCH_HC +choice + prompt "HC chip selection" + default ARCH_CHIP_MCS92S12NEC64 + +config ARCH_CHIP_MCS92S12NEC64 + bool "MCS92S12NEC64" + ---help--- + Motorola/Freescale MCS92S12NEC64 (M9S12) + +endchoice + +config ARCH_HSC12 + bool + default y if ARCH_CHIP_MCS92S12NEC64 + +config ARCH_CHIP + string + default "m9s12" if ARCH_CHIP_MCS92S12NEC64 + +endif diff --git a/nuttx/arch/mips/Kconfig b/nuttx/arch/mips/Kconfig index ae2bf3130..fbe34ac39 100644 --- a/nuttx/arch/mips/Kconfig +++ b/nuttx/arch/mips/Kconfig @@ -2,3 +2,269 @@ # For a description of the syntax of this configuration file, # see misc/tools/kconfig-language.txt. # + +if ARCH_MIPS +choice + prompt "MIPS chip selection" + default ARCH_CHIP_PIC32MX460F512L + +config ARCH_CHIP_PIC32MX320F032H + bool "PIC32MX320F032H" + ---help--- + Microchip PIC32MX320F032H (MIPS32) + +config ARCH_CHIP_PIC32MX320F064H + bool "PIC32MX320F064H" + ---help--- + Microchip PIC32MX320F064H (MIPS32) + +config ARCH_CHIP_PIC32MX320F128H + bool "PIC32MX320F128H" + ---help--- + Microchip PIC32MX320F128H (MIPS32) + +config ARCH_CHIP_PIC32MX320F128L + bool "PIC32MX320F128L" + ---help--- + Microchip PIC32MX320F128L (MIPS32) + +config ARCH_CHIP_PIC32MX340F128H + bool "PIC32MX340F128H" + ---help--- + Microchip PIC32MX340F128H (MIPS32) + +config ARCH_CHIP_PIC32MX340F256H + bool "PIC32MX340F256H" + ---help--- + Microchip PIC32MX340F256H (MIPS32) + +config ARCH_CHIP_PIC32MX340F512H + bool "PIC32MX340F512H" + ---help--- + Microchip PIC32MX340F512H (MIPS32) + +config ARCH_CHIP_PIC32MX340F128L + bool "PIC32MX340F128L" + ---help--- + Microchip PIC32MX340F128L (MIPS32) + +config ARCH_CHIP_PIC32MX360F256L + bool "PIC32MX360F256L" + ---help--- + Microchip PIC32MX360F256L (MIPS32) + +config ARCH_CHIP_PIC32MX360F512L + bool "PIC32MX360F512L" + ---help--- + Microchip PIC32MX360F512L (MIPS32) + +config ARCH_CHIP_PIC32MX420F032H + bool "PIC32MX420F032H" + ---help--- + Microchip PIC32MX420F032H (MIPS32) + +config ARCH_CHIP_PIC32MX440F128H + bool "PIC32MX440F128H" + ---help--- + Microchip PIC32MX440F128H (MIPS32) + +config ARCH_CHIP_PIC32MX440F128L + bool "PIC32MX440F128L" + ---help--- + Microchip PIC32MX440F128L (MIPS32) + +config ARCH_CHIP_PIC32MX440F256H + bool "PIC32MX440F256H" + ---help--- + Microchip PIC32MX440F256H (MIPS32) + +config ARCH_CHIP_PIC32MX440F512H + bool "PIC32MX440F512H" + ---help--- + Microchip PIC32MX440F512H (MIPS32) + +config ARCH_CHIP_PIC32MX460F256L + bool "PIC32MX460F256L" + ---help--- + Microchip PIC32MX460F256L (MIPS32) + +config ARCH_CHIP_PIC32MX460F512L + bool "PIC32MX460F512L" + ---help--- + Microchip PIC32MX460F512L (MIPS32) + +config ARCH_CHIP_PIC32MX534F064H + bool "PIC32MX534F064H" + ---help--- + Microchip PIC32MX534F064H (MIPS32) + +config ARCH_CHIP_PIC32MX534F064L + bool "PIC32MX534F064L" + ---help--- + Microchip PIC32MX534F064L (MIPS32) + +config ARCH_CHIP_PIC32MX564F064H + bool "PIC32MX564F064H" + ---help--- + Microchip PIC32MX564F064H (MIPS32) + +config ARCH_CHIP_PIC32MX564F064L + bool "PIC32MX564F064L" + ---help--- + Microchip PIC32MX564F064L (MIPS32) + +config ARCH_CHIP_PIC32MX564F128H + bool "PIC32MX564F128H" + ---help--- + Microchip PIC32MX564F128H (MIPS32) + +config ARCH_CHIP_PIC32MX564F128L + bool "PIC32MX564F128L" + ---help--- + Microchip PIC32MX564F128L (MIPS32) + +config ARCH_CHIP_PIC32MX575F256H + bool "PIC32MX575F256H" + ---help--- + Microchip PIC32MX575F256H (MIPS32) + +config ARCH_CHIP_PIC32MX575F256L + bool "PIC32MX575F256L" + ---help--- + Microchip PIC32MX575F256L (MIPS32) + +config ARCH_CHIP_PIC32MX575F512H + bool "PIC32MX575F512H" + ---help--- + Microchip PIC32MX575F512H (MIPS32) + +config ARCH_CHIP_PIC32MX575F512L + bool "PIC32MX575F512L" + ---help--- + Microchip PIC32MX575F512L (MIPS32) + +config ARCH_CHIP_PIC32MX664F064H + bool "PIC32MX664F064H" + ---help--- + Microchip PIC32MX664F064H (MIPS32) + +config ARCH_CHIP_PIC32MX664F064L + bool "PIC32MX664F064L" + ---help--- + Microchip PIC32MX664F064L (MIPS32) + +config ARCH_CHIP_PIC32MX664F128H + bool "PIC32MX664F128H" + ---help--- + Microchip PIC32MX664F128H (MIPS32) + +config ARCH_CHIP_PIC32MX664F128L + bool "PIC32MX664F128L" + ---help--- + Microchip PIC32MX664F128L (MIPS32) + +config ARCH_CHIP_PIC32MX675F256H + bool "PIC32MX675F256H" + ---help--- + Microchip PIC32MX675F256H (MIPS32) + +config ARCH_CHIP_PIC32MX675F256L + bool "PIC32MX675F256L" + ---help--- + Microchip PIC32MX675F256L (MIPS32) + +config ARCH_CHIP_PIC32MX675F512H + bool "PIC32MX675F512H" + ---help--- + Microchip PIC32MX675F512H (MIPS32) + +config ARCH_CHIP_PIC32MX675F512L + bool "PIC32MX675F512L" + ---help--- + Microchip PIC32MX675F512L (MIPS32) + +config ARCH_CHIP_PIC32MX695F512H + bool "PIC32MX695F512H" + ---help--- + Microchip PIC32MX695F512H (MIPS32) + +config ARCH_CHIP_PIC32MX695F512L + bool "PIC32MX695F512L" + ---help--- + Microchip PIC32MX695F512L (MIPS32) + +config ARCH_CHIP_PIC32MX764F128H + bool "PIC32MX764F128H" + ---help--- + Microchip PIC32MX764F128H (MIPS32) + +config ARCH_CHIP_PIC32MX764F128L + bool "PIC32MX764F128L" + ---help--- + Microchip PIC32MX764F128L (MIPS32) + +config ARCH_CHIP_PIC32MX775F256H + bool "PIC32MX775F256H" + ---help--- + Microchip PIC32MX775F256H (MIPS32) + +config ARCH_CHIP_PIC32MX775F256L + bool "PIC32MX775F256L" + ---help--- + Microchip PIC32MX775F256L (MIPS32) + +config ARCH_CHIP_PIC32MX775F512H + bool "PIC32MX775F512H" + ---help--- + Microchip PIC32MX775F512H (MIPS32) + +config ARCH_CHIP_PIC32MX775F512L + bool "PIC32MX775F512L" + ---help--- + Microchip PIC32MX775F512L (MIPS32) + +config ARCH_CHIP_PIC32MX795F512H + bool "PIC32MX795F512H" + ---help--- + Microchip PIC32MX795F512H (MIPS32) + +config ARCH_CHIP_PIC32MX795F512L + bool "PIC32MX795F512L" + ---help--- + Microchip PIC32MX795F512L (MIPS32) + +endchoice + +config ARCH_CHIP_PIM32MX3 + bool + default y if ARCH_CHIP_PIC32MX320F032H || ARCH_CHIP_PIC32MX320F064H || ARCH_CHIP_PIC32MX320F128H || ARCH_CHIP_PIC32MX320F128L || ARCH_CHIP_PIC32MX340F128H || ARCH_CHIP_PIC32MX340F256H || ARCH_CHIP_PIC32MX340F512H || ARCH_CHIP_PIC32MX340F128L || ARCH_CHIP_PIC32MX360F256L || ARCH_CHIP_PIC32MX360F512L + +config ARCH_CHIP_PIM32MX4 + bool + default y if ARCH_CHIP_PIC32MX420F032H || ARCH_CHIP_PIC32MX440F128H || ARCH_CHIP_PIC32MX440F128L || ARCH_CHIP_PIC32MX440F256H || ARCH_CHIP_PIC32MX440F512H || ARCH_CHIP_PIC32MX460F256L || ARCH_CHIP_PIC32MX460F512L + +config ARCH_CHIP_PIM32MX5 + bool + default y if ARCH_CHIP_PIC32MX534F064H || ARCH_CHIP_PIC32MX534F064L || ARCH_CHIP_PIC32MX564F064H || ARCH_CHIP_PIC32MX564F064L || ARCH_CHIP_PIC32MX564F128H || ARCH_CHIP_PIC32MX564F128L || ARCH_CHIP_PIC32MX575F256H || ARCH_CHIP_PIC32MX575F256L || ARCH_CHIP_PIC32MX575F512H || ARCH_CHIP_PIC32MX575F512L + +config ARCH_CHIP_PIM32MX6 + bool + default y if ARCH_CHIP_PIC32MX664F064H || ARCH_CHIP_PIC32MX664F064L || ARCH_CHIP_PIC32MX664F128H || ARCH_CHIP_PIC32MX664F128L || ARCH_CHIP_PIC32MX675F256H || ARCH_CHIP_PIC32MX675F256L || ARCH_CHIP_PIC32MX675F512H || ARCH_CHIP_PIC32MX675F512L || ARCH_CHIP_PIC32MX695F512H || ARCH_CHIP_PIC32MX695F512L + +config ARCH_CHIP_PIM32MX7 + bool + default y if ARCH_CHIP_PIC32MX764F128H || ARCH_CHIP_PIC32MX764F128L || ARCH_CHIP_PIC32MX775F256H || ARCH_CHIP_PIC32MX775F256L || ARCH_CHIP_PIC32MX775F512H || ARCH_CHIP_PIC32MX775F512L || ARCH_CHIP_PIC32MX795F512H || ARCH_CHIP_PIC32MX795F512L + +config ARCH_MIPS32 + bool + default y if ARCH_CHIP_PIM32MX3 || ARCH_CHIP_PIM32MX4 || ARCH_CHIP_PIM32MX5 || ARCH_CHIP_PIM32MX6 || ARCH_CHIP_PIM32MX7 + +config ARCH_FAMILY + string + default "mips32" if ARCH_MIPS32 + +config ARCH_CHIP + string + default "pic32mx" if ARCH_CHIP_PIM32MX3 || ARCH_CHIP_PIM32MX4 || ARCH_CHIP_PIM32MX5 || ARCH_CHIP_PIM32MX6 || ARCH_CHIP_PIM32MX7 + +endif diff --git a/nuttx/configs/stm3240g-eval/README.txt b/nuttx/configs/stm3240g-eval/README.txt index 1db2f8858..b93ee07ef 100755 --- a/nuttx/configs/stm3240g-eval/README.txt +++ b/nuttx/configs/stm3240g-eval/README.txt @@ -902,7 +902,7 @@ Where <subdir> is one of the following: CONFIG_DISABLE_POLL=n 7. This example supports the watchdog timer test (apps/examples/watchdog) - buty this must be manually enabled by selecting: + but this must be manually enabled by selecting: CONFIG_WATCHDOG=y : Enables watchdog timer driver support CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR diff --git a/nuttx/configs/stm32f4discovery/README.txt b/nuttx/configs/stm32f4discovery/README.txt index 0aef026fd..7c5f8ffd8 100755 --- a/nuttx/configs/stm32f4discovery/README.txt +++ b/nuttx/configs/stm32f4discovery/README.txt @@ -838,7 +838,7 @@ Where <subdir> is one of the following: CONFIG_DEBUG_QENCODER 3. This example supports the watchdog timer test (apps/examples/watchdog) - buty this must be manually enabled by selecting: + but this must be manually enabled by selecting: CONFIG_WATCHDOG=y : Enables watchdog timer driver support CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR |