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author | Gregory Nutt <gnutt@nuttx.org> | 2013-10-10 12:00:32 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-10-10 12:00:32 -0600 |
commit | 76ed6352fb940dd04e83b757d837dd5764a98c1c (patch) | |
tree | dea34bccaad24703f79a6342fc11efb95fb3acbf | |
parent | 844056ce23e01088ea482b8bc5dcbb5b021ffcf9 (diff) | |
download | px4-nuttx-76ed6352fb940dd04e83b757d837dd5764a98c1c.tar.gz px4-nuttx-76ed6352fb940dd04e83b757d837dd5764a98c1c.tar.bz2 px4-nuttx-76ed6352fb940dd04e83b757d837dd5764a98c1c.zip |
SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing
-rw-r--r-- | nuttx/arch/arm/src/sama5/Kconfig | 114 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sama5/chip/sama5d3x_memorymap.h | 12 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sama5/sam_allocateheap.c | 69 |
3 files changed, 157 insertions, 38 deletions
diff --git a/nuttx/arch/arm/src/sama5/Kconfig b/nuttx/arch/arm/src/sama5/Kconfig index f23a2d362..aa55042d7 100644 --- a/nuttx/arch/arm/src/sama5/Kconfig +++ b/nuttx/arch/arm/src/sama5/Kconfig @@ -332,12 +332,29 @@ choice config SAMA5_LCDC_FBALLOCATED bool "Allocate from heap" + ---help--- + Allocate frame buffers and layer DMA descriptors from the heap. + + WARNING: This data cannot reside in internal SRAM; LCDC DMA only + works with DDR2 and CS0-3. config SAMA5_LCDC_FBFIXED bool "Fixed allocation outside the heap" + ---help--- + Allocate frame buffers and DMA descriptors at a fixe address outside + of either the heap or .bss lying at this address. + + WARNING: This data cannot reside in internal SRAM; LCDC DMA only + works with DDR2 and CS0-3. config SAMA5_LCDC_FBPREALLOCATED bool "Pre-allocated in .bss" + ---help--- + Allocate frame buffers and layer DMA descriptors as normal global + variables that will be positioned in .bss. + + WARNING: This data cannot reside in internal SRAM; LCDC DMA only + works with DDR2 and CS0-3. endchoice # Frame buffer allocatin strategy @@ -2325,8 +2342,26 @@ config SAMA5_DDRCS_HEAP In this case, the remaining SDRAM will automatically be added to the heap (using RAM_END) +if SAMA5_DDRCS_HEAP +config SAMA5_DDRCS_HEAP_OFFSET + int "DDR-SDRAM offset" + default 0 + ---help--- + Preserve this number of bytes at the beginning of SDRAM. The + portion of DRAM beginning at this offset from the DDRCS base will + be added to the heap. + +config SAMA5_DDRCS_HEAP_SIZE + int "DDR-SDRAM size" + default 0 + ---help--- + Add the region of DDR-SDRAM beginning at SAMA5_DDRCS_HEAP_OFFSET + and of size SAMA5_DDRCS_HEAP_SIZE to the heap. + +endif #SAMA5_DDRCS_HEAP + config SAMA5_EBICS0_HEAP - bool "Include SRAM/PSRAM in heap" + bool "Include EBICS0 SRAM/PSRAM in heap" default y depends on (SAMA5_EBICS0_SRAM || SAMA5_EBICS0_PSRAM) && !SAMA5_BOOT_CS0SRAM ---help--- @@ -2339,8 +2374,26 @@ config SAMA5_EBICS0_HEAP In this case, the remaining SRAM will automatically be added to the heap (using RAM_END). +if SAMA5_EBICS0_HEAP +config SAMA5_EBICS0_HEAP_OFFSET + int "EBICS0 RAM offset" + default 0 + ---help--- + Preserve this number of bytes at the beginning of RAM. The + portion of RAM beginning at this offset from the EBICS0 base will + be added to the heap. + +config SAMA5_EBICS0_HEAP_SIZE + int "EBICS0 RAM size" + default 0 + ---help--- + Add the region of RAM beginning at SAMA5_EBICS0_HEAP_OFFSET + and of size SAMA5_EBICS0_HEAP_SIZE to the heap. + +endif #SAMA5_EBICS0_HEAP + config SAMA5_EBICS1_HEAP - bool "Include SRAM/PSRAM in heap" + bool "Include EBICS1 SRAM/PSRAM in heap" default y depends on (SAMA5_EBICS1_SRAM || SAMA5_EBICS1_PSRAM) && !SAMA5_BOOT_CS1SRAM ---help--- @@ -2353,8 +2406,26 @@ config SAMA5_EBICS1_HEAP In this case, the remaining SRAM will automatically be added to the heap (using RAM_END). +if SAMA5_EBICS1_HEAP +config SAMA5_EBICS1_HEAP_OFFSET + int "EBICS1 RAM offset" + default 0 + ---help--- + Preserve this number of bytes at the beginning of RAM. The + portion of DRAM beginning at this offset from the EBICS1 base will + be added to the heap. + +config SAMA5_EBICS1_HEAP_SIZE + int "EBICS1 RAM size" + default 0 + ---help--- + Add the region of RAM beginning at SAMA5_EBICS1_HEAP_OFFSET + and of size SAMA5_EBICS1_HEAP_SIZE to the heap. + +endif #SAMA5_EBICS1_HEAP + config SAMA5_EBICS2_HEAP - bool "Include SRAM/PSRAM in heap" + bool "Include EBICS2 SRAM/PSRAM in heap" default y depends on (SAMA5_EBICS2_SRAM || SAMA5_EBICS2_PSRAM) && !SAMA5_BOOT_CS2SRAM ---help--- @@ -2367,8 +2438,26 @@ config SAMA5_EBICS2_HEAP In this case, the remaining SRAM will automatically be added to the heap (using RAM_END). +if SAMA5_EBICS2_HEAP +config SAMA5_EBICS2_HEAP_OFFSET + int "EBICS2 RAM offset" + default 0 + ---help--- + Preserve this number of bytes at the beginning of RAM. The + portion of DRAM beginning at this offset from the EBICS2 base will + be added to the heap. + +config SAMA5_EBICS2_HEAP_SIZE + int "EBICS2 RAM size" + default 0 + ---help--- + Add the region of RAM beginning at SAMA5_EBICS2_HEAP_OFFSET + and of size SAMA5_EBICS2_HEAP_SIZE to the heap. + +endif #SAMA5_EBICS2_HEAP + config SAMA5_EBICS3_HEAP - bool "Include SRAM/PSRAM in heap" + bool "Include EBICS3 SRAM/PSRAM in heap" default y depends on (SAMA5_EBICS3_SRAM || SAMA5_EBICS3_PSRAM) && !SAMA5_BOOT_CS3SRAM ---help--- @@ -2378,5 +2467,22 @@ config SAMA5_EBICS3_HEAP In this case, the remaining SRAM will automatically be added to the heap (using RAM_END). +if SAMA5_EBICS3_HEAP +config SAMA5_EBICS3_HEAP_OFFSET + int "EBICS3 RAM offset" + default 0 + ---help--- + Preserve this number of bytes at the beginning of RAM. The + portion of DRAM beginning at this offset from the EBICS3 base will + be added to the heap. + +config SAMA5_EBICS3_HEAP_SIZE + int "EBICS3 RAM size" + default 0 + ---help--- + Add the region of RAM beginning at SAMA5_EBICS3_HEAP_OFFSET + and of size SAMA5_EBICS3_HEAP_SIZE to the heap. + +endif #SAMA5_EBICS3_HEAP endmenu # Heap Configuration endif # ARCH_CHIP_SAMA5 diff --git a/nuttx/arch/arm/src/sama5/chip/sama5d3x_memorymap.h b/nuttx/arch/arm/src/sama5/chip/sama5d3x_memorymap.h index db1f82939..9a20f0329 100644 --- a/nuttx/arch/arm/src/sama5/chip/sama5d3x_memorymap.h +++ b/nuttx/arch/arm/src/sama5/chip/sama5d3x_memorymap.h @@ -204,6 +204,18 @@ #define SAMA5_EBICS2_SIZE MKULONG(CONFIG_SAMA5_EBICS2_SIZE) #define SAMA5_EBICS3_SIZE MKULONG(CONFIG_SAMA5_EBICS3_SIZE) +#define SAMA5_EBICS0_HEAP_OFFSET MKULONG(CONFIG_SAMA5_EBICS0_HEAP_OFFSET) +#define SAMA5_DDRCS_HEAP_OFFSET MKULONG(CONFIG_SAMA5_DDRCS_HEAP_OFFSET) +#define SAMA5_EBICS1_HEAP_OFFSET MKULONG(CONFIG_SAMA5_EBICS1_HEAP_OFFSET) +#define SAMA5_EBICS2_HEAP_OFFSET MKULONG(CONFIG_SAMA5_EBICS2_HEAP_OFFSET) +#define SAMA5_EBICS3_HEAP_OFFSET MKULONG(CONFIG_SAMA5_EBICS3_HEAP_OFFSET) + +#define SAMA5_EBICS0_HEAP_SIZE MKULONG(CONFIG_SAMA5_EBICS0_HEAP_SIZE) +#define SAMA5_DDRCS_HEAP_SIZE MKULONG(CONFIG_SAMA5_DDRCS_HEAP_SIZE) +#define SAMA5_EBICS1_HEAP_SIZE MKULONG(CONFIG_SAMA5_EBICS1_HEAP_SIZE) +#define SAMA5_EBICS2_HEAP_SIZE MKULONG(CONFIG_SAMA5_EBICS2_HEAP_SIZE) +#define SAMA5_EBICS3_HEAP_SIZE MKULONG(CONFIG_SAMA5_EBICS3_HEAP_SIZE) + /* Convert size in bytes to number of sections (in Mb). */ #define _NSECTIONS(b) (((b)+0x000fffff) >> 20) diff --git a/nuttx/arch/arm/src/sama5/sam_allocateheap.c b/nuttx/arch/arm/src/sama5/sam_allocateheap.c index fda2b7951..af11d3aae 100644 --- a/nuttx/arch/arm/src/sama5/sam_allocateheap.c +++ b/nuttx/arch/arm/src/sama5/sam_allocateheap.c @@ -273,40 +273,41 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) void up_addregion(void) { int nregions = CONFIG_MM_REGIONS - 1; + uintptr_t vaddr; size_t size; #ifdef CONFIG_SAMA5_ISRAM_HEAP - size = SAM_ISRAM0_SIZE + SAM_ISRAM1_SIZE; + vaddr = (uintptr_t)SAM_ISRAM0_VADDR + size = SAM_ISRAM0_SIZE + SAM_ISRAM1_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) /* Allow user-mode access to the ISRAM heap */ - sam_uheap((uintptr_t)SAM_ISRAM0_VADDR, size); + sam_uheap(vaddr, size); #endif /* Add the ISRAM user heap region. */ - kumm_addregion((FAR void*)SAM_ISRAM0_VADDR, size); - + kumm_addregion((void *)vaddr, size); nregions--; #endif #ifdef CONFIG_SAMA5_DDRCS_HEAP if (nregions > 0) { - size = SAMA5_DDRCS_SIZE; + vaddr = (uintptr_t)SAM_DDRCS_VSECTION + SAMA5_DDRCS_HEAP_OFFSET; + size = SAMA5_DDRCS_HEAP_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) - /* Allow user-mode access to the ISRAM heap */ + /* Allow user-mode access to the DDR-SDRAM heap */ - sam_uheap((uintptr_t)SAM_DDRCS_VSECTION, size); + sam_uheap(vaddr, size); #endif - /* Add the ISRAM user heap region. */ - - kumm_addregion((FAR void*)SAM_DDRCS_VSECTION, size); + /* Add the DDR-SDRAM user heap region. */ + kumm_addregion((void *)vaddr, size); nregions--; } else @@ -320,18 +321,18 @@ void up_addregion(void) #ifdef SAMA5_EBICS0_HEAP if (nregions > 0) { - size = SAMA5_EBICS0_SIZE; + vaddr = (uintptr_t)SAM_EBICS0_VSECTION + SAMA5_EBICS0_HEAP_OFFSET; + size = SAMA5_EBICS0_HEAP_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) - /* Allow user-mode access to the ISRAM heap */ + /* Allow user-mode access to the EBICS0 heap */ - sam_uheap((uintptr_t)SAM_EBICS0_VSECTION, size); + sam_uheap(vaddr, size); #endif - /* Add the ISRAM user heap region. */ - - kumm_addregion((FAR void*)SAM_EBICS0_VSECTION, size); + /* Add the EBICS0 user heap region. */ + kumm_addregion((void *)vaddr, size); nregions--; } else @@ -345,18 +346,18 @@ void up_addregion(void) #ifdef SAMA5_EBICS1_HEAP if (nregions > 0) { - size = SAMA5_EBICS1_SIZE; + vaddr = (uintptr_t)SAM_EBICS1_VSECTION + SAMA5_EBICS1_HEAP_OFFSET; + size = SAMA5_EBICS1_HEAP_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) - /* Allow user-mode access to the ISRAM heap */ + /* Allow user-mode access to the EBICS1 heap */ - sam_uheap((uintptr_t)SAM_EBICS1_VSECTION, size); + sam_uheap(vaddr, size); #endif - /* Add the ISRAM user heap region. */ - - kumm_addregion((FAR void*)SAM_EBICS1_VSECTION, size); + /* Add the EBICS1 user heap region. */ + kumm_addregion((void *)vaddr, size); nregions--; } else @@ -370,18 +371,18 @@ void up_addregion(void) #ifdef SAMA5_EBICS2_HEAP if (nregions > 0) { - size = SAMA5_EBICS2_SIZE; + vaddr = (uintptr_t)SAM_EBICS2_VSECTION + SAMA5_EBICS2_HEAP_OFFSET; + size = SAMA5_EBICS2_HEAP_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) - /* Allow user-mode access to the ISRAM heap */ + /* Allow user-mode access to the EBICS2 heap */ - sam_uheap((uintptr_t)SAM_EBICS2_VSECTION, size); + sam_uheap(vaddr, size); #endif - /* Add the ISRAM user heap region. */ - - kumm_addregion((FAR void*)SAM_EBICS2_VSECTION, size); + /* Add the EBICS2 user heap region. */ + kumm_addregion((void *)vaddr, size); nregions--; } else @@ -395,18 +396,18 @@ void up_addregion(void) #ifdef SAMA5_EBICS3_HEAP if (nregions > 0) { - size = SAMA5_EBICS3_SIZE; + vaddr = (uintptr_t)SAM_EBICS3_VSECTION + SAMA5_EBICS3_HEAP_OFFSET; + size = SAMA5_EBICS3_HEAP_SIZE; #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) - /* Allow user-mode access to the ISRAM heap */ + /* Allow user-mode access to the EBICS3 heap */ - sam_uheap((uintptr_t)SAM_EBICS3_VSECTION, size); + sam_uheap(vaddr, size); #endif - /* Add the ISRAM user heap region. */ - - kumm_addregion((FAR void*)SAM_EBICS3_VSECTION, size); + /* Add the EBICS3 user heap region. */ + kumm_addregion(vaddr, size); nregions--; } else |