SAM4S: Add macros to manage peripheral clocks

9 files changed, 306 insertions, 57 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 51f09b4e9..72bd995be 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -4949,4 +4949,6 @@
 	  peripheral Kconfig (2013-6-11).
 	* arch/arm/src/sam34/chip/sam4s_pinmap.h:  Add SAM4S pin configuration
 	  definitinos (2013-6-11).
+	* arch/arm/src/sam34/sam4s_periphclks.h:  Add macros to manage SAM4S
+	  peripheral clocks (2013-6-11).
 
diff --git a/nuttx/Documentation/NuttxPortingGuide.html b/nuttx/Documentation/NuttxPortingGuide.html
index 845f4e5d5..236215fff 100644
--- a/nuttx/Documentation/NuttxPortingGuide.html
+++ b/nuttx/Documentation/NuttxPortingGuide.html
@@ -12,7 +12,7 @@
       <h1><big><font color="#3c34ec">
         <i>NuttX RTOS Porting Guide</i>
       </font></big></h1>
-      <p>Last Updated: March 20, 2013</p>
+      <p>Last Updated: June 11, 2013</p>
     </td>
   </tr>
 </table>
@@ -46,7 +46,8 @@
         <a href="#boardlogic">2.4.2.1 Board Specific Logic</a><br>
         <a href="#boardconfigsubdirs">2.4.2.2 Board Specific Configuration Sub-Directories</a>
       </ul>
-      <a href="#supportedboards">2.4.3 Supported Boards</a>
+      <a href="#supportedboards">2.4.3 Supported Boards</a><br>
+      <a href="#newboardconfig">2.4.4 Adding a New Board Configuration</a>
     </ul>
     <a href="#DirStructDrivers">2.5 nuttx/drivers/</a><br>
     <a href="#DirStructFs">2.6 nuttx/fs/</a><br>
@@ -795,13 +796,13 @@
   </li>
 
   <li><code>configs/ea3131</code>:
-    Embedded Artists EA3131 Development bard.  This board is based on the 
+    Embedded Artists EA3131 Development bard.  This board is based on the
     an NXP LPC3131 MCU. This OS is built with the arm-nuttx-elf toolchain.
     STATUS:  This port is complete and mature.
   </li>
 
   <li><code>configs/eagle100</code>:
-    Micromint Eagle-100 Development board.  This board is based on the 
+    Micromint Eagle-100 Development board.  This board is based on the
     an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the
     arm-nuttx-elf toolchain.  STATUS:  This port is complete and mature.
   </li>
@@ -819,7 +820,7 @@
   </li>
 
   <li><code>configs/lm3s6965-ek</code>:
-    Stellaris LM3S6965 Evaluation Kit.  This board is based on the 
+    Stellaris LM3S6965 Evaluation Kit.  This board is based on the
     an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the
     arm-nuttx-elf toolchain.  STATUS:  This port is complete and mature.
   </li>
@@ -926,7 +927,7 @@
   </li>
 
   <li><code>configs/rgmp</code>:
-    RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project for 
+    RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project for
     running GPOS and RTOS simultaneously on multi-processor platforms. You can
     port your favorite RTOS to RGMP together with an unmodified Linux to form a
     hybrid operating system. This makes your application able to use both RTOS
@@ -978,7 +979,7 @@
 
   <li><code>configs/xtrs</code>:
     TRS80 Model 3.  This port uses a vintage computer based on the Z80.
-    An emulator for this computer is available to run TRS80 programs on a 
+    An emulator for this computer is available to run TRS80 programs on a
     Linux platform (http://www.tim-mann.org/xtrs.html).
   </li>
 
@@ -1021,6 +1022,84 @@
   is available to build these toolchains under Linux or Cygwin.
 </blockquote></small></p>
 
+<h3><a name="newboardconfig">2.4.4 Adding a New Board Configuration</a></h3>
+<p>
+  Okay, so you have created a new board configuration directory.
+  Now, how do you hook this board into the configuration system so that you can select with <code>make menuconfig</code>?
+</p>
+<p>
+  You will need modify the file <code>configs/Kconfig</code>.
+  Let's look at the STM32F4-Discovery configuration in the <code>Kconfig</code> file and see how we would add a new board directory to the configuration.
+  For this configuration let's say that you new board resides in the directory <code>configs/myboard</code>;
+  It uses an MCU selected with <code>CONFIG_ARCH_CHIP_MYMCU</code>; and you want the board to be selected with <code>CONFIG_ARCH_BOARD_MYBOARD</code>.
+  Then here is how you can clone the STM32F4-Discovery configuration in <code>configs/Kconfig</code> to support your new board configuration.
+</p>
+<p>
+  In <code>configs/Kconfig</code> for the stm32f4-discovery, you will see a configuration definition like this:
+<p>
+<ul><pre>
+config ARCH_BOARD_STM32F4_DISCOVERY
+    bool "STMicro STM32F4-Discovery board"
+    depends on ARCH_CHIP_STM32F407VG
+    select ARCH_HAVE_LEDS
+    select ARCH_HAVE_BUTTONS
+    select ARCH_HAVE_IRQBUTTONS
+    ---help---
+        STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU.
+</pre></ul>
+<p>
+  The above selects the STM32F4-Discovery board.
+  The <code>select</code> lines say that the board has both LEDs and buttons and that the board can generate interrupts from the button presses.
+  You can just copy the above configuration definition to a new location (notice that they the configurations are in alphabetical order).
+  Then you should edit the configuration to support your board.
+  The final configuration definition might look something like:
+</p>
+<ul><pre>
+config ARCH_BOARD_MYBOARD
+    bool "My very own board configuration"
+    depends on ARCH_CHIP_MYMCU
+    select ARCH_HAVE_LEDS
+    select ARCH_HAVE_BUTTONS
+    select ARCH_HAVE_IRQBUTTONS
+    ---help---
+        This options selects the board configuration for my very own board
+        based on the MYMCU processor.
+</pre></ul>
+<p>
+  Later in the <code>configs/Kconfig</code> file, you will see a long, long string configuration with lots of defaults like this:
+</p>
+<ul><pre>
+config ARCH_BOARD
+    string
+    default "amber"               if ARCH_BOARD_AMBER
+    default "avr32dev1"           if ARCH_BOARD_AVR32DEV1
+    default "c5471evm"            if ARCH_BOARD_C5471EVM
+...
+    default "stm32f4discovery"    if ARCH_BOARD_STM32F4_DISCOVERY
+...
+</pre></ul>
+<p>
+  This logic will assign string value to a configuration variable called <code>CONFIG_ARCH_BOARD</code> that will name the directory where the board-specific files reside.
+  In our case, these files reside in <code>configs/myboard</code> and we add the following to the long list of defaults (again in alphabetical order):
+</p>
+<ul><pre>
+    default "myboar"              if ARCH_BOARD_MYBOARD
+</pre></ul>
+<p>
+  Now the build system knows where to find your board configuration!
+</p>
+<p>
+  And finally, add something like this near the bottom of <code>configs/myboard</code>:
+</p>
+<ul><pre>
+if ARCH_BOARD_MYBOARD
+source "configs/myboard/Kconfig"
+endif
+</pre></ul>
+<p>
+  This includes additional, board-specific configuration variabled defintion in <code>configs/myboard/Kconfig</code>.
+</p>
+
 <h2>2.5 <a name="DirStructDrivers">nuttx/drivers</a></h2>
 
 <p>
@@ -1078,7 +1157,7 @@ drivers/
 |   |-- Kconfig
 |   |-- Make.defs
 |   `-- <i>(Common USB host driver source files)</i>
-|-- wirelss/
+|-- wireless/
 |   |-- Kconfig
 |   |-- Make.defs
 |   `-- <i>(Common wireless driver source files)</i>
@@ -1666,7 +1745,7 @@ The system can be re-made subsequently by just typing <code>make</code>.
 </ul>
 
 <h3><a name="upusestack">4.1.5 <code>up_use_stack()</code></a></h3>
-<p><b>Prototype</b>: 
+<p><b>Prototype</b>:
   <code>STATUS up_use_stack(FAR struct tcb_s *tcb, FAR void *stack, size_t stack_size);</code>
 </p>
 
@@ -1864,7 +1943,7 @@ The system can be re-made subsequently by just typing <code>make</code>.
 
 <p><b>Description</b>.
   Called when the priority of a running or
-  ready-to-run task changes and the reprioritization will 
+  ready-to-run task changes and the reprioritization will
   cause a context switch.  Two cases:
 </p>
 <ol>
@@ -2146,7 +2225,7 @@ else
 <p>
 <ul><dl>
   <dt><code>CONFIG_RTC</code>
-  <dd>Enables general support for a hardware RTC. 
+  <dd>Enables general support for a hardware RTC.
       Specific architectures may require other specific settings.
   <dt><code>CONFIG_RTC_DATETIME</code>
   <dd>There are two general types of RTC:  (1) A simple battery backed counter that keeps the time when power
@@ -2164,7 +2243,7 @@ else
   <dd>If <code>CONFIG_RTC_HIRES</code> is defined, then the frequency of the high resolution RTC must be provided.
       If <code>CONFIG_RTC_HIRES</code> is not defined, <code>CONFIG_RTC_FREQUENCY</code> is assumed to be one.
   <dt><code>CONFIG_RTC_ALARM</code>
-  <dd>Enable if the RTC hardware supports setting of an alarm. 
+  <dd>Enable if the RTC hardware supports setting of an alarm.
     A callback function will be executed when the alarm goes off
 </dl></ul>
 <p>
@@ -2175,13 +2254,13 @@ else
      Initialize the hardware RTC per the selected configuration.
      This function is called once during the OS initialization sequence
   </li>
-  <li><code>up_rtc_time()</code>. 
+  <li><code>up_rtc_time()</code>.
     Get the current time in seconds.  This is similar to the standard <code>time()</code> function.
     This interface is only required if the low-resolution RTC/counter hardware implementation selected.
     It is only used by the RTOS during intialization to set up the system time when <code>CONFIG_RTC</code> is set
     but neither <code>CONFIG_RTC_HIRES</code> nor <code>CONFIG_RTC_DATETIME</code> are set.
   </li>
-  <li><code>up_rtc_gettime()</code>. 
+  <li><code>up_rtc_gettime()</code>.
     Get the current time from the high resolution RTC clock/counter.
     This interface is only supported by the hight-resolution RTC/counter hardware implementation.
     It is used to replace the system timer (<code>g_system_tick</code>).
@@ -2250,11 +2329,11 @@ else
         Returns the virtual base address of the address environment.
       </li>
       <li>
-        <a href="#up_addrenv_select">4.1.22.3 <code>up_addrenv_select()</code></a>: 
+        <a href="#up_addrenv_select">4.1.22.3 <code>up_addrenv_select()</code></a>:
         Instantiate an address environment.
       </li>
       <li>
-        <a href="#up_addrenv_restore">4.1.22.4 <code>up_addrenv_restore()</code></a>: 
+        <a href="#up_addrenv_restore">4.1.22.4 <code>up_addrenv_restore()</code></a>:
         Restore an address environment.
       </li>
       <li>
@@ -2315,7 +2394,7 @@ else
 </ul>
 <p><b>Description</b>:</p>
 <ul>
-  Return the virtual address associated with the newly create address environment. 
+  Return the virtual address associated with the newly create address environment.
   This function is used by the binary loaders in order get an address that can be used to initialize the new task.
 </ul>
 <p><b>Input Parameters</b>:</p>
@@ -2531,9 +2610,9 @@ else
 <h3><a name="leddefinitions">4.3.2 LED Definitions</a></h3>
 
 <p>
-   The implementation of LED support is very specific to a board architecture. 
-   Some boards have several LEDS, others have only one or two. 
-   Some have none. 
+   The implementation of LED support is very specific to a board architecture.
+   Some boards have several LEDS, others have only one or two.
+   Some have none.
    Others LED matrices and show alphanumeric data, etc.
    The NuttX logic does not refer to specific LEDS, rather, it refers to an event to be shown on the LEDS
    in whatever manner is appropriate for the board;
@@ -2705,7 +2784,7 @@ extern void up_ledoff(int led);
   </ul>
   These different device driver types are discussed in the following paragraphs.
   Note: device driver support requires that the <i>in-memory</i>, <i>pseudo</i> file system
-  is enabled by setting the CONFIG_NFILE_DESCRIPTORS in the NuttX configuration file to a 
+  is enabled by setting the CONFIG_NFILE_DESCRIPTORS in the NuttX configuration file to a
   non-zero value.
 </p>
 
@@ -3451,7 +3530,7 @@ extern void up_ledoff(int led);
           <p>
             As part of its operation during the binding operation, the USB host class driver will register an instances of a standard NuttX driver under the <code>/dev</code> directory.
             To repeat the above example, the USB host mass storage class driver (<code>drivers/usbhost/usbhost_storage.c</code>) will register a standard, NuttX block driver interface (like <code>/dev/sda</code>)
-            that can be used to mount a file system just as with any other other block driver instance. 
+            that can be used to mount a file system just as with any other other block driver instance.
           </p>
           <p>
             <b>Examples</b>:
@@ -3487,7 +3566,7 @@ extern void up_ledoff(int led);
     </p>
     <p>
       <b>Examples</b>:
-      <code>arch/arm/src/dm320/dm320_usbdev.c</code>, <code>arch/arm/src/lpc17xx/lpc17_usbdev.c</code>, 
+      <code>arch/arm/src/dm320/dm320_usbdev.c</code>, <code>arch/arm/src/lpc17xx/lpc17_usbdev.c</code>,
       <code>arch/arm/src/lpc214x/lpc214x_usbdev.c</code>, <code>arch/arm/src/lpc313x/lpc313x_usbdev.c</code>, and
        <code>arch/arm/src/stm32/stm32_usbdev.c</code>.
     </p>
@@ -3914,11 +3993,11 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta
             <code>stream</code>:  An instance of <code>lib_instream_s</code> to perform the actual low-level get operation.
           </li>
           <li>
-            <code>pch</code>:  The location to save the returned value. 
+            <code>pch</code>:  The location to save the returned value.
             This may be either a normal, character code or a special command (i.e., a value from <code>enum kbd_getstate_s</code>.
           </li>
           <li>
-            <code>state</code>:  A user provided buffer to support parsing. 
+            <code>state</code>:  A user provided buffer to support parsing.
             This structure should be cleared the first time that <code>kbd_decode()</code> is called.
           </li>
         </ul>
@@ -3989,12 +4068,12 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta
 <ul>
   <li>
     <p>
-      Reports of relevant driver or other system activity. 
+      Reports of relevant driver or other system activity.
     </p>
   </li>
   <li>
     <p>
-      Registration and callback mechanism to interface with individual device drivers. 
+      Registration and callback mechanism to interface with individual device drivers.
     </p>
   </li>
   <li>
@@ -4192,7 +4271,7 @@ int (*prepare)(FAR struct pm_callback_s *cb, enum pm_state_e pmstate);
    Zero (<code>OK</code>) means the event was successfully processed and that the driver is prepared for the PM state change.
    Non-zero means that the driver is not prepared to perform the tasks needed achieve this power setting and will cause the state change to be aborted.
    NOTE:  The <code>prepare()</code> method will also be called when reverting from lower back to higher power consumption modes (say because another driver refused a lower power state change).
-   Drivers are not permitted to return non-zero values when reverting back to higher power 
+   Drivers are not permitted to return non-zero values when reverting back to higher power
    consumption modes!
 </p>
 
@@ -4391,7 +4470,7 @@ build
   If the 2 pass build option is selected, then these options configure the make system build a extra link object.
   This link object is assumed to be an incremental (relative) link object, but could be a static library (archive)
   (some modification to this Makefile would be required if CONFIG_PASS1_TARGET generates an archive).
-  Pass 1 1ncremental (relative) link objects should be put into the processor-specific source directory 
+  Pass 1 1ncremental (relative) link objects should be put into the processor-specific source directory
   where other link objects will be created - ff the pass1 obect is an archive, it could    go anywhere.
 </p>
 <ul>
@@ -4423,7 +4502,7 @@ build
   </li>
   <li>
     <code>CONFIG_PASS1_OBJECT</code>: May be used to include an extra, pass1 object into the final link.
-    This would probably be the object generated from the <code>CONFIG_PASS1_TARGET</code>. 
+    This would probably be the object generated from the <code>CONFIG_PASS1_TARGET</code>.
     It may be available at link time in the <code>arch/&lt;architecture&gt;/src</code> directory.
   </li>
 </ul>
@@ -4584,7 +4663,7 @@ build
     be disabled by setting this value to zero.
   </li>
   <li>
-    <code>CONFIG_SCHED_INSTRUMENTATION</code>: enables instrumentation in 
+    <code>CONFIG_SCHED_INSTRUMENTATION</code>: enables instrumentation in
     scheduler to monitor system performance
   </li>
   <li>
@@ -5024,7 +5103,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
     In some architectures, it may be necessary to take some memory from the end of RAM for page tables
     or other system usage.
     The configuration settings and linker directives must be cognizant of that:
-    <code>CONFIG_PAGING_NDATA</code> should be defined to prevent the data region from extending all the way to the end of memory. 
+    <code>CONFIG_PAGING_NDATA</code> should be defined to prevent the data region from extending all the way to the end of memory.
   </li>
   <li>
     <code>CONFIG_PAGING_DEFPRIO</code>:
@@ -5058,7 +5137,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
     Default: No timeouts monitored.
   </li>
   <p>
-    Some architecture-specific settings. 
+    Some architecture-specific settings.
     Defaults are architecture specific.
     If you don't know what you are doing, it is best to leave these undefined and try the system defaults:
   </p>
@@ -5198,7 +5277,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
 <ul><li>
   <code>CONFIG_MEMCPY_VIK</code>:
   Select this option to use the optimized <code>memcpy()</code> function by Daniel Vik.
-  Select this option for improved performance at the expense of increased size. 
+  Select this option for improved performance at the expense of increased size.
   See licensing information in the top-level <code>COPYING</code> file.
   Default: <code>n</code>.
 </li></ul>
@@ -5440,7 +5519,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
     <code>CONFIG_FS_NXFFS</code>: Enable NuttX FLASH file system (NXFF) support.
   </li>
   <li>
-    <code>CONFIG_NXFFS_ERASEDSTATE</code>: The erased state of FLASH. 
+    <code>CONFIG_NXFFS_ERASEDSTATE</code>: The erased state of FLASH.
     This must have one of the values of <code>0xff</code> or <code>0x00</code>.
     Default: <code>0xff</code>.
   </li>
@@ -5491,7 +5570,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
 <ul>
   <li>
     <code>CONFIG_RTC</code>:
-      Enables general support for a hardware RTC. 
+      Enables general support for a hardware RTC.
       Specific architectures may require other specific settings.
   </li>
   <li>
@@ -5517,7 +5596,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
   <li>
     <code>CONFIG_RTC_ALARM</code>:
-      Enable if the RTC hardware supports setting of an alarm. 
+      Enable if the RTC hardware supports setting of an alarm.
       A callback function will be executed when the alarm goes off
   </li>
 </ul>
@@ -5740,7 +5819,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
   <li>
     <code>CONFIG_STMPE811_NPOLLWAITERS</code>:
-    Maximum number of threads that can be waiting on poll() (ignored if 
+    Maximum number of threads that can be waiting on poll() (ignored if
     <code>CONFIG_DISABLE_POLL</code> is set).
   </li>
   <li>
@@ -6033,7 +6112,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
     text MIME types.
   </li>
   <li>
-    <code>CONFIG_THTTPD_IOBUFFERSIZE</code>: 
+    <code>CONFIG_THTTPD_IOBUFFERSIZE</code>:
   </li>
   <li>
     <code>CONFIG_THTTPD_INDEX_NAMES</code>: A list of index filenames to check. The
@@ -6087,7 +6166,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
     You can also leave both options undefined, and thttpd will not do
     anything special about tildes. Enabling both options is an error.
     Typical values, if they're defined, are &quot;users&quot; for
-    CONFIG_THTTPD_TILDE_MAP1 and &quot;public_html&quot; forCONFIG_THTTPD_TILDE_MAP2. 
+    CONFIG_THTTPD_TILDE_MAP1 and &quot;public_html&quot; forCONFIG_THTTPD_TILDE_MAP2.
   </li>
   <li>
     <code>CONFIG_THTTPD_GENERATE_INDICES</code>:
@@ -6157,7 +6236,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
 </ul>
 
-<h3>USB Serial Device Class Driver (Prolific PL2303 Emulation)</h3> 
+<h3>USB Serial Device Class Driver (Prolific PL2303 Emulation)</h3>
 <ul>
   <li>
     <code>CONFIG_PL2303</code>: Enable compilation of the USB serial driver
@@ -6197,14 +6276,14 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
   <li>
     <code>CONFIG_CDCACM_IFNOBASE</code>:
-    If the CDC driver is part of a composite device, then this may need to 
+    If the CDC driver is part of a composite device, then this may need to
     be defined to offset the CDC/ACM interface numbers so that they are
     unique and contiguous.  When used with the Mass Storage driver, the
     correct value for this offset is zero.
   </li>
   <li>
     <code>CONFIG_CDCACM_STRBASE</code>:
-    If the CDC driver is part of a composite device, then this may need to 
+    If the CDC driver is part of a composite device, then this may need to
     be defined to offset the CDC/ACM string numbers so that they are
     unique and contiguous.  When used with the Mass Storage driver, the
     correct value for this offset is four (this value actuallly only needs
@@ -6275,7 +6354,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
   <li>
     <code>CONFIG_USBMSC_IFNOBASE</code>:
-    If the CDC driver is part of a composite device, then this may need to 
+    If the CDC driver is part of a composite device, then this may need to
     be defined to offset the mass storage interface number so that it is
     unique and contiguous.  When used with the CDC/ACM driver, the
     correct value for this offset is two (because of the two CDC/ACM
@@ -6283,7 +6362,7 @@ int ret = sigaction(SIGCHLD, &sa, NULL);
   </li>
   <li>
     <code>CONFIG_USBMSC_STRBASE</code>:
-    If the CDC driver is part of a composite device, then this may need to 
+    If the CDC driver is part of a composite device, then this may need to
     be defined to offset the mass storage string numbers so that they are
     unique and contiguous.  When used with the CDC/ACM driver, the
     correct value for this offset is four (or perhaps 5 or 6, depending
diff --git a/nuttx/arch/arm/src/sam34/chip/sam3u_pmc.h b/nuttx/arch/arm/src/sam34/chip/sam3u_pmc.h
index 4f26b83d9..1eebd7df5 100644
--- a/nuttx/arch/arm/src/sam34/chip/sam3u_pmc.h
+++ b/nuttx/arch/arm/src/sam34/chip/sam3u_pmc.h
@@ -56,9 +56,15 @@
 #define SAM_PMC_SCDR_OFFSET              0x0004 /* System Clock Disable Register */
 #define SAM_PMC_SCSR_OFFSET              0x0008 /* System Clock Status Register */
                                                 /* 0x000c: Reserved */
-#define SAM_PMC_PCER_OFFSET              0x0010 /* Peripheral Clock Enable Register */
-#define SAM_PMC_PCDR_OFFSET              0x0014 /* Peripheral Clock Disable Register */
-#define SAM_PMC_PCSR_OFFSET              0x0018 /* Peripheral Clock Status Register */
+#if defined(CONFIG_ARCH_CHIP_SAM4S)
+#  define SAM_PMC_PCER0_OFFSET           0x0010 /* Peripheral Clock Enable Register 0 */
+#  define SAM_PMC_PCDR0_OFFSET           0x0014 /* Peripheral Clock Disable Register 0 */
+#  define SAM_PMC_PCSR0_OFFSET           0x0018 /* Peripheral Clock Status Register 0 */
+#elif defined(CONFIG_ARCH_CHIP_SAM3U)
+#  define SAM_PMC_PCER_OFFSET            0x0010 /* Peripheral Clock Enable Register */
+#  define SAM_PMC_PCDR_OFFSET            0x0014 /* Peripheral Clock Disable Register */
+#  define SAM_PMC_PCSR_OFFSET            0x0018 /* Peripheral Clock Status Register */
+#endif
 
 #if defined(CONFIG_ARCH_CHIP_SAM3U)
 #  define SAM_PMC_CKGR_UCKR_OFFSET       0x001c /* UTMI Clock Register */
@@ -111,7 +117,13 @@
 #define SAM_PMC_SCER                     (SAM_PMC_BASE+SAM_PMC_SCER_OFFSET)
 #define SAM_PMC_SCDR                     (SAM_PMC_BASE+SAM_PMC_SCDR_OFFSET)
 #define SAM_PMC_SCSR                     (SAM_PMC_BASE+SAM_PMC_SCSR_OFFSET)
-#define SAM_PMC_PCER                     (SAM_PMC_BASE+SAM_PMC_PCER_OFFSET)
+
+#if defined(CONFIG_ARCH_CHIP_SAM4S)
+#  define SAM_PMC_PCER0                  (SAM_PMC_BASE+SAM_PMC_PCER0_OFFSET)
+#elif defined(CONFIG_ARCH_CHIP_SAM3U)
+#  define SAM_PMC_PCER                   (SAM_PMC_BASE+SAM_PMC_PCER_OFFSET)
+#endif
+
 #define SAM_PMC_PCDR                     (SAM_PMC_BASE+SAM_PMC_PCDR_OFFSET)
 #define SAM_PMC_PCSR                     (SAM_PMC_BASE+SAM_PMC_PCSR_OFFSET)
 
diff --git a/nuttx/arch/arm/src/sam34/sam3u_periphclks.h b/nuttx/arch/arm/src/sam34/sam3u_periphclks.h
index 0b0466f8c..09c1abb4d 100644
--- a/nuttx/arch/arm/src/sam34/sam3u_periphclks.h
+++ b/nuttx/arch/arm/src/sam34/sam3u_periphclks.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/sam34/sam3u_periphclks.h
  *
- *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/nuttx/arch/arm/src/sam34/sam4s_periphclks.h b/nuttx/arch/arm/src/sam34/sam4s_periphclks.h
new file mode 100644
index 000000000..d3e7be326
--- /dev/null
+++ b/nuttx/arch/arm/src/sam34/sam4s_periphclks.h
@@ -0,0 +1,157 @@
+/************************************************************************************
+ * arch/arm/src/sam34/sam4s_periphclks.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM34_SAM4S_PERIPHCLKS_H
+#define __ARCH_ARM_SRC_SAM34_SAM4S_PERIPHCLKS_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <stdint.h>
+#include <arch/irq.h>
+#include "chip/sam4s_pmc.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Helper macros */
+
+#define sam_enableperiph0(s)    putreg32((1 << (s)), SAM_PMC_PCER0)
+#define sam_enableperiph1(s)    putreg32((1 << ((s) - 32)), SAM_PMC_PCER1)
+#define sam_disableperiph0(s)   putreg32((1 << (s)), SAM_PMC_PDER0)
+#define sam_disableperiph1(s)   putreg32((1 << ((s) - 32)), SAM_PMC_PDER1)
+
+#define sam_supc_enableclk()       sam_enableperiph0(SAM_PID_SUPC)
+#define sam_rstc_enableclk()       sam_enableperiph0(SAM_PID_RSTC)
+#define sam_rtc_enableclk()        sam_enableperiph0(SAM_PID_RTC)
+#define sam_rtt_enableclk()        sam_enableperiph0(SAM_PID_RTT)
+#define sam_wdt_enableclk()        sam_enableperiph0(SAM_PID_WDT)
+#define sam_pmc_enableclk()        sam_enableperiph0(SAM_PID_PMC)
+#define sam_eefc0_enableclk()      sam_enableperiph0(SAM_PID_EEFC0)
+#define sam_eefc1_enableclk()      sam_enableperiph0(SAM_PID_EEFC1)
+#define sam_uart0_enableclk()      sam_enableperiph0(SAM_PID_UART0)
+#define sam_uart1_enableclk()      sam_enableperiph0(SAM_PID_UART1)
+#define sam_smc_enableclk()        sam_enableperiph0(SAM_PID_SMC)
+#define sam_pioa_enableclk()       sam_enableperiph0(SAM_PID_PIOA)
+#define sam_piob_enableclk()       sam_enableperiph0(SAM_PID_PIOB)
+#define sam_pioc_enableclk()       sam_enableperiph0(SAM_PID_PIOC)
+#define sam_usart0_enableclk()     sam_enableperiph0(SAM_PID_USART0)
+#define sam_usart1_enableclk()     sam_enableperiph0(SAM_PID_USART1)
+#define sam_hsmci_enableclk()      sam_enableperiph0(SAM_PID_HSMCI)
+#define sam_twi0_enableclk()       sam_enableperiph0(SAM_PID_TWI0)
+#define sam_twi1_enableclk()       sam_enableperiph0(SAM_PID_TWI1)
+#define sam_ssc_enableclk()        sam_enableperiph0(SAM_PID_SSC)
+#define sam_tc0_enableclk()        sam_enableperiph0(SAM_PID_TC0)
+#define sam_tc1_enableclk()        sam_enableperiph0(SAM_PID_TC1)
+#define sam_tc2_enableclk()        sam_enableperiph0(SAM_PID_TC2)
+#define sam_tc3_enableclk()        sam_enableperiph0(SAM_PID_TC3)
+#define sam_tc4_enableclk()        sam_enableperiph0(SAM_PID_TC4)
+#define sam_tc5_enableclk()        sam_enableperiph0(SAM_PID_TC5)
+#define sam_adc12b_enableclk()     sam_enableperiph0(SAM_PID_ADC12B)
+#define sam_dacc_enableclk()       sam_enableperiph0(SAM_PID_DACC)
+#define sam_pwm_enableclk()        sam_enableperiph0(SAM_PID_PWM)
+#define sam_crccu_enableclk()      sam_enableperiph1(SAM_PID_CRCCU)
+#define sam_acc_enableclk()        sam_enableperiph1(SAM_PID_ACC)
+#define sam_udp_enableclk()        sam_enableperiph1(SAM_PID_UDP)
+
+#define sam_supc_disableclk()      sam_disableperiph0(SAM_PID_SUPC)
+#define sam_rstc_disableclk()      sam_disableperiph0(SAM_PID_RSTC)
+#define sam_rtc_disableclk()       sam_disableperiph0(SAM_PID_RTC)
+#define sam_rtt_disableclk()       sam_disableperiph0(SAM_PID_RTT)
+#define sam_wdt_disableclk()       sam_disableperiph0(SAM_PID_WDT)
+#define sam_pmc_disableclk()       sam_disableperiph0(SAM_PID_PMC)
+#define sam_eefc0_disableclk()     sam_disableperiph0(SAM_PID_EEFC0)
+#define sam_eefc1_disableclk()     sam_disableperiph0(SAM_PID_EEFC1)
+#define sam_uart0_disableclk()     sam_disableperiph0(SAM_PID_UART0)
+#define sam_uart1_disableclk()     sam_disableperiph0(SAM_PID_UART1)
+#define sam_smc_disableclk()       sam_disableperiph0(SAM_PID_SMC)
+#define sam_pioa_disableclk()      sam_disableperiph0(SAM_PID_PIOA)
+#define sam_piob_disableclk()      sam_disableperiph0(SAM_PID_PIOB)
+#define sam_pioc_disableclk()      sam_disableperiph0(SAM_PID_PIOC)
+#define sam_usart0_disableclk()    sam_disableperiph0(SAM_PID_USART0)
+#define sam_usart1_disableclk()    sam_disableperiph0(SAM_PID_USART1)
+#define sam_hsmci_disableclk()     sam_disableperiph0(SAM_PID_HSMCI)
+#define sam_twi0_disableclk()      sam_disableperiph0(SAM_PID_TWI0)
+#define sam_twi1_disableclk()      sam_disableperiph0(SAM_PID_TWI1)
+#define sam_ssc_disableclk()       sam_disableperiph0(SAM_PID_SSC)
+#define sam_tc0_disableclk()       sam_disableperiph0(SAM_PID_TC0)
+#define sam_tc1_disableclk()       sam_disableperiph0(SAM_PID_TC1)
+#define sam_tc2_disableclk()       sam_disableperiph0(SAM_PID_TC2)
+#define sam_tc3_disableclk()       sam_disableperiph0(SAM_PID_TC3)
+#define sam_tc4_disableclk()       sam_disableperiph0(SAM_PID_TC4)
+#define sam_tc5_disableclk()       sam_disableperiph0(SAM_PID_TC5)
+#define sam_adc12b_disableclk()    sam_disableperiph0(SAM_PID_ADC)
+#define sam_dacc_disableclk()      sam_disableperiph0(SAM_PID_DACC)
+#define sam_pwm_disableclk()       sam_disableperiph0(SAM_PID_PWM)
+#define sam_crccu_disableclk()     sam_disableperiph1(SAM_PID_CRCCU)
+#define sam_acc_disableclk()       sam_disableperiph1(SAM_PID_ACC)
+#define sam_udp_disableclk()       sam_disableperiph1(SAM_PID_UDP)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM34_SAM4S_PERIPHCLKS_H */
diff --git a/nuttx/arch/arm/src/sam34/sam_hsmci.c b/nuttx/arch/arm/src/sam34/sam_hsmci.c
index 6df8610cb..f44d9fbba 100644
--- a/nuttx/arch/arm/src/sam34/sam_hsmci.c
+++ b/nuttx/arch/arm/src/sam34/sam_hsmci.c
@@ -644,7 +644,7 @@ static inline void sam_disable(void)
 {
   /* Disable the MCI peripheral clock */
 
-  putreg32((1 << SAM_PID_HSMCI), SAM_PMC_PCDR);
+  sam_hsmci_disableclk();
 
   /* Disable the MCI */
 
@@ -1224,7 +1224,6 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
 
   flags = irqsave();
   sam_hsmci_enableclk();
-  fdbg("PCSR: %08x\n", getreg32(SAM_PMC_PCSR));
 
   /* Reset the MCI */
 
diff --git a/nuttx/arch/arm/src/sam34/sam_lowputc.c b/nuttx/arch/arm/src/sam34/sam_lowputc.c
index 0ed02235a..b206a2d94 100644
--- a/nuttx/arch/arm/src/sam34/sam_lowputc.c
+++ b/nuttx/arch/arm/src/sam34/sam_lowputc.c
@@ -150,7 +150,7 @@
  *   selected by the PBADIVMASK register.
  */
 
-#if defined(CONFIG_ARCH_CHIP_SAM3U)
+#if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM4S)
 #  define SAM_MR_USCLKS    UART_MR_USCLKS_MCK   /* Source = Main clock */
 #  define SAM_USART_CLOCK  SAM_MCK_FREQUENCY    /* Frequency of the main clock */
 #elif defined(CONFIG_ARCH_CHIP_SAM4L)
diff --git a/nuttx/arch/arm/src/sam34/sam_serial.c b/nuttx/arch/arm/src/sam34/sam_serial.c
index dcc81ab0f..03a90006f 100644
--- a/nuttx/arch/arm/src/sam34/sam_serial.c
+++ b/nuttx/arch/arm/src/sam34/sam_serial.c
@@ -60,7 +60,7 @@
 #include "os_internal.h"
 
 #include "chip.h"
-#if defined(CONFIG_ARCH_CHIP_SAM3U)
+#if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM4S)
 #  include "chip/sam3u_uart.h"
 #elif defined(CONFIG_ARCH_CHIP_SAM4L)
 #  include "chip/sam4l_usart.h"
@@ -314,7 +314,7 @@
  *   selected by the PBADIVMASK register.
  */
 
-#if defined(CONFIG_ARCH_CHIP_SAM3U)
+#if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM4S)
 #  define SAM_MR_USCLKS    UART_MR_USCLKS_MCK   /* Source = Main clock */
 #  define SAM_USART_CLOCK  SAM_MCK_FREQUENCY    /* Frequency of the main clock */
 #elif defined(CONFIG_ARCH_CHIP_SAM4L)
diff --git a/nuttx/arch/arm/src/sam34/sam_timerisr.c b/nuttx/arch/arm/src/sam34/sam_timerisr.c
index 2a1d0558c..06466eed7 100644
--- a/nuttx/arch/arm/src/sam34/sam_timerisr.c
+++ b/nuttx/arch/arm/src/sam34/sam_timerisr.c
@@ -64,8 +64,8 @@
 
 #if defined(CONFIG_ARCH_CHIP_SAM3U)
 #  define SAM_SYSTICK_CLOCK  SAM_MCK_FREQUENCY    /* Frequency of the main clock */
-#elif defined(CONFIG_ARCH_CHIP_SAM4L)
-#  define SAM_SYSTICK_CLOCK  BOARD_CPU_FREQUENCY  /* PBA frequency is undivided */
+#elif defined(CONFIG_ARCH_CHIP_SAM4L) || defined(CONFIG_ARCH_CHIP_SAM4S)
+#  define SAM_SYSTICK_CLOCK  BOARD_CPU_FREQUENCY  /* CPU frequency */
 #else
 #  error Unrecognized SAM architecture
 #endif