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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-30 14:42:10 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-30 14:42:10 +0000 |
commit | d62ee4952ea22780ca09cb4fd16b1f9608025721 (patch) | |
tree | 1fa1d4c31e05baa14195b0b10a85c8e4c515def3 | |
parent | 501c6962776d0468de9f454231e0b2cb47e44c2e (diff) | |
download | px4-nuttx-d62ee4952ea22780ca09cb4fd16b1f9608025721.tar.gz px4-nuttx-d62ee4952ea22780ca09cb4fd16b1f9608025721.tar.bz2 px4-nuttx-d62ee4952ea22780ca09cb4fd16b1f9608025721.zip |
Remove the g_iocon[] arrary
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5584 42af7a65-404d-4744-a932-0658087f49c3
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c | 40 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h | 1 |
3 files changed, 3 insertions, 42 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h index a3c247caf..ca4ab6b1d 100755 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h @@ -52,7 +52,7 @@ /* Register offsets *****************************************************************/ -#define LPC17_IOCON_PP_OFFSET(p) ((p) << 2) +#define LPC17_IOCON_PP_OFFSET(p) ((unsigned int)(p) << 2) #define LPC17_IOCON_PP0_OFFSET (0x0000) /* IOCON Port(n) register 0 */ #define LPC17_IOCON_PP1_OFFSET (0x0004) /* IOCON Port(n) register 1 */ #define LPC17_IOCON_PP2_OFFSET (0x0008) /* IOCON Port(n) register 2 */ @@ -88,7 +88,7 @@ /* Register addresses ***************************************************************/ -#define LPC17_IOCON_P_BASE(b) (LPC17_IOCON_BASE + ((b) << 7)) +#define LPC17_IOCON_P_BASE(b) (LPC17_IOCON_BASE + (unsigned int(b) << 7)) #define LPC17_IOCON_P0_BASE (LPC17_IOCON_BASE + 0x0000) #define LPC17_IOCON_P1_BASE (LPC17_IOCON_BASE + 0x0080) #define LPC17_IOCON_P2_BASE (LPC17_IOCON_BASE + 0x0100) diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c index ece6adc5f..e3085ff78 100644 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c @@ -110,44 +110,6 @@ const uint32_t g_ioconport[GPIO_NPORTS] = LPC17_IOCON_P4, LPC17_IOCON_P5 } - -/* Register offsets */ - -const uint32_t g_ioconpin[32] = -{ - LPC17_IOCON_PP0_OFFSET, - LPC17_IOCON_PP1_OFFSET, - LPC17_IOCON_PP2_OFFSET, - LPC17_IOCON_PP3_OFFSET, - LPC17_IOCON_PP4_OFFSET, - LPC17_IOCON_PP5_OFFSET, - LPC17_IOCON_PP6_OFFSET, - LPC17_IOCON_PP7_OFFSET, - LPC17_IOCON_PP8_OFFSET, - LPC17_IOCON_PP9_OFFSET, - LPC17_IOCON_PP10_OFFSET, - LPC17_IOCON_PP11_OFFSET, - LPC17_IOCON_PP12_OFFSET, - LPC17_IOCON_PP13_OFFSET, - LPC17_IOCON_PP14_OFFSET, - LPC17_IOCON_PP15_OFFSET, - LPC17_IOCON_PP16_OFFSET, - LPC17_IOCON_PP17_OFFSET, - LPC17_IOCON_PP18_OFFSET, - LPC17_IOCON_PP19_OFFSET, - LPC17_IOCON_PP20_OFFSET, - LPC17_IOCON_PP21_OFFSET, - LPC17_IOCON_PP22_OFFSET, - LPC17_IOCON_PP23_OFFSET, - LPC17_IOCON_PP24_OFFSET, - LPC17_IOCON_PP25_OFFSET, - LPC17_IOCON_PP26_OFFSET, - LPC17_IOCON_PP27_OFFSET, - LPC17_IOCON_PP28_OFFSET, - LPC17_IOCON_PP29_OFFSET, - LPC17_IOCON_PP30_OFFSET, - LPC17_IOCON_PP31_OFFSET -}; #endif /* Port 0 and Port 2 can provide a single interrupt for any combination of @@ -434,7 +396,7 @@ static int lpc17_configiocon(unsigned int port, unsigned int pin, uint32_t regaddr; uint32_t regval; - regaddr = (g_ioconbase[port] + g_ioconpin[pin]); + regaddr = (g_ioconbase[port] + LPC17_IOCON_PP_OFFSET(pin)); regval = getreg32(regaddr); regval &= value; putreg32(regval, regaddr); diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h index 62bf2d018..99a0b67e9 100644 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h @@ -354,7 +354,6 @@ EXTERN const uint32_t g_hipinmode[GPIO_NPORTS]; EXTERN const uint32_t g_odmode[GPIO_NPORTS]; #ifdef LPC178x EXTERN const uint32_t g_ioconport[GPIO_NPORTS]; -EXTERN const uint32_t g_ioconpin[32]; #endif /**************************************************************************** |