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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-05 17:14:15 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-05 17:14:15 +0000 |
commit | 432970bbb310c03b1884ae6edc968c2cb76ad103 (patch) | |
tree | 5da8e8e40e141a293772be392e3eab5570deb673 /nuttx/arch/arm/src/imx/imx_wdog.h | |
parent | 5f82efcd0d9dbdee2de67bb956040736b36865b0 (diff) | |
download | px4-nuttx-432970bbb310c03b1884ae6edc968c2cb76ad103.tar.gz px4-nuttx-432970bbb310c03b1884ae6edc968c2cb76ad103.tar.bz2 px4-nuttx-432970bbb310c03b1884ae6edc968c2cb76ad103.zip |
Add SPI, I2C, RTC, and watchdog
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1684 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/imx/imx_wdog.h')
-rwxr-xr-x | nuttx/arch/arm/src/imx/imx_wdog.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/imx/imx_wdog.h b/nuttx/arch/arm/src/imx/imx_wdog.h new file mode 100755 index 000000000..137e67754 --- /dev/null +++ b/nuttx/arch/arm/src/imx/imx_wdog.h @@ -0,0 +1,81 @@ +/************************************************************************************
+ * arch/arm/src/imx/imx_wdog.h
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_IMX_WDOG_H
+#define __ARCH_ARM_IMX_WDOG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* WDOG Register Offsets ************************************************************/
+
+#define WDOG_WCR_OFFSET 0x0000 /* Watchdog Control Register */
+#define WDOG_WSR_OFFSET 0x0004 /* Watchdog Service Register */
+#define WDOG_WSTR_OFFSET 0x0008 /* Watchdog Status Register */
+
+/* WDOG Register Addresses **********************************************************/
+
+#define IMX_WDOG_WCR (IMX_WDOG_VBASE + WDOG_WCR_OFFSET)
+#define IMX_WDOG_WSR (IMX_WDOG_VBASE + WDOG_WSR_OFFSET)
+#define IMX_WDOG_WSTRT (IMX_WDOG_VBASE + WDOG_WSTR_OFFSET)
+
+/* WDOG Register Bit Definitions ****************************************************/
+
+/* Watchdog Control Register */
+
+#define WDOG_WCR_WDE (1 << 0) /* Bit 0: Watchdog Enable */
+#define WDOG_WCR_WDEC (1 << 1) /* Bit 1: Watchdog Enable Control */
+#define WDOG_WCR_SWR (1 << 2) /* Bit 2: Software Reset Enable */
+#define WDOG_WCR_TMD (1 << 3) /* Bit 3: Test Mode Enable */
+#define WDOG_WCR_WIE (1 << 4) /* Bit 4: Watchdog Interrupt Enable */
+#define WDOG_WCR_WT_SHIFT 8 /* Bit 8-14: Watchdog Timeout */
+#define WDOG_WCR_WT_MASK (0x7f << WDOG_WCR_WT_SHIFT)
+#define WDOG_WCR_WHALT (1 << 15) /* Bit 15: Watchdog Halt */
+
+/* Watchdog Service Register */
+
+#define WDOG_WSR_SHIFT 0 /* Bit 0-15: Watchdog Service Register */
+#define WDOG_WT_MASK (0xffff << WDOG_WSR_SHIFT)
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_IMX_WDOG_H */
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