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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-12 21:28:59 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-12 21:28:59 +0000 |
commit | 54f0d37c7c740dbe7e05e6307bb5049ba6ce087d (patch) | |
tree | 7b7dd545b6af91c465a0c611e9f6ceb0a2b2d03a /nuttx/arch/arm/src/imx | |
parent | 40a5f9991673e466dc7f2043a1ffc2b45378befa (diff) | |
download | px4-nuttx-54f0d37c7c740dbe7e05e6307bb5049ba6ce087d.tar.gz px4-nuttx-54f0d37c7c740dbe7e05e6307bb5049ba6ce087d.tar.bz2 px4-nuttx-54f0d37c7c740dbe7e05e6307bb5049ba6ce087d.zip |
Add system timer logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1700 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/imx')
-rw-r--r-- | nuttx/arch/arm/src/imx/Make.defs | 4 | ||||
-rw-r--r-- | nuttx/arch/arm/src/imx/imx_timer.h | 5 | ||||
-rw-r--r-- | nuttx/arch/arm/src/imx/imx_timerisr.c | 161 |
3 files changed, 168 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/imx/Make.defs b/nuttx/arch/arm/src/imx/Make.defs index 8bf295498..60250c473 100644 --- a/nuttx/arch/arm/src/imx/Make.defs +++ b/nuttx/arch/arm/src/imx/Make.defs @@ -45,9 +45,9 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ up_sigdeliver.c up_syscall.c up_unblocktask.c \ up_undefinedinsn.c up_usestack.c -CHIP_ASRCS = imx_lowputc.S #imx_restart.S +CHIP_ASRCS = imx_lowputc.S CHIP_CSRCS = imx_boot.c imx_gpio.c imx_allocateheap.c imx_irq.c \ - imx_serial.c # imx_decodeirq.c imx_timerisr.c imx_framebuffer.c + imx_serial.c imx_timerisr.c # imx_decodeirq.c imx_framebuffer.c ifeq ($(CONFIG_USBDEV),y) CHIP_CSRCS += imx_usbdev.c diff --git a/nuttx/arch/arm/src/imx/imx_timer.h b/nuttx/arch/arm/src/imx/imx_timer.h index eca7e123e..d923a686d 100644 --- a/nuttx/arch/arm/src/imx/imx_timer.h +++ b/nuttx/arch/arm/src/imx/imx_timer.h @@ -76,6 +76,11 @@ #define TIMER_TCTL_TEN (1 << 0) /* Bit 0: Timer Enable */ #define TIMER_TCTL_CLKSOURCE_SHIFT 1 /* Bit 1-4: Clock Source */ #define TIMER_TCTL_CLKSOURCE_MASK (0x07 << TIMER_TCTL_CLKSOURCE_SHIFT) +#define TCTL_CLKSOURCE_STOPCOUNT (0x00 << TIMER_TCTL_CLKSOURCE_SHIFT) +#define TCTL_CLKSOURCE_PERCLK1 (0x01 << TIMER_TCTL_CLKSOURCE_SHIFT) +#define TCTL_CLKSOURCE_PERCLK1D16 (0x02 << TIMER_TCTL_CLKSOURCE_SHIFT) +#define TCTL_CLKSOURCE_TIN (0x03 << TIMER_TCTL_CLKSOURCE_SHIFT) +#define TCTL_CLKSOURCE_32KHX (0x04 << TIMER_TCTL_CLKSOURCE_SHIFT) #define TIMER_TCTL_IRQEN (1 << 5) /* Bit 5: Interrupt Request Enable */ #define TIMER_TCTL_OM (1 << 6) /* Bit 6: Output Mode */ #define TIMER_TCTL_CAP (1 << 7) /* Bit 7: Capture Edge */ diff --git a/nuttx/arch/arm/src/imx/imx_timerisr.c b/nuttx/arch/arm/src/imx/imx_timerisr.c new file mode 100644 index 000000000..c1543925a --- /dev/null +++ b/nuttx/arch/arm/src/imx/imx_timerisr.c @@ -0,0 +1,161 @@ +/**************************************************************************** + * arch/arm/src/imx/imx_timerisr.c + * arch/arm/src/chip/imx_timerisr.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <sys/types.h> +#include <debug.h> +#include <errno.h> +#include <nuttx/arch.h> + +#include "clock_internal.h" +#include "up_internal.h" +#include "up_arch.h" + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Global Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: up_timerisr + * + * Description: + * The timer ISR will perform a variety of services for various portions + * of the systems. + * + ****************************************************************************/ + +int up_timerisr(int irq, uint32 *regs) +{ + uint32 tstat; + int ret = -EIO; + + /* Get and clear the interrupt status */ + + tstat = getreg32(IMX_TIMER1_TSTAT); + putreg32(0, IMX_TIMER1_TSTAT); + + /* Verify that this is a timer interrupt */ + + if ((tstat & TIMER_TSTAT_COMP) != 0) + { + /* Process timer interrupt */ + + sched_process_timer(); + ret = OK; + } + + return ret; +} + +/**************************************************************************** + * Function: up_timerinit + * + * Description: + * This function is called during start-up to initialize the timer + * interrupt. + * + ****************************************************************************/ + +void up_timerinit(void) +{ + uint32 tctl; + + /* Make sure the timer interrupts are disabled */ + + up_disable_irq(IMX_IRQ_SYSTIMER); + + /* Make sure that timer1 is disabled */ + + putreg32(0, IMX_TIMER1_TCTL); + putreg32(0, IMX_TIMER1_TPRER); + + /* Select restart mode with source = PERCLK1. In restart mode, after + * the compare value is reached, the counter resets to 0x00000000, the + * compare event (COMP) bit of the timer status register is set, an + * interrupt is issued if the interrupt request enable (IRQEN) bit of + * the corresponding TCTL register is set, and the counter resumes + * counting. + */ + + tctl = TCTL_CLKSOURCE_PERCLK1; + putreg32(tctl, IMX_TIMER1_TCTL); + + /* The timer is driven by PERCLK1. Set prescaler for division by one + * so that the clock is driven at PERCLK1. + * + * putreg(0, IMX_TIMER1_TPRER); -- already the case + * + * Set the compare register so that the COMP interrupt is generated + * with a period of MSEC_PER_TICK. The value IMX_PERCLK1_FREQ/1000 + * (defined in board.h) is the number of counts in millisecond, so: + */ + + putreg32((IMX_PERCLK1_FREQ / 1000) * MSEC_PER_TICK, IMX_TIMER1_TCMP); + + /* Configure to provide timer COMP interrupts when TCN increments + * to TCMP. + */ + + tctl |= TIMER_TCTL_IRQEN; + putreg32(tctl, IMX_TIMER1_TCTL); + + /* Finally, enable the timer (be be the last operation on TCTL) */ + + tctl |= TIMER_TCTL_TEN; + putreg32(tctl, IMX_TIMER1_TCTL); + + /* Attach and enable the timer interrupt */ + + irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)up_timerisr); + up_enable_irq(IMX_IRQ_SYSTIMER); +} + |