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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-09 22:53:18 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-04-09 22:53:18 +0000 |
commit | 66dcd11796c910864b76ce545b68f3a5881fbcce (patch) | |
tree | cf53bf5270df3c596095117b7c15e8205400fc57 /nuttx/arch/arm/src/imx | |
parent | 9f5c77926c3ba8bcb32385244df7f38b23ec5b0d (diff) | |
download | px4-nuttx-66dcd11796c910864b76ce545b68f3a5881fbcce.tar.gz px4-nuttx-66dcd11796c910864b76ce545b68f3a5881fbcce.tar.bz2 px4-nuttx-66dcd11796c910864b76ce545b68f3a5881fbcce.zip |
Basic imx infrastructure
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1693 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/imx')
-rw-r--r-- | nuttx/arch/arm/src/imx/Make.defs | 54 | ||||
-rw-r--r-- | nuttx/arch/arm/src/imx/imx_memorymap.h | 12 | ||||
-rw-r--r-- | nuttx/arch/arm/src/imx/imx_uart.h | 2 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/imx/imx_usbd.h | 4 |
4 files changed, 65 insertions, 7 deletions
diff --git a/nuttx/arch/arm/src/imx/Make.defs b/nuttx/arch/arm/src/imx/Make.defs new file mode 100644 index 000000000..4ea16ccab --- /dev/null +++ b/nuttx/arch/arm/src/imx/Make.defs @@ -0,0 +1,54 @@ +############################################################################ +# arch/arm/src/imx/Make.defs +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +HEAD_ASRC = up_head.S + +CMN_ASRCS = up_cache.S up_fullcontextrestore.S up_saveusercontext.S \ + up_vectors.S up_vectoraddrexcptn.S up_vectortab.S +CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ + up_dataabort.c up_mdelay.c up_udelay.c up_exit.c up_idle.c \ + up_initialize.c up_initialstate.c up_interruptcontext.c \ + up_prefetchabort.c up_releasepending.c up_releasestack.c \ + up_reprioritizertr.c up_schedulesigaction.c \ + up_sigdeliver.c up_syscall.c up_unblocktask.c \ + up_undefinedinsn.c up_usestack.c + +CHIP_ASRCS = #imx_lowputc.S imx_restart.S +CHIP_CSRCS = #imx_allocateheap.c imx_boot.c imx_decodeirq.c \ + #imx_irq.c imx_serial.c imx_timerisr.c imx_framebuffer.c + +ifeq ($(CONFIG_USBDEV),y) +CHIP_CSRCS += imx_usbdev.c +endif diff --git a/nuttx/arch/arm/src/imx/imx_memorymap.h b/nuttx/arch/arm/src/imx/imx_memorymap.h index 0c1e4de76..f2719a3c2 100644 --- a/nuttx/arch/arm/src/imx/imx_memorymap.h +++ b/nuttx/arch/arm/src/imx/imx_memorymap.h @@ -74,9 +74,13 @@ /* Virtual Memory Map ***************************************************************/ -#define IMX_SDRAM_VSECTION 0x00000000 /* -(+CONFIG_DRAM_SIZE) */ -#define IMX_FLASH_VSECTION 0x80000000 /* -(+CONFIG_FLASH_SIZE) */ -#define IMX_PERIPHERALS_VSECTION 0xe0000000 /* -0xe00fffff 1Mb */ +/* We use a simple identity mapping. The MMU is really only used to control the + * D-cache + */ + +#define IMX_PERIPHERALS_VSECTION 0x00200000 /* -0x002fffff 1Mb */ +#define IMX_SDRAM_VSECTION 0x08000000 /* -(+CONFIG_DRAM_SIZE) */ +#define IMX_FLASH_VSECTION 0x10000000 /* -(+CONFIG_FLASH_SIZE) */ /* Peripheral Register Offsets ******************************************************/ @@ -157,7 +161,7 @@ * This offset reserves space for the MMU page cache. */ -#define NUTTX_START_VBASE (IMX_SDRAM_VBASE+PGTABLE_SIZE) +#define NUTTX_START_VADDR (IMX_SDRAM_VSECTION+PGTABLE_SIZE) /* Section MMU Flags */ diff --git a/nuttx/arch/arm/src/imx/imx_uart.h b/nuttx/arch/arm/src/imx/imx_uart.h index d050e5ee7..4905e63ff 100644 --- a/nuttx/arch/arm/src/imx/imx_uart.h +++ b/nuttx/arch/arm/src/imx/imx_uart.h @@ -160,7 +160,7 @@ #define UART2_UCR3_PARERREN (1 << 12) /* Bit 12: Parity Error Interrupt Enable */ #define UART2_UCR3_DTREN (1 << 13) /* Bit 13: Data Terminal Ready Interrupt Enable */ #define UART2_UCR3_DPEC_SHIFT 14 /* Bit 14-15: DTR Interrupt Edge Control */ -#define UART2_UCR3_DPEC_SHIFT (0x03 << UART_UCR4_DPEC_SHIFT) +#define UART2_UCR3_DPEC_MASK (0x03 << UART_UCR4_DPEC_SHIFT) /* UART Control Register 4 */ diff --git a/nuttx/arch/arm/src/imx/imx_usbd.h b/nuttx/arch/arm/src/imx/imx_usbd.h index 7c2a395dc..be53f2358 100755 --- a/nuttx/arch/arm/src/imx/imx_usbd.h +++ b/nuttx/arch/arm/src/imx/imx_usbd.h @@ -214,8 +214,8 @@ #define USBD_DADR_DADR_SHIFT 0 /* Bit 0-8: Desired RAM Address */
#define USBD_DADR_DADR_MASK (0x1ff << USBD_DADR_DADR_SHIFT)
-#define USBD_DADR_BSY:1; (1 << 30) /* Bit 30: Busy */
-#define USBD_DADR_CFG:1; (1 << 31) /* Bit 31: Configuration */
+#define USBD_DADR_BSY (1 << 30) /* Bit 30: Busy */
+#define USBD_DADR_CFG (1 << 31) /* Bit 31: Configuration */
/* USBD DDAT Register */
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