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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-12 22:15:49 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-12 22:15:49 +0000 |
commit | 11afe6bb048bff910f4345f8f344c5172a9f4ee8 (patch) | |
tree | 40f400e9c2a21a75c596cb2c0e1d05e8e058eff8 /nuttx/arch/arm/src/lm3s/chip.h | |
parent | bafdbfb93e8a833830ffb65210c3cb9624e680be (diff) | |
download | px4-nuttx-11afe6bb048bff910f4345f8f344c5172a9f4ee8.tar.gz px4-nuttx-11afe6bb048bff910f4345f8f344c5172a9f4ee8.tar.bz2 px4-nuttx-11afe6bb048bff910f4345f8f344c5172a9f4ee8.zip |
Flesh out LM3S9618 interrupt control logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1774 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm3s/chip.h')
-rw-r--r-- | nuttx/arch/arm/src/lm3s/chip.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/lm3s/chip.h b/nuttx/arch/arm/src/lm3s/chip.h index a5175a49f..f6ff0c16a 100644 --- a/nuttx/arch/arm/src/lm3s/chip.h +++ b/nuttx/arch/arm/src/lm3s/chip.h @@ -53,6 +53,16 @@ * Definitions ************************************************************************************/ +/* The LM3S6918 only supports 8 priority levels. The hardware priority mechanism + * will only look at the upper N bits of the 8-bit priority level (where N is 3 for + * the Stellaris family), so any prioritization must be performed in those bits. + * The default priority level is set to the middle value + */ + +#define NVIC_SYSH_PRIORITY_MIN 0x00 +#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 +#define NVIC_SYSH_PRIORITY_MAX 0xe0 + /************************************************************************************ * Public Types ************************************************************************************/ |