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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-15 22:00:05 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-15 22:00:05 +0000 |
commit | 39a4006d5a7b40effa3b236dd91e9c6f9a18934a (patch) | |
tree | 432a44c106133f7800b3ad03be9add96584699a4 /nuttx/arch/arm/src/lm3s/lm3s_gpio.c | |
parent | cea1e420e768d287caf7203096d24a14d38014fa (diff) | |
download | px4-nuttx-39a4006d5a7b40effa3b236dd91e9c6f9a18934a.tar.gz px4-nuttx-39a4006d5a7b40effa3b236dd91e9c6f9a18934a.tar.bz2 px4-nuttx-39a4006d5a7b40effa3b236dd91e9c6f9a18934a.zip |
LM3S integration
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1784 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm3s/lm3s_gpio.c')
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_gpio.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c index a69b4ec14..891a2fdb0 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c @@ -79,7 +79,7 @@ #define DEN_0 0 #define DEN_X 0 -#define PUR_SHIFT 2 +#define PUR_SHIFT 1 #define PUR_1 (1 << PUR_SHIFT) /* Set/clear bit in GPIO PUR register */ #define PUR_0 0 #define PUR_X 0 @@ -316,7 +316,7 @@ static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) * DRV8 bit in the GPIODR8R register are automatically cleared by hardware." */ - regoffset = LM3S_GPIOA_DR2R; + regoffset = LM3S_GPIO_DR2R_OFFSET; } break; @@ -329,7 +329,7 @@ static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) * in the GPIO DR8R register are automatically cleared by hardware." */ - regoffset = LM3S_GPIOA_DR4R; + regoffset = LM3S_GPIO_DR4R_OFFSET; } break; @@ -354,7 +354,7 @@ static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) * DRV4 bit in the GPIO DR4R register are automatically cleared by hardware." */ - regoffset = LM3S_GPIOA_DR8R; + regoffset = LM3S_GPIO_DR8R_OFFSET; } break; } |