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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-17 17:18:19 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-17 17:18:19 +0000 |
commit | 0fa834d4332608374852575437d2714f820868c4 (patch) | |
tree | 4e57188abe5ff32b2639ca69314fec94378bed8d /nuttx/arch/arm/src/lm3s/lm3s_irq.c | |
parent | 0368c4fac2539f3a8812f9471e9be74fb7aeb303 (diff) | |
download | px4-nuttx-0fa834d4332608374852575437d2714f820868c4.tar.gz px4-nuttx-0fa834d4332608374852575437d2714f820868c4.tar.bz2 px4-nuttx-0fa834d4332608374852575437d2714f820868c4.zip |
Debug Cortex-M3 interrupts
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1787 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm3s/lm3s_irq.c')
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_irq.c | 59 |
1 files changed, 53 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_irq.c b/nuttx/arch/arm/src/lm3s/lm3s_irq.c index c9f47c0df..c8307aac3 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_irq.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_irq.c @@ -55,6 +55,12 @@ * Definitions ****************************************************************************/ +/* Enable debug features that are probably on desireable during bringup */ + +#define LM2S_IRQ_DEBUG 1 + +/* Get a 32-bit version of the default priority */ + #define DEFPRIORITY32 \ (NVIC_SYSH_PRIORITY_DEFAULT << 24 |\ NVIC_SYSH_PRIORITY_DEFAULT << 16 |\ @@ -76,6 +82,39 @@ uint32 *current_regs; ****************************************************************************/ /**************************************************************************** + * Name: lm3s_dumpnvic + * + * Description: + * Dump some interesting NVIC registers + * + ****************************************************************************/ + +#if defined(LM2S_IRQ_DEBUG) && defined (CONFIG_DEBUG) +static void lm3s_dumpnvic(const char *msg, int irq) +{ + slldbg("NVIC (%s, irq=%d):\n", msg, irq); + slldbg(" INTCTRL: %08x VECTAB: %08x\n", + getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); + slldbg(" IRQ ENABLE: %08x %08x\n", + getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE)); + slldbg(" SYSH_PRIO: %08x %08x %08x\n", + getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY), + getreg32(NVIC_SYSH12_15_PRIORITY)); + slldbg(" IRQ PRIO: %08x %08x %08x %08x\n", + getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY), + getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY)); + slldbg(" %08x %08x %08x %08x\n", + getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY), + getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY)); + slldbg(" %08x %08x %08x %08x\n", + getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY), + getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY)); +} +#else +# define lm3s_dumpnvic(msg, irq) +#endif + +/**************************************************************************** * Name: lm3s_nmi, lm3s_hardfault, lm3s_mpu, lm3s_busfault, lm3s_usagefault, * lm3s_svcall, lm3s_dbgmonitor, lm3s_pendsv, lm3s_reserved * @@ -217,7 +256,7 @@ static int lml3s_irqinfo(int irq, uint32 *regaddr, uint32 *bit) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** @@ -233,6 +272,10 @@ void up_irqinitialize(void) /* Set all interrrupts (and exceptions) to the default priority */ + putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY); + putreg32(DEFPRIORITY32, NVIC_SYSH8_11_PRIORITY); + putreg32(DEFPRIORITY32, NVIC_SYSH12_15_PRIORITY); + putreg32(DEFPRIORITY32, NVIC_IRQ0_3_PRIORITY); putreg32(DEFPRIORITY32, NVIC_IRQ4_7_PRIORITY); putreg32(DEFPRIORITY32, NVIC_IRQ8_11_PRIORITY); @@ -245,10 +288,6 @@ void up_irqinitialize(void) putreg32(DEFPRIORITY32, NVIC_IRQ36_39_PRIORITY); putreg32(DEFPRIORITY32, NVIC_IRQ40_43_PRIORITY); putreg32(DEFPRIORITY32, NVIC_IRQ44_47_PRIORITY); - putreg32(DEFPRIORITY32, NVIC_IRQ48_51_PRIORITY); - putreg32(DEFPRIORITY32, NVIC_IRQ52_55_PRIORITY); - putreg32(DEFPRIORITY32, NVIC_IRQ56_59_PRIORITY); - putreg32(DEFPRIORITY32, NVIC_IRQ60_63_PRIORITY); /* currents_regs is non-NULL only while processing an interrupt */ @@ -272,7 +311,7 @@ void up_irqinitialize(void) irq_attach(LMSB_IRQ_PENDSV, lm3s_pendsv); #ifdef CONFIG_ARCH_IRQPRIO - up_prioritize_irq(LMSB_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); +/* up_prioritize_irq(LMSB_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif /* Attach all other processor exceptions (except reset and sys tick) */ @@ -288,6 +327,8 @@ void up_irqinitialize(void) irq_attach(LMSB_IRQ_RESERVED, lm3s_reserved); #endif + lm3s_dumpnvic("inital", NR_IRQS); + #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize FIQs */ @@ -298,6 +339,7 @@ void up_irqinitialize(void) /* And finally, enable interrupts */ + setbasepri(0); irqrestore(0); #endif } @@ -324,6 +366,7 @@ void up_disable_irq(int irq) regval &= ~bit; putreg32(regval, regaddr); } + lm3s_dumpnvic("disable", irq); } /**************************************************************************** @@ -348,6 +391,7 @@ void up_enable_irq(int irq) regval |= bit; putreg32(regval, regaddr); } + lm3s_dumpnvic("enable", irq); } /**************************************************************************** @@ -385,6 +429,7 @@ int up_prioritize_irq(int irq, int priority) if (irq < LM3S_IRQ_INTERRUPTS) { + irq -= 4; regaddr = NVIC_SYSH_PRIORITY(irq); } else @@ -398,6 +443,8 @@ int up_prioritize_irq(int irq, int priority) regval &= ~(0xff << shift); regval |= (priority << shift); putreg32(regval, regaddr); + + lm3s_dumpnvic("prioritize", irq); return OK; } #endif |