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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-17 20:42:37 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-17 20:42:37 +0000 |
commit | 7f0f806982bc48dc405e5eeb7b7e6b2b6ee93c89 (patch) | |
tree | c77688d7ca593b20ba2c17786b23e84c269a5f41 /nuttx/arch/arm/src/lm3s | |
parent | 2f3269b1362a9588ed3b34c1044b85ff1e4147e2 (diff) | |
download | px4-nuttx-7f0f806982bc48dc405e5eeb7b7e6b2b6ee93c89.tar.gz px4-nuttx-7f0f806982bc48dc405e5eeb7b7e6b2b6ee93c89.tar.bz2 px4-nuttx-7f0f806982bc48dc405e5eeb7b7e6b2b6ee93c89.zip |
Fix major bug in STM32 interrupt enable/disable logic; NSH now works on STM32
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2149 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm3s')
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_irq.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_irq.c b/nuttx/arch/arm/src/lm3s/lm3s_irq.c index d4101b1ae..63744581a 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_irq.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_irq.c @@ -61,7 +61,7 @@ * bringup */ -#undef LM2S_IRQ_DEBUG +#undef LM3S_IRQ_DEBUG /* Get a 32-bit version of the default priority */ @@ -93,7 +93,7 @@ uint32 *current_regs; * ****************************************************************************/ -#if defined(LM2S_IRQ_DEBUG) && defined (CONFIG_DEBUG) +#if defined(LM3S_IRQ_DEBUG) && defined (CONFIG_DEBUG) static void lm3s_dumpnvic(const char *msg, int irq) { irqstate_t flags; @@ -197,7 +197,7 @@ static int lm3s_reserved(int irq, FAR void *context) #endif /**************************************************************************** - * Name: lml3s_irqinfo + * Name: lm3s_irqinfo * * Description: * Given an IRQ number, provide the register and bit setting to enable or @@ -205,7 +205,7 @@ static int lm3s_reserved(int irq, FAR void *context) * ****************************************************************************/ -static int lml3s_irqinfo(int irq, uint32 *regaddr, uint32 *bit) +static int lm3s_irqinfo(int irq, uint32 *regaddr, uint32 *bit) { DEBUGASSERT(irq >= LM3S_IRQ_NMI && irq < NR_IRQS); @@ -367,7 +367,7 @@ void up_disable_irq(int irq) uint32 regval; uint32 bit; - if (lml3s_irqinfo(irq, ®addr, &bit) == 0) + if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { /* Clear the appropriate bit in the register to enable the interrupt */ @@ -392,7 +392,7 @@ void up_enable_irq(int irq) uint32 regval; uint32 bit; - if (lml3s_irqinfo(irq, ®addr, &bit) == 0) + if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { /* Set the appropriate bit in the register to enable the interrupt */ |