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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-04-11 19:17:03 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-04-11 19:17:03 +0000
commite8c8fbc77576a24a9af5ea800ec33cf90a466678 (patch)
tree6cb7905f855c83316b496eac4ab5d001286f0f4b /nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c
parent43f791fab83155249f86ed7432a60d420b8b9851 (diff)
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Run indent.sh agains lpc2378 code
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2588 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c')
-rwxr-xr-xnuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c85
1 files changed, 47 insertions, 38 deletions
diff --git a/nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c b/nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c
index 914593c1d..5e8d5696d 100755
--- a/nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c
+++ b/nuttx/arch/arm/src/lpc2378/lpc23xx_timerisr.c
@@ -56,33 +56,30 @@
#include "lpc23xx_vic.h"
#include "lpc23xx_timer.h"
-
/****************************************************************************
* Definitions
****************************************************************************/
+
/* T0_PCLKDIV valid values are 1,2,4 */
+
#define T0_PCLK_DIV 1
/* PCKLSEL0 bits 3:2, 00=CCLK/4, 01=CCLK/1 , 10=CCLK/2 */
#ifdef T0_PCLK_DIV
-# if T0_PCLK_DIV == 1
-# define TIMER0_PCLKSEL (0x00000004)
-# elif T0_PCLK_DIV == 2
-# define TIMER0_PCLKSEL (0x00000008)
-# elif T0_PCLK_DIV == 4
-# define TIMER0_PCLKSEL (0x00000000)
-# endif
+# if T0_PCLK_DIV == 1
+# define TIMER0_PCLKSEL (0x00000004)
+# elif T0_PCLK_DIV == 2
+# define TIMER0_PCLKSEL (0x00000008)
+# elif T0_PCLK_DIV == 4
+# define TIMER0_PCLKSEL (0x00000000)
+# endif
#endif
#define T0_PCLKSEL_MASK (0x0000000C)
#define T0_TICKS_COUNT ( (CCLK / T0_PCLK_DIV ) / TICK_PER_SEC )
-
-
-
-
/****************************************************************************
* Private Types
****************************************************************************/
@@ -105,34 +102,37 @@
****************************************************************************/
#ifdef CONFIG_VECTORED_INTERRUPTS
-int up_timerisr(uint32_t *regs)
+int up_timerisr(uint32_t * regs)
#else
-int up_timerisr(int irq, uint32_t *regs)
+int up_timerisr(int irq, uint32_t * regs)
#endif
-{
- static uint32_t tick;
-
- /* Process timer interrupt */
-
- sched_process_timer();
+{
+ static uint32_t tick;
+
+ /* Process timer interrupt */
+
+ sched_process_timer();
- /* Clear the MR0 match interrupt */
+ /* Clear the MR0 match interrupt */
- tmr_putreg8(TMR_IR_MR0I, TMR_IR_OFFSET);
+ tmr_putreg8(TMR_IR_MR0I, TMR_IR_OFFSET);
- /* Reset the VIC as well */
+ /* Reset the VIC as well */
#ifdef CONFIG_VECTORED_INTERRUPTS
- /* write any value to VICAddress to acknowledge the interrupt */
- vic_putreg(0, VIC_ADDRESS_OFFSET);
+ /* write any value to VICAddress to acknowledge the interrupt */
+ vic_putreg(0, VIC_ADDRESS_OFFSET);
#endif
- if(tick++ > 100){
- tick =0;
- up_statledoff();
- }else up_statledon();
-
- return 0;
+ if (tick++ > 100)
+ {
+ tick = 0;
+ up_statledoff();
+ }
+ else
+ up_statledon();
+
+ return 0;
}
/****************************************************************************
@@ -149,44 +149,53 @@ void up_timerinit(void)
uint16_t mcr;
/* Power up Timer0 */
+
SCB_PCONP |= PCTIM0;
/* Timer0 clock input frequency = CCLK / TO_PCLKDIV */
+
SCB_PCLKSEL0 = (SCB_PCLKSEL0 & ~T0_PCLKSEL_MASK) | TIMER0_PCLKSEL;
/* Clear all match and capture event interrupts */
+
tmr_putreg8(TMR_IR_ALLI, TMR_IR_OFFSET);
/* Clear the timer counter */
+
tmr_putreg32(0, TMR_TC_OFFSET);
/* No pre-scaler */
+
tmr_putreg32(0, TMR_PR_OFFSET);
tmr_putreg32(0, TMR_PC_OFFSET);
- /* Set timer match registger to get a TICK_PER_SEC rate
- * See arch/board.h and sched/os_internal.h
+ /* Set timer match register to get a TICK_PER_SEC rate See arch/board.h and
+ * sched/os_internal.h
*/
- tmr_putreg32( T0_TICKS_COUNT, TMR_MR0_OFFSET ); /* 10ms Intterrupt */
+
+ tmr_putreg32(T0_TICKS_COUNT, TMR_MR0_OFFSET); /* 10ms Intterrupt */
/* Reset timer counter register and interrupt on match */
+
mcr = tmr_getreg16(TMR_MCR_OFFSET);
mcr &= ~TMR_MCR_MR1I;
mcr |= (TMR_MCR_MR0I | TMR_MCR_MR0R);
- tmr_putreg16(mcr, TMR_MCR_OFFSET);//-- bit 0=1 -int on MR0, bit 1=1 - Reset on MR0
+ tmr_putreg16(mcr, TMR_MCR_OFFSET); /* -- bit 0=1 -int on MR0, bit 1=1 - Reset on MR0 */
/* Enable counting */
- //~ tmr_putreg32(1, TMR_TCR_OFFSET);
+ /* ~ tmr_putreg32(1, TMR_TCR_OFFSET); */
+
tmr_putreg8(TMR_CR_ENABLE, TMR_TCR_OFFSET);
/* Attach the timer interrupt vector */
#ifdef CONFIG_VECTORED_INTERRUPTS
- up_attach_vector(IRQ_SYSTIMER, PRIORITY_HIGHEST, (vic_vector_t)up_timerisr);
+ up_attach_vector(IRQ_SYSTIMER, PRIORITY_HIGHEST, (vic_vector_t) up_timerisr);
#else
- (void)irq_attach(IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+ (void)irq_attach(IRQ_SYSTIMER, (xcpt_t) up_timerisr);
up_prioritize_irq(IRQ_SYSTIMER, PRIORITY_HIGHEST);
#endif
+
/* And enable the system timer interrupt */
up_enable_irq(IRQ_SYSTIMER);