Add logic to support a ROM'ed MMU page table

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2470 42af7a65-404d-4744-a932-0658087f49c3

3 files changed, 28 insertions, 14 deletions

diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
index 758e38430..5fe8a34d2 100755
--- a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
+++ b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
@@ -82,13 +82,17 @@ extern uint32_t _vector_end;   /* End+1 of vector block */
  * space of the LPCD313x.
  */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static const struct section_mapping_s section_mapping[] =
 {
   { LPC313X_SHADOWSPACE_PSECTION, LPC313X_SHADOWSPACE_VSECTION, 
     LPC313X_SHADOWSPACE_MMUFLAGS, LPC313X_SHADOWSPACE_NSECTIONS},
   { LPC313X_INTSRAM_PSECTION, LPC313X_INTSRAM_VSECTION, 
     LPC313X_INTSRAM_MMUFLAGS, LPC313X_INTSRAM_NSECTIONS},
+#ifdef CONFIG_ARCH_ROMPGTABLE
+  { LPC313X_INTSROM0_PSECTION, LPC313X_INTSROM0_VSECTION, 
+    LPC313X_INTSROM_MMUFLAGS, LPC313X_INTSROM0_NSECTIONS},
+#endif
   { LPC313X_APB0_PSECTION, LPC313X_APB0_VSECTION, 
     LPC313X_APB0_MMUFLAGS, LPC313X_APB0_NSECTIONS},
   { LPC313X_APB1_PSECTION, LPC313X_APB1_VSECTION, 
@@ -129,7 +133,7 @@ static const struct section_mapping_s section_mapping[] =
  * Name: up_setlevel1entry
  ************************************************************************************/
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
 {
   uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
@@ -167,7 +171,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
  * Name: up_setupmappings
  ************************************************************************************/
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static void up_setupmappings(void)
 {
   int i, j;
@@ -201,7 +205,7 @@ static void up_setupmappings(void)
  *
  ************************************************************************************/
 
-#if !defined(CONFIG_ARM_ROMPGTABLE) && !defined(CONFIG_ARM_LOWVECTORS)
+#if !defined(CONFIG_ARCH_ROMPGTABLE) && !defined(CONFIG_ARCH_LOWVECTORS)
 static void up_vectormapping(void)
 {
   uint32_t vector_paddr = LPC313X_VECTOR_PADDR;
@@ -254,14 +258,14 @@ void up_boot(void)
    * IO regions (Including the vector region).
    */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
   up_setupmappings();
 
   /* Provide a special mapping for the IRAM interrupt vector positioned in high
    * memory.
    */
 
-#ifndef CONFIG_ARM_LOWVECTORS
+#ifndef CONFIG_ARCH_LOWVECTORS
   up_vectormapping();
 #endif
 #endif
diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_decodeirq.c b/nuttx/arch/arm/src/lpc313x/lpc313x_decodeirq.c
index 2fa872114..9abaff3c1 100755
--- a/nuttx/arch/arm/src/lpc313x/lpc313x_decodeirq.c
+++ b/nuttx/arch/arm/src/lpc313x/lpc313x_decodeirq.c
@@ -92,8 +92,8 @@ void up_decodeirq(uint32_t *regs)
   index = getreg32(LPC313X_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK;
   if (index != 0)
     {
-      /* Shift the index so that the range of IRQ numbers are in bits 0-7 (up
-       * 0-127 and back off the IRQ number by 1 so that the numbering is zero-based
+      /* Shift the index so that the range of IRQ numbers are in bits 0-7 (values
+       * 1-127) and back off the IRQ number by 1 so that the numbering is zero-based
        */
 
       irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1;
diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h
index 6f639641c..5f1ac4cd4 100755
--- a/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h
+++ b/nuttx/arch/arm/src/lpc313x/lpc313x_memorymap.h
@@ -154,6 +154,7 @@
 #define LPC313X_SHADOWSPACE_NSECTIONS  1 /*         4Kb - <1 section  */
 #define LPC313X_INTSRAM_NSECTIONS      1 /* 96 or 192Kb - <1 section */
 #define LPC313X_APB0_NSECTIONS         1 /*        32Kb - <1 section */
+#define LPC313X_INTSROM0_NSECTIONS     1 /*       128Kb - <1 section */
 #define LPC313X_APB1_NSECTIONS         1 /*        16Kb - <1 section */
 #define LPC313X_APB2_NSECTIONS         1 /*        16Kb - <1 section */
 #define LPC313X_APB3_NSECTIONS         1 /*         1Kb - <1 section */
@@ -176,6 +177,7 @@
 
 #define LPC313X_SHADOWSPACE_MMUFLAGS   MMU_MEMFLAGS
 #define LPC313X_INTSRAM_MMUFLAGS       MMU_MEMFLAGS
+#define LPC313X_INTSROM_MMUFLAGS       MMU_MEMFLAGS
 #define LPC313X_APB0_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_APB1_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_APB2_MMUFLAGS          MMU_IOFLAGS
@@ -188,13 +190,20 @@
 #define LPC313X_INTC_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_NAND_MMUFLAGS          MMU_IOFLAGS
 
+/* board_memorymap.h contains special mappings that are needed when a ROM
+ * memory map is used.  It is included in this odd location becaue it depends
+ * on some the virtual address definitions provided above.
+ */
+
+#include <arch/board/board_memorymap.h>
+
 /* LPC313X Virtual (mapped) Memory Map.  These are the mappings that will
  * be created if the page table lies in RAM.  If the platform has another,
  * read-only, pre-initialized page table (perhaps in ROM), then the board.h
  * file must provide these definitions.
  */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 #  define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
 #  define LPC313X_INTSRAM_VSECTION     0x11028000 /*                        Internal SRAM 96Kb-192Kb */
 #    define LPC313X_INTSRAM0_VADDR     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
@@ -249,18 +258,19 @@
 #  endif
 
   /* A sanity check, if the configuration says that the page table is read-only
-   * and pre-initialized (maybe ROM), then it should have also defined CONFIG_PGTABLE_BASE
+   * and pre-initialized (maybe ROM), then it should have also defined both of
+   * the page table base addresses.
    */
 
-#  ifdef CONFIG_ARM_ROMPGTABLE
-#    error "CONFIG_ARM_ROMPGTABLE defined; CONFIG_PGTABLE_BASE not defined"
+#  ifdef CONFIG_ARCH_ROMPGTABLE
+#    error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined"
 #  else
 
      /* We must declare the page table in ISRAM0 or 1.  We decide depending upon
       * where the vector table was place.
       */
 
-#    ifdef CONFIG_ARM_ROMPGTABLE  /* Vectors located at 0x0000:0000  */
+#    ifdef CONFIG_ARCH_ROMPGTABLE  /* Vectors located at 0x0000:0000  */
 
        /* In this case, ISRAM0 will be shadowed at address 0x0000:0000.  The page
         * table must lie at the top 16Kb of ISRAM1 (or ISRAM0 if this is a LPC3130)
@@ -311,7 +321,7 @@
 /* Determine the base address of the vector table */
 
 #define VECTOR_TABLE_SIZE        0x00010000
-#ifdef CONFIG_ARM_LOWVECTORS  /* Vectors located at 0x0000:0000  */
+#ifdef CONFIG_ARCH_LOWVECTORS  /* Vectors located at 0x0000:0000  */
 #  define LPC313X_VECTOR_PADDR   LPC313X_SHADOWSPACE_PSECTION
 #  define LPC313X_VECTOR_VADDR   0x00000000
 #  define LPC313X_VECTOR_VCOARSE 0x00000000